From d253a32779e429440f1456ad01ff768511c6c42f Mon Sep 17 00:00:00 2001 From: Yuri Astrakhan Date: Sat, 28 Sep 2024 01:26:32 -0400 Subject: [PATCH] Clean up docs, fixing indentation and formatting --- crates/core_arch/src/core_arch_docs.md | 4 ++-- crates/core_arch/src/simd.rs | 3 +-- crates/core_arch/src/x86/abm.rs | 4 ++-- crates/core_arch/src/x86/avx.rs | 6 +++--- crates/core_arch/src/x86/sse.rs | 30 +++++++++++--------------- crates/core_arch/src/x86/sse41.rs | 4 ++-- crates/core_arch/src/x86_64/abm.rs | 4 ++-- crates/core_arch/src/x86_64/avx.rs | 6 +++--- 8 files changed, 28 insertions(+), 33 deletions(-) diff --git a/crates/core_arch/src/core_arch_docs.md b/crates/core_arch/src/core_arch_docs.md index c250fc3d36..db97058abc 100644 --- a/crates/core_arch/src/core_arch_docs.md +++ b/crates/core_arch/src/core_arch_docs.md @@ -142,8 +142,8 @@ detail! the standard library, this macro will perform necessary runtime detection to determine whether the CPU the program is running on supports the specified feature. In this case the macro will expand to a boolean -expression evaluating to whether the local CPU has the AVX2 feature or -not. + expression evaluating to whether the local CPU has the AVX2 feature or + not. Note that this macro, like the `arch` module, is platform-specific. For example calling `is_x86_feature_detected!("avx2")` on ARM will be a diff --git a/crates/core_arch/src/simd.rs b/crates/core_arch/src/simd.rs index e2b9dd36e8..3a53e54b3c 100644 --- a/crates/core_arch/src/simd.rs +++ b/crates/core_arch/src/simd.rs @@ -473,7 +473,6 @@ simd_m_ty!( x7 ); - // 512-bit wide types: simd_ty!( @@ -965,6 +964,6 @@ pub(crate) fn debug_simd_finish( crate::fmt::Formatter::debug_tuple_fields_finish( formatter, type_name, - &crate::array::from_fn::<&dyn crate::fmt::Debug, N, _>(|i| &array[i]) + &crate::array::from_fn::<&dyn crate::fmt::Debug, N, _>(|i| &array[i]), ) } diff --git a/crates/core_arch/src/x86/abm.rs b/crates/core_arch/src/x86/abm.rs index 2688490e1e..5519c83e12 100644 --- a/crates/core_arch/src/x86/abm.rs +++ b/crates/core_arch/src/x86/abm.rs @@ -5,9 +5,9 @@ //! The references are: //! //! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2: -//! Instruction Set Reference, A-Z][intel64_ref]. +//! Instruction Set Reference, A-Z][intel64_ref]. //! - [AMD64 Architecture Programmer's Manual, Volume 3: General-Purpose and -//! System Instructions][amd64_ref]. +//! System Instructions][amd64_ref]. //! //! [Wikipedia][wikipedia_bmi] provides a quick overview of the instructions //! available. diff --git a/crates/core_arch/src/x86/avx.rs b/crates/core_arch/src/x86/avx.rs index b4a721e967..5b19bb95b3 100644 --- a/crates/core_arch/src/x86/avx.rs +++ b/crates/core_arch/src/x86/avx.rs @@ -3,9 +3,9 @@ //! The references are: //! //! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2: -//! Instruction Set Reference, A-Z][intel64_ref]. - [AMD64 Architecture -//! Programmer's Manual, Volume 3: General-Purpose and System -//! Instructions][amd64_ref]. +//! Instruction Set Reference, A-Z][intel64_ref]. - [AMD64 Architecture +//! Programmer's Manual, Volume 3: General-Purpose and System +//! Instructions][amd64_ref]. //! //! [Wikipedia][wiki] provides a quick overview of the instructions available. //! diff --git a/crates/core_arch/src/x86/sse.rs b/crates/core_arch/src/x86/sse.rs index 41d039903f..2843773eb0 100644 --- a/crates/core_arch/src/x86/sse.rs +++ b/crates/core_arch/src/x86/sse.rs @@ -1452,21 +1452,19 @@ pub unsafe fn _mm_getcsr() -> u32 { /// /// It contains several groups of flags: /// -/// * *Exception flags* report which exceptions occurred since last they were -/// reset. +/// * *Exception flags* report which exceptions occurred since last they were reset. /// -/// * *Masking flags* can be used to mask (ignore) certain exceptions. By -/// default -/// these flags are all set to 1, so all exceptions are masked. When an -/// an exception is masked, the processor simply sets the exception flag and -/// continues the operation. If the exception is unmasked, the flag is also set -/// but additionally an exception handler is invoked. +/// * *Masking flags* can be used to mask (ignore) certain exceptions. By default +/// these flags are all set to 1, so all exceptions are masked. When +/// an exception is masked, the processor simply sets the exception flag and +/// continues the operation. If the exception is unmasked, the flag is also set +/// but additionally an exception handler is invoked. /// /// * *Rounding mode flags* control the rounding mode of floating point -/// instructions. +/// instructions. /// /// * The *denormals-are-zero mode flag* turns all numbers which would be -/// denormalized (exponent bits are all zeros) into zeros. +/// denormalized (exponent bits are all zeros) into zeros. /// /// Note that modifying the masking flags, rounding mode, or denormals-are-zero mode flags leads to /// **immediate Undefined Behavior**: Rust assumes that these are always in their default state and @@ -1489,14 +1487,12 @@ pub unsafe fn _mm_getcsr() -> u32 { /// * `_MM_EXCEPT_DIV_ZERO`: Division by zero occurred. /// /// * `_MM_EXCEPT_OVERFLOW`: A numeric overflow exception occurred, i.e., a -/// result was too large to be represented (e.g., an `f32` with absolute -/// value -/// greater than `2^128`). +/// result was too large to be represented (e.g., an `f32` with absolute +/// value greater than `2^128`). /// /// * `_MM_EXCEPT_UNDERFLOW`: A numeric underflow exception occurred, i.e., a -/// result was too small to be represented in a normalized way (e.g., an -/// `f32` -/// with absulte value smaller than `2^-126`.) +/// result was too small to be represented in a normalized way (e.g., an +/// `f32` with absolute value smaller than `2^-126`.) /// /// * `_MM_EXCEPT_INEXACT`: An inexact-result exception occurred (a.k.a. /// precision exception). This means some precision was lost due to rounding. @@ -1829,7 +1825,7 @@ pub const _MM_HINT_ET1: i32 = 6; /// * [`_MM_HINT_T1`](constant._MM_HINT_T1.html): Fetch into L2 and higher. /// /// * [`_MM_HINT_T2`](constant._MM_HINT_T2.html): Fetch into L3 and higher or -/// an implementation-specific choice (e.g., L2 if there is no L3). +/// an implementation-specific choice (e.g., L2 if there is no L3). /// /// * [`_MM_HINT_NTA`](constant._MM_HINT_NTA.html): Fetch data using the /// non-temporal access (NTA) hint. It may be a place closer than main memory diff --git a/crates/core_arch/src/x86/sse41.rs b/crates/core_arch/src/x86/sse41.rs index aeb5ff1087..279847b222 100644 --- a/crates/core_arch/src/x86/sse41.rs +++ b/crates/core_arch/src/x86/sse41.rs @@ -242,14 +242,14 @@ pub unsafe fn _mm_extract_epi32(a: __m128i) -> i32 { /// - `11`: Selects bits `[127:96]` from operand `b`. /// /// * Bits `[5:4]` specify the bits in the result to which the selected bits -/// from operand `b` are copied: +/// from operand `b` are copied: /// - `00`: Copies the selected bits from `b` to result bits `[31:0]`. /// - `01`: Copies the selected bits from `b` to result bits `[63:32]`. /// - `10`: Copies the selected bits from `b` to result bits `[95:64]`. /// - `11`: Copies the selected bits from `b` to result bits `[127:96]`. /// /// * Bits `[3:0]`: If any of these bits are set, the corresponding result -/// element is cleared. +/// element is cleared. /// /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_insert_ps) #[inline] diff --git a/crates/core_arch/src/x86_64/abm.rs b/crates/core_arch/src/x86_64/abm.rs index 251957dfd1..764e903ed9 100644 --- a/crates/core_arch/src/x86_64/abm.rs +++ b/crates/core_arch/src/x86_64/abm.rs @@ -5,9 +5,9 @@ //! The references are: //! //! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2: -//! Instruction Set Reference, A-Z][intel64_ref]. +//! Instruction Set Reference, A-Z][intel64_ref]. //! - [AMD64 Architecture Programmer's Manual, Volume 3: General-Purpose and -//! System Instructions][amd64_ref]. +//! System Instructions][amd64_ref]. //! //! [Wikipedia][wikipedia_bmi] provides a quick overview of the instructions //! available. diff --git a/crates/core_arch/src/x86_64/avx.rs b/crates/core_arch/src/x86_64/avx.rs index 82f6c0f1a1..71b8290eb8 100644 --- a/crates/core_arch/src/x86_64/avx.rs +++ b/crates/core_arch/src/x86_64/avx.rs @@ -3,9 +3,9 @@ //! The references are: //! //! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2: -//! Instruction Set Reference, A-Z][intel64_ref]. - [AMD64 Architecture -//! Programmer's Manual, Volume 3: General-Purpose and System -//! Instructions][amd64_ref]. +//! Instruction Set Reference, A-Z][intel64_ref]. - [AMD64 Architecture +//! Programmer's Manual, Volume 3: General-Purpose and System +//! Instructions][amd64_ref]. //! //! [Wikipedia][wiki] provides a quick overview of the instructions available. //!