From f451ef6f143ab139051a1aed302a2290347425af Mon Sep 17 00:00:00 2001 From: Woshiluo Luo Date: Thu, 5 Dec 2024 19:59:38 +0800 Subject: [PATCH 1/2] feat: add support for /aliases node Signed-off-by: Woshiluo Luo --- examples/cv1812cp_milkv_duo256m_sd.dtb | Bin 0 -> 24599 bytes examples/cv1812cp_milkv_duo256m_sd.dts | 1029 ++++++++++++++++++++++++ src/utils/mod.rs | 59 +- 3 files changed, 1076 insertions(+), 12 deletions(-) create mode 100644 examples/cv1812cp_milkv_duo256m_sd.dtb create mode 100644 examples/cv1812cp_milkv_duo256m_sd.dts diff --git a/examples/cv1812cp_milkv_duo256m_sd.dtb b/examples/cv1812cp_milkv_duo256m_sd.dtb new file mode 100644 index 0000000000000000000000000000000000000000..01af66027b5146ddb28e9341f0b954dd9bf56fa1 GIT binary patch literal 24599 zcmeHPYm6k6egP61f&YLEiWMS|0AWBvfhbahc*z99_nmuA z_3fS>@67C4iqKr?_PytE&pG$pb078UuU+@Q-wuLvZx4cCJqSK}Kg!#YZ$Lhdj5PK2 zAb98%SHG&iHI+7w@-3{#t7(~>KN+u1pP7a+Or%X9A4MMXVA^Z&^{Bt^(X@R&e7t`D zN^j=W=|_PHf?C|Q{s?@bkzlkpC3RLUA-bs+wG|AISnTNZe=8V zjP=EIJ!yq;yBD7)XnYUXKD|Eg!B0Y-PwxPro!T$79^I$6veCe}K$mFRwGR?DX2*)^ zF_`w7e>kqRgEojA`|#~`Xk&IsGr~yJS27P{F?^QQyKkqVGVq?3PJOYvXFO-Ryw|0!D9d=RvaEGDYe z%4LE}C0oAGk_!54L@Wc~cDl}@6#v$!Rg(A<9iJb9&kezwL+}eeOk3$Y`rwnuly0~! z7-C%>+26G^S&F)?2HG%@$B#WFS2XI`@Q~zZC!}BFgd|D7jAn82^B~d3zko~{$4260 zZK*3Uf^r%-Ceo?PV&riTCo#b`9*%vVN4CE27+1B~mwyHQbmOMm)NcLUggyK1=O?rc z`@UO0?*Z*{{hR?06ZKy~KkJl%^oHa4i(uGqKcCPxZ`99w!Lw^Wizts;F*uxVe-HOa zV%Kfp+2DTM>UE;D+f;g9#zPpDRY&RKSv&{G^*@*#+a`ci`GfXbd~?5|AGmHvTziHP z@5l3;$1CGJf|oJfLiYEpZNT&i=TQwkKvC(mwO-MJuY)dqnH)QZDwB)d{@yXNFGQNn z(icw``$5|{e`yQ(SZ-@6wz+*fOuh3B{bM!`k%QWD5@pRe%2$)#N;%&kE9HuDb_P(Y z(WvuPVHQBlIdcb_i3gb zwuiC)&GBID%P7f1_}_zTzKg=y2jk`&>vOYmA|%%F$(f?)X2nS`#Nh(Z2}}dFP0Tu^ z7k_N$VvW7#X6q8$`LX!{z{D|@{)Yr4wXb$W>q@WPEKaZZYws2AK758kkgWZKuA3&m z_Hhn`(xIwmdlG$NZI)5@Va_4WHqvPxbHG|f=nN6oKo0q{4ikJC^lqk9h~$}`}+O07vUFz z1>8<%-v&yRL{#MiTUR_AYTQF$^hyy*(R3R`S0J9#2;7WreGlLaWAnV{ZBk+@hmKxza_Ow^6nb z7KJQrMiW0w@JfTp&0*5m2b(uMAQDIYyk;kt!E&}&*!q1MuxD$q?ZMZg`8Qf=5iPWn z7Vu0etM)gjQ#Sq6N><(GrF8L6-dpaRY%R~s%$!+V1wm=hReLeG{@(dM?8Xe$wfuAD4g7=oS^Gxsd~`uIzL~K@*~9w$ zc$%fZ?mdXVe(#pw;fAxKnFlQliad= z=@*SbLqQ$SGwzq%p65V_Z$Vbz-azn3=rflQWRQD8?9{q}hD?5!5|-)p}v=c}C@R zD|N^kQu)xXDE93`@g2k+%!kuxiA4MM<--MOChbtWsy^iT|8hR0zjyl3u9Eic!#cz< z9n6P%<8R+SjGa=pL%OOy{80$JoDZ?~j_{#f`R&_>4R!+QU_R8_Ec^Ch%PD;`eE4G! zJ<5kead)aQbHKSfIVQe3u+QfDec#vIP5SLnyQ*>bAOw!`8OMisu7BJgDj%jZF%Ey+ zKx_+h6YL|;%wdLGP+y8kD8GnpA@ytxV54|If@L!n^DOu8x4{Oi805t8P4HkbK zYvRmDy4_TKmq6q4c^Mzw@PfxfdFrDZeq#ilKH~l$_x?~Cf2?@9$AY@=Bk%UQ@L!pa zs8Q08kNR`i_t6i5l`YIicGsRb^3g|g$d~caaj_YEY{zVK)b4uuc$=ft$z=R7>WnR% zHzoN#sxERtA^(;6h`o`tCm+2Vtkh{fqCc33GasEo{c=9~4tUrnwqrIQ{o4q<%{5y! zj6Vi1b=piIe%Ey@DVLjZk=vbO@^bBdas-~XKm3+|`rS>Gw>$FFMCw|IQ}b9z-YmB07t*!v|4#qQtA5#dHY-B$YWv`{+l5KaIML1J=>8Uj|HD z=vN5{lzuYXD96^tTD~4Wy^^dX#em96$CtqC>6HEZI^v{JL&VbtvA=v{Suc%{#dTz) zEcidkyGc1e*QhS;!OK2K-}Jenu>oDtP7;`~)!juN+r1U}Ip1nj!AXbejjzSh3HagES~l1j6b$v@!R~7 zYB2s4ul|Q#{S~kN7g~p&@xOlClSj8b_@4*Qg0)LWzx78TSMvX}U!Q=V1<&>TV$oWT z)#2KgiJO5Z&ER*B2lY&0jOE1pQRldD94#(vOl||t{J?VCgIS%!kBm<`Q#3oa8aZ9` z?~^0&l=El1GTVI=`8g=02aualBWt&%Ca)euD|nlVc!Q<~pqT;4KN~>* z#N87T3Ot zxDnDM)%i;u`}K$Rhqg`Z<`4RFhd;_8e|RwF^u(vid_~<+*>wqW7=yd|11~`FmS^K0 zgb4VUXy33uX4WHnRZ8d_GsZN47g-?D+)A&_3B&CcAD@|U{*7P{Ub9>*A2e!J$nj_LLIVc;#P>3 zv@idN?xMHSZ8Zn{F5dF=Vq8LFpk0W?iC@3(@#!-&PuxST#IbLeXe5|TnkRq2m!sqx z!=B_Tv&dgd7t>~zc4-I_+jFdJ-61(tvf24nkm*~tXEOXY>cn$jViNfaWhI?_at)`x zStw0%Uxvx%KEot3V)wcO+w+WMwkcZlp9NZC{m8L8S&-`TdxSfnB{0Z^YQXp2QK^8vtgL9p}%{S%uDo{^M;*7@p`shzg`(*;xlWp;9orl6@Zl|Tl0AS-GU#*t75s+Px`j<(WV-8HQl00nXR~x5;EIy zETmsFS9a=_d+`K#(c`^$?#G;+ON3`3vaL;IVh&faX(a2n#^xqjnCi%+abMb4O|zy7 z7P+e_u#Qf@SiCE`>YI~E1|~{!Z8*l(??+Lm%#Uelw2IUE_p&5C>N`vA_Bg+x$!v?e7+pvm{=d6v?tpe%9>^ z7jD-v%$REYAuscW`xHj%X8~VsJU$5?+VgW-HnlvbWu)bTmN81|X(8`n9MaBGv*nzP z+N#v>&60T?RYyf-RmTuDJ;I_k3pJu|H=o}EI_IkOf6MDX@!LulpQoz{K;iZ0mZAku zr#gSj3?O^8o^k!$0CUqO8DQ$=$ZQd>7ox=Zx{Zf1LVuFxVxWhblQA&g99m>IKp#E+ z$2QrP=>`6bhzItC@nF-ug_WADw1=^3vEi>#w2Mw64`OoSTPV3^iM<~FKNOEblJS2J z5cwr2QJSuuYaVCa0xyM~Y<}p3m$O?TuAh5(WhZ^bv7&y;BK&p_Ms<=qZ4GPj;sPp2 zu(1$1VBqn^$rsw!qc5 zk8&oFDMw@t+2)V6Z!>Lp6`3|@A8hP5fnws23XSqNWDg-m^|aO)UPAZdThT)@F}f~Q zGO2&VlhFWdF><-}{LA2FUt7qu{lmz6SReZ9G;4FRKA5>82R4mdYk3Btz0}2W%d?yC zw&KPAdH-7;-!F=GW3(Fg@RBK7Ihi-IqWgPPq;WVzKMS(V%cIo5q!EAABHv(ID9Is? zPHqmt3Q9MmKko--V|nKEsQ^E7!K(YllVyST_EALqEUf`M8!p zspTiM{J55%(eiUzeikKV@~(=EA@ka;hL<9f4}TmuNxPM+auBo6hF&RKNj7!P$$ouDU)jzjF<`IOH?(alF`npKoi3Z^yV`t}!lJIZt>_ zC)Yt6pCR(l_`LCW1V?G9B&wCRx1!t_8XAB@GfUUiyzCXtxYK%?Bev7FA+pFn4nB#U z+UKPWeuxqpeYAlu#o7zKbstB+CCKJC^5OpW0N)P3trQEmXEi(gtZmSDyu1&=No~%C zI!dum?z$4I>(zL0ju6um$n-39PQIsC%G6L#Pkz9o;gB}Qd1}1(qFz@R_({YyNepe~ z+9rN1lW;q-&4v3>C({F3KB(nKw0sC9+fcv7zO6!1PS2d`NM&}`-94S2(d9teO+x?h zd(!mtC1gHVrGK>_gL?=c(RBFo?rh_Mq4zhqHud9Fo*O7P2~J)W593^|n4G_ttZm>hPIfHz|Nb zsuevP*InOny(Nh{s1t{@@o%DT@bexFeUrZl8f7!p$~?_R$s}F{o1B+|{<{Ix^Lr5U zS;)}7O}?B(_*%oA<;8B_Mv*ryIz4$WZE5>`%Zu|ejidH(-(ll_e{E1^r4!c)lP|}4 zDh&nO4}RJ!He*42<7Bu0Nw{0vsvoN7B%(iR zr?`tCBSJc&a`I2^*!hBz(f-_ML(k0E?(0VLUL3J@e`Pf9rn=Go)@a`1MH=S7VzdSO}HV{M%}a)&*Q9eil( z#&)@L%A6nL&;xThZwtJe;RI)7Ts)EN4~K33#fm|9er3vz1UkKgIuctQ2LE z>(s<`5W-0T`hx9dRW9{frVRg`V)ESy99SxQWPeb2)VeuE<{bY);EJ%VbBXyt#sO=G&%-ewUVS%k?J46?@Qz~=F6iiy56NAFjn6VnR412oTGk?!d$EIELr}A1y$iWj#9=WBL;~9g2eWqO+Ab9rtcxKMCQE;wXO1x ztQF2bSvz&F_L+YA)bBU_z@&89C#X_<7PryU`8#D^de1#7JG33`us&7xmq1GD?|-u9 z>9|pHLpjv`sf&QA*Xfo&(7~$N11r5)`JmcEe^q(eU&^2zvX?Txc_g;~4N*GIC{tgV z`JMmTy!FqL;Fia}JJ09mEWLYtBldXT1oP9>A3$bhtGkskFP|Q21kfJ%Wa`fTZ4PN$ z`DYUhOxM3Ah4gtbD#|7%)RNmMD8oPB$@#NS7J2OZh7kHUE!eKo^ZaXonCkLN8rOh7 zt(_Ct`fzRB>ts=x;E)(g@hW#d8~fow5|1;EfziUdJW> z-J^i3FXjner|HHQFcSP{9(;|Tt(0Lm>R>a^k$N1ens`M} zRfkDohSzGlW#Ald_j2N8)VP+SU9+>Y?(Xd=5a65lFosRtgk2U$`o)^`qbQ4j49%#G z-oQ`zH%e?6TVGkku z1it51_hH2eyDOcbfYVy(D$8bP`I&&9#df0gu_m--y644-!O*uT!3l>DSIB$I-8>}9_rCWpQh1Sp58UA0plC%^6K&}Ihs&G9Vf$}pDHe#ubg>t}ZX(`(r7Jb{T zLcuyk@j)6VQV>TO-aHDI)1~DiOYl7~5uHx#VL)D4F2I#f&%mn&%$)LoQwi01rjvF(==7Xi3uA_Jm6f@Mr(ex{y~&%%c)Zq3yRBqhYMk~svW9U> zhY|9p!!zM(;NslPDSWvcrY$TYd~hAMBJkT>!bHG?a#I;yjTX{2Ck-P(4!2p1 zb{Z#5(d@Q%eA^y$IxC@|PV|>)*IUPfkXqFf9GA3e`K-8$Fj+4Xu<@}GuqT%ztctzx z^xQ&PBB(Loj5Cfa7Ej%w)uFtDF9RYQ+~Lom2M#@O=z&8I9D3l;1BV_s^uVD94n1(_ QfkO`*df?Cl|F1ppe*^2I)Bpeg literal 0 HcmV?d00001 diff --git a/examples/cv1812cp_milkv_duo256m_sd.dts b/examples/cv1812cp_milkv_duo256m_sd.dts new file mode 100644 index 0000000..dcfaec2 --- /dev/null +++ b/examples/cv1812cp_milkv_duo256m_sd.dts @@ -0,0 +1,1029 @@ +/dts-v1/; + +/ { + compatible = "cvitek,cv181x"; + #size-cells = <0x02>; + #address-cells = <0x02>; + model = "Milk-V Duo256M"; + + top_misc_ctrl@3000000 { + compatible = "syscon"; + reg = <0x00 0x3000000 0x00 0x8000>; + }; + + clk-reset-controller { + #reset-cells = <0x01>; + compatible = "cvitek,clk-reset"; + reg = <0x00 0x3002000 0x00 0x08>; + }; + + oscillator { + #clock-cells = <0x00>; + compatible = "fixed-clock"; + clock-frequency = <0x17d7840>; + clock-output-names = "osc"; + phandle = <0x01>; + }; + + clock-controller { + compatible = "cvitek,cv181x-clk"; + reg = <0x00 0x3002000 0x00 0x1000>; + clocks = <0x01>; + #clock-cells = <0x01>; + phandle = <0x02>; + }; + + reset-controller { + #reset-cells = <0x01>; + compatible = "cvitek,reset"; + reg = <0x00 0x3003000 0x00 0x10>; + phandle = <0x03>; + }; + + restart-controller { + compatible = "cvitek,restart"; + reg = <0x00 0x5025000 0x00 0x2000>; + }; + + tpu { + compatible = "cvitek,tpu"; + reg-names = "tdma", "tiu"; + reg = <0x00 0xc100000 0x00 0x1000 0x00 0xc101000 0x00 0x1000>; + clocks = <0x02 0x0c 0x02 0x0d>; + clock-names = "clk_tpu_axi", "clk_tpu_fab"; + resets = <0x03 0x07 0x03 0x08 0x03 0x09>; + reset-names = "res_tdma", "res_tpu", "res_tpusys"; + interrupts = <0x4b 0x04 0x4c 0x04>; + interrupt-names = "tiu_irq", "tdma_irq"; + interrupt-parent = <0x04>; + }; + + mon { + compatible = "cvitek,mon"; + reg-names = "pcmon", "ddr_ctrl", "ddr_phyd", "ddr_aximon", "ddr_top"; + reg = <0x00 0x1040000 0x00 0x1000 0x00 0x8004000 0x00 0x1000 0x00 0x8006000 0x00 0x1000 0x00 0x8008000 0x00 0x1000 0x00 0x800a000 0x00 0x1000>; + interrupts = <0x5d 0x04>; + interrupt-names = "mon_irq"; + interrupt-parent = <0x04>; + }; + + wiegand0 { + compatible = "cvitek,wiegand"; + reg-names = "wiegand"; + reg = <0x00 0x3030000 0x00 0x1000>; + clocks = <0x02 0x7e 0x02 0x7f>; + clock-names = "clk_wgn", "clk_wgn1"; + resets = <0x03 0x56>; + reset-names = "res_wgn"; + interrupts = <0x40 0x04>; + interrupt-parent = <0x04>; + }; + + wiegand1 { + compatible = "cvitek,wiegand"; + reg-names = "wiegand"; + reg = <0x00 0x3031000 0x00 0x1000>; + clocks = <0x02 0x7e 0x02 0x80>; + clock-names = "clk_wgn", "clk_wgn1"; + resets = <0x03 0x57>; + reset-names = "res_wgn"; + interrupts = <0x41 0x04>; + interrupt-parent = <0x04>; + }; + + wiegand2 { + compatible = "cvitek,wiegand"; + reg-names = "wiegand"; + reg = <0x00 0x3032000 0x00 0x1000>; + clocks = <0x02 0x7e 0x02 0x81>; + clock-names = "clk_wgn", "clk_wgn1"; + resets = <0x03 0x58>; + reset-names = "res_wgn"; + interrupts = <0x42 0x04>; + interrupt-parent = <0x04>; + }; + + saradc { + compatible = "cvitek,saradc"; + reg-names = "top_domain_saradc", "rtc_domain_saradc"; + reg = <0x00 0x30f0000 0x00 0x1000 0x00 0x502c000 0x00 0x1000>; + clocks = <0x02 0x12>; + clock-names = "clk_saradc"; + resets = <0x03 0x34>; + reset-names = "res_saradc"; + interrupts = <0x64 0x01>; + interrupt-parent = <0x04>; + }; + + rtc { + compatible = "cvitek,rtc"; + reg = <0x00 0x5026000 0x00 0x1000 0x00 0x5025000 0x00 0x1000>; + clocks = <0x02 0x10>; + clock-names = "clk_rtc"; + interrupts = <0x11 0x04>; + interrupt-parent = <0x04>; + }; + + cvitek-ion { + compatible = "cvitek,cvitek-ion"; + + heap_carveout@0 { + compatible = "cvitek,carveout"; + memory-region = <0x05>; + }; + }; + + sysdma_remap { + compatible = "cvitek,sysdma_remap"; + reg = <0x00 0x3000154 0x00 0x10>; + ch-remap = <0x00 0x05 0x02 0x03 0x26 0x26 0x04 0x07>; + int_mux_base = <0x3000298>; + int_mux = <0x7fc00>; + }; + + dma@0x4330000 { + compatible = "snps,dmac-bm"; + reg = <0x00 0x4330000 0x00 0x1000>; + clock-names = "clk_sdma_axi"; + clocks = <0x02 0x29>; + dma-channels = [08]; + #dma-cells = <0x03>; + dma-requests = [10]; + chan_allocation_order = [00]; + chan_priority = [01]; + block_size = <0x400>; + dma-masters = [02]; + data-width = <0x04 0x04>; + axi_tr_width = <0x04>; + block-ts = <0x0f>; + interrupts = <0x1d 0x04>; + interrupt-parent = <0x04>; + phandle = <0x10>; + }; + + cv-wd@0x3010000 { + compatible = "snps,dw-wdt"; + reg = <0x00 0x3010000 0x00 0x1000>; + resets = <0x03 0x30>; + clocks = <0x06>; + interrupts = <0x3a 0x04>; + }; + + pwm@3060000 { + compatible = "cvitek,cvi-pwm"; + reg = <0x00 0x3060000 0x00 0x1000>; + clocks = <0x02 0x30>; + #pwm-cells = <0x01>; + }; + + pwm@3061000 { + compatible = "cvitek,cvi-pwm"; + reg = <0x00 0x3061000 0x00 0x1000>; + clocks = <0x02 0x30>; + #pwm-cells = <0x02>; + }; + + pwm@3062000 { + compatible = "cvitek,cvi-pwm"; + reg = <0x00 0x3062000 0x00 0x1000>; + clocks = <0x02 0x30>; + #pwm-cells = <0x03>; + }; + + pwm@3063000 { + compatible = "cvitek,cvi-pwm"; + reg = <0x00 0x3063000 0x00 0x1000>; + clocks = <0x02 0x30>; + #pwm-cells = <0x04>; + }; + + pclk { + #clock-cells = <0x00>; + compatible = "fixed-clock"; + clock-frequency = <0x17d7840>; + phandle = <0x06>; + }; + + cvi-spif@10000000 { + compatible = "cvitek,cvi-spif"; + bus-num = <0x00>; + reg = <0x00 0x10000000 0x00 0x10000000>; + reg-names = "spif"; + sck-div = <0x03>; + sck_mhz = <0x12c>; + spi-max-frequency = <0x47868c0>; + interrupts = <0x5f 0x04>; + interrupt-parent = <0x04>; + + spiflash { + compatible = "jedec,spi-nor"; + spi-rx-bus-width = <0x04>; + spi-tx-bus-width = <0x04>; + }; + }; + + spi0@04180000 { + compatible = "snps,dw-apb-ssi"; + reg = <0x00 0x4180000 0x00 0x10000>; + clocks = <0x02 0x6e>; + #address-cells = <0x01>; + #size-cells = <0x00>; + interrupts = <0x36 0x04>; + interrupt-parent = <0x04>; + status = "disabled"; + num-cs = <0x01>; + + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <0xf4240>; + reg = <0x00>; + }; + }; + + spi1@04190000 { + compatible = "snps,dw-apb-ssi"; + reg = <0x00 0x4190000 0x00 0x10000>; + clocks = <0x02 0x6e>; + #address-cells = <0x01>; + #size-cells = <0x00>; + interrupts = <0x37 0x04>; + interrupt-parent = <0x04>; + status = "disabled"; + num-cs = <0x01>; + + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <0xf4240>; + reg = <0x00>; + }; + }; + + spi2@041A0000 { + compatible = "snps,dw-apb-ssi"; + reg = <0x00 0x41a0000 0x00 0x10000>; + clocks = <0x02 0x6e>; + #address-cells = <0x01>; + #size-cells = <0x00>; + interrupts = <0x38 0x04>; + interrupt-parent = <0x04>; + status = "okay"; + num-cs = <0x01>; + + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <0xf4240>; + reg = <0x00>; + status = "okay"; + }; + }; + + spi3@041B0000 { + compatible = "snps,dw-apb-ssi"; + reg = <0x00 0x41b0000 0x00 0x10000>; + clocks = <0x02 0x6e>; + #address-cells = <0x01>; + #size-cells = <0x00>; + interrupts = <0x39 0x04>; + interrupt-parent = <0x04>; + status = "okay"; + num-cs = <0x01>; + + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <0xf4240>; + reg = <0x00>; + }; + }; + + serial@04140000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00 0x4140000 0x00 0x1000>; + clock-frequency = <0x17d7840>; + reg-shift = <0x02>; + reg-io-width = <0x04>; + status = "okay"; + interrupts = <0x2c 0x04>; + interrupt-parent = <0x04>; + }; + + serial@04150000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00 0x4150000 0x00 0x1000>; + clock-frequency = <0x17d7840>; + reg-shift = <0x02>; + reg-io-width = <0x04>; + status = "disabled"; + interrupts = <0x2d 0x04>; + interrupt-parent = <0x04>; + }; + + serial@04160000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00 0x4160000 0x00 0x1000>; + clock-frequency = <0x17d7840>; + reg-shift = <0x02>; + reg-io-width = <0x04>; + status = "disabled"; + interrupts = <0x2e 0x04>; + interrupt-parent = <0x04>; + }; + + serial@04170000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00 0x4170000 0x00 0x1000>; + clock-frequency = <0x17d7840>; + reg-shift = <0x02>; + reg-io-width = <0x04>; + status = "disabled"; + interrupts = <0x2f 0x04>; + interrupt-parent = <0x04>; + }; + + serial@041C0000 { + compatible = "snps,dw-apb-uart"; + reg = <0x00 0x41c0000 0x00 0x1000>; + clock-frequency = <0x17d7840>; + reg-shift = <0x02>; + reg-io-width = <0x04>; + status = "disabled"; + interrupts = <0x30 0x04>; + interrupt-parent = <0x04>; + }; + + gpio@03020000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x00 0x3020000 0x00 0x1000>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + bank-name = "porta"; + gpio-controller; + #gpio-cells = <0x02>; + snps,nr-gpios = <0x20>; + reg = <0x00>; + interrupt-controller; + interrupts = <0x3c 0x04>; + interrupt-parent = <0x04>; + phandle = <0x07>; + }; + }; + + gpio@03021000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x00 0x3021000 0x00 0x1000>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + gpio-controller@1 { + compatible = "snps,dw-apb-gpio-port"; + bank-name = "portb"; + gpio-controller; + #gpio-cells = <0x02>; + snps,nr-gpios = <0x20>; + reg = <0x00>; + interrupt-controller; + interrupts = <0x3d 0x04>; + interrupt-parent = <0x04>; + phandle = <0x08>; + }; + }; + + gpio@03022000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x00 0x3022000 0x00 0x1000>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + gpio-controller@2 { + compatible = "snps,dw-apb-gpio-port"; + bank-name = "portc"; + gpio-controller; + #gpio-cells = <0x02>; + snps,nr-gpios = <0x20>; + reg = <0x00>; + interrupt-controller; + interrupts = <0x3e 0x04>; + interrupt-parent = <0x04>; + phandle = <0x09>; + }; + }; + + gpio@03023000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x00 0x3023000 0x00 0x1000>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + gpio-controller@3 { + compatible = "snps,dw-apb-gpio-port"; + bank-name = "portd"; + gpio-controller; + #gpio-cells = <0x02>; + snps,nr-gpios = <0x20>; + reg = <0x00>; + interrupt-controller; + interrupts = <0x3f 0x04>; + interrupt-parent = <0x04>; + }; + }; + + gpio@05021000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x00 0x5021000 0x00 0x1000>; + #address-cells = <0x01>; + #size-cells = <0x00>; + + gpio-controller@4 { + compatible = "snps,dw-apb-gpio-port"; + bank-name = "porte"; + gpio-controller; + #gpio-cells = <0x02>; + snps,nr-gpios = <0x20>; + reg = <0x00>; + interrupt-controller; + interrupts = <0x46 0x04>; + interrupt-parent = <0x04>; + phandle = <0x11>; + }; + }; + + i2c@04000000 { + compatible = "snps,designware-i2c"; + clocks = <0x02 0x6f>; + reg = <0x00 0x4000000 0x00 0x1000>; + clock-frequency = <0x61a80>; + #size-cells = <0x00>; + #address-cells = <0x01>; + resets = <0x03 0x1b>; + reset-names = "i2c0"; + interrupts = <0x31 0x04>; + interrupt-parent = <0x04>; + scl-pinmux = <0x3001070 0x00 0x03>; + sda-pinmux = <0x3001074 0x00 0x03>; + scl-gpios = <0x07 0x1c 0x00>; + sda-gpios = <0x07 0x1d 0x00>; + status = "disabled"; + }; + + i2c@04010000 { + compatible = "snps,designware-i2c"; + clocks = <0x02 0x6f>; + reg = <0x00 0x4010000 0x00 0x1000>; + clock-frequency = <0x61a80>; + #size-cells = <0x00>; + #address-cells = <0x01>; + resets = <0x03 0x1c>; + reset-names = "i2c1"; + interrupts = <0x32 0x04>; + interrupt-parent = <0x04>; + scl-pinmux = <0x3009408 0x02 0x03>; + sda-pinmux = <0x300940c 0x02 0x03>; + scl-gpios = <0x08 0x07 0x00>; + sda-gpios = <0x08 0x08 0x00>; + }; + + i2c@04020000 { + compatible = "snps,designware-i2c"; + clocks = <0x02 0x6f>; + reg = <0x00 0x4020000 0x00 0x1000>; + clock-frequency = <0x186a0>; + resets = <0x03 0x1d>; + reset-names = "i2c2"; + interrupts = <0x33 0x04>; + interrupt-parent = <0x04>; + scl-pinmux = <0x30011a0 0x04 0x03>; + sda-pinmux = <0x300119c 0x04 0x03>; + scl-gpios = <0x09 0x0f 0x00>; + sda-gpios = <0x09 0x0e 0x00>; + }; + + i2c@04030000 { + compatible = "snps,designware-i2c"; + clocks = <0x02 0x6f>; + reg = <0x00 0x4030000 0x00 0x1000>; + clock-frequency = <0x61a80>; + resets = <0x03 0x1e>; + reset-names = "i2c3"; + interrupts = <0x34 0x04>; + interrupt-parent = <0x04>; + scl-pinmux = <0x3001014 0x00 0x03>; + sda-pinmux = <0x3001018 0x00 0x03>; + scl-gpios = <0x07 0x05 0x00>; + sda-gpios = <0x07 0x06 0x00>; + }; + + i2c@04040000 { + compatible = "snps,designware-i2c"; + clocks = <0x02 0x6f>; + reg = <0x00 0x4040000 0x00 0x1000>; + clock-frequency = <0x61a80>; + resets = <0x03 0x1f>; + reset-names = "i2c4"; + interrupts = <0x35 0x04>; + interrupt-parent = <0x04>; + scl-pinmux = <0x30010f0 0x02 0x03>; + sda-pinmux = <0x30010f4 0x02 0x03>; + scl-gpios = <0x08 0x01 0x00>; + sda-gpios = <0x08 0x02 0x00>; + status = "disabled"; + }; + + eth_csrclk { + clock-output-names = "eth_csrclk"; + clock-frequency = <0xee6b280>; + #clock-cells = <0x00>; + compatible = "fixed-clock"; + phandle = <0x0a>; + }; + + eth_ptpclk { + clock-output-names = "eth_ptpclk"; + clock-frequency = <0x2faf080>; + #clock-cells = <0x00>; + compatible = "fixed-clock"; + phandle = <0x0b>; + }; + + stmmac-axi-config { + snps,wr_osr_lmt = <0x01>; + snps,rd_osr_lmt = <0x02>; + snps,blen = <0x04 0x08 0x10 0x00 0x00 0x00 0x00>; + phandle = <0x0c>; + }; + + rx-queues-config { + snps,rx-queues-to-use = <0x01>; + phandle = <0x0d>; + + queue0 { + }; + }; + + tx-queues-config { + snps,tx-queues-to-use = <0x01>; + phandle = <0x0e>; + + queue0 { + }; + }; + + ethernet@4070000 { + compatible = "cvitek,ethernet"; + reg = <0x00 0x4070000 0x00 0x10000>; + clock-names = "stmmaceth", "ptp_ref"; + clocks = <0x0a 0x0b>; + tx-fifo-depth = <0x2000>; + rx-fifo-depth = <0x2000>; + snps,multicast-filter-bins = <0x00>; + snps,perfect-filter-entries = <0x01>; + snps,txpbl = <0x08>; + snps,rxpbl = <0x08>; + snps,aal; + snps,axi-config = <0x0c>; + snps,mtl-rx-config = <0x0d>; + snps,mtl-tx-config = <0x0e>; + phy-mode = "rmii"; + interrupt-names = "macirq"; + interrupts = <0x1f 0x04>; + interrupt-parent = <0x04>; + }; + + cv-sd@4310000 { + compatible = "cvitek,cv181x-sd"; + reg = <0x00 0x4310000 0x00 0x1000>; + reg-names = "core_mem"; + bus-width = <0x04>; + cap-sd-highspeed; + cap-mmc-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + no-sdio; + no-mmc; + src-frequency = <0x165a0bc0>; + min-frequency = <0x61a80>; + max-frequency = <0xbebc200>; + 64_addressing; + reset_tx_rx_phy; + reset-names = "sdhci"; + pll_index = <0x06>; + pll_reg = <0x3002070>; + cvi-cd-gpios = <0x07 0x0d 0x01>; + interrupts = <0x24 0x04>; + interrupt-parent = <0x04>; + no-1-8-v; + }; + + i2s_mclk { + clock-output-names = "i2s_mclk"; + clock-frequency = <0x1770000>; + #clock-cells = <0x00>; + compatible = "fixed-clock"; + phandle = <0x0f>; + }; + + i2s_subsys { + compatible = "cvitek,i2s_tdm_subsys"; + reg = <0x00 0x4108000 0x00 0x100>; + clocks = <0x0f 0x02 0x04 0x02 0x2a 0x02 0x2b 0x02 0x2c 0x02 0x2d>; + clock-names = "i2sclk", "clk_a0pll", "clk_sdma_aud0", "clk_sdma_aud1", "clk_sdma_aud2", "clk_sdma_aud3"; + master_base = <0x4110000>; + }; + + i2s@04100000 { + compatible = "cvitek,cv1835-i2s"; + reg = <0x00 0x4100000 0x00 0x2000>; + clocks = <0x0f 0x00>; + clock-names = "i2sclk"; + dev-id = <0x00>; + #sound-dai-cells = <0x00>; + dmas = <0x10 0x00 0x01 0x01>; + dma-names = "rx"; + capability = "rx"; + mclk_out = "false"; + interrupts = <0x28 0x04>; + interrupt-parent = <0x04>; + }; + + i2s@04130000 { + compatible = "cvitek,cv1835-i2s"; + reg = <0x00 0x4130000 0x00 0x2000>; + clocks = <0x0f 0x00>; + clock-names = "i2sclk"; + dev-id = <0x03>; + #sound-dai-cells = <0x00>; + dmas = <0x10 0x07 0x01 0x01>; + dma-names = "tx"; + capability = "tx"; + mclk_out = "true"; + interrupts = <0x2b 0x04>; + interrupt-parent = <0x04>; + }; + + adc@0300A100 { + compatible = "cvitek,cv182xaadc"; + reg = <0x00 0x300a100 0x00 0x100>; + clocks = <0x0f 0x00>; + clock-names = "i2sclk"; + clk_source = <0x4130000>; + }; + + dac@0300A000 { + compatible = "cvitek,cv182xadac"; + reg = <0x00 0x300a000 0x00 0x100>; + clocks = <0x0f 0x00>; + clock-names = "i2sclk"; + mute-gpio-r = <0x11 0x01 0x01>; + }; + + pdm@0x041D0C00 { + compatible = "cvitek,cv1835pdm"; + reg = <0x00 0x41d0c00 0x00 0x100>; + clocks = <0x0f 0x00>; + clock-names = "i2sclk"; + }; + + sound_adc { + compatible = "cvitek,cv182xa-adc"; + cvi,model = "CV182XA"; + cvi,card_name = "cv182xa_adc"; + }; + + sound_dac { + compatible = "cvitek,cv182xa-dac"; + cvi,model = "CV182XA"; + cvi,card_name = "cv182xa_dac"; + }; + + wifi_pin { + compatible = "cvitek,wifi-pin"; + poweron-gpio = <0x11 0x02 0x00>; + wakeup-gpio = <0x11 0x06 0x00>; + }; + + bt_pin { + compatible = "cvitek,bt-pin"; + poweron-gpio = <0x11 0x09 0x00>; + }; + + cif { + compatible = "cvitek,cif"; + reg = <0x00 0xa0c2000 0x00 0x2000 0x00 0xa0d0000 0x00 0x1000 0x00 0xa0c4000 0x00 0x2000 0x00 0xa0c6000 0x00 0x2000 0x00 0x3001c30 0x00 0x30>; + reg-names = "csi_mac0", "csi_wrap0", "csi_mac1", "csi_mac2", "pad_ctrl"; + snsr-reset = <0x09 0x11 0x01 0x09 0x11 0x01 0x09 0x11 0x01>; + resets = <0x03 0x46 0x03 0x48 0x03 0x47 0x03 0x49>; + reset-names = "phy0", "phy1", "phy-apb0", "phy-apb1"; + clocks = <0x02 0x58 0x02 0x59 0x02 0x85 0x02 0x03 0x02 0x05 0x02 0x02>; + clock-names = "clk_cam0", "clk_cam1", "clk_sys_2", "clk_mipimpll", "clk_disppll", "clk_fpll"; + interrupts = <0x1a 0x04 0x1b 0x04>; + interrupt-names = "csi0", "csi1"; + interrupt-parent = <0x04>; + }; + + mipi_tx { + compatible = "cvitek,mipi_tx"; + clocks = <0x02 0x66 0x02 0x67>; + clock-names = "clk_disp", "clk_dsi"; + }; + + sys { + compatible = "cvitek,sys"; + }; + + base { + compatible = "cvitek,base"; + reg = <0x00 0xa0c8000 0x00 0x20>; + reg-names = "vip_sys"; + }; + + vi { + compatible = "cvitek,vi"; + reg = <0x00 0xa000000 0x00 0x80000>; + clocks = <0x02 0x4d 0x02 0x4e 0x02 0x85 0x02 0x97 0x02 0x4c 0x02 0x90 0x02 0x9a 0x02 0x5c 0x02 0x5a 0x02 0x5b 0x02 0x9c>; + clock-names = "clk_sys_0", "clk_sys_1", "clk_sys_2", "clk_sys_3", "clk_axi", "clk_csi_be", "clk_raw", "clk_isp_top", "clk_csi_mac0", "clk_csi_mac1", "clk_csi_mac2"; + clock-freq-vip-sys1 = <0x11e1a300>; + interrupts = <0x18 0x04>; + interrupt-parent = <0x04>; + interrupt-names = "isp"; + }; + + vpss { + compatible = "cvitek,vpss"; + reg = <0x00 0xa080000 0x00 0x10000 0x00 0xa0d1000 0x00 0x100>; + reg-names = "sc"; + clocks = <0x02 0x4d 0x02 0x4e 0x02 0x85 0x02 0x5d 0x02 0x5e 0x02 0x5f 0x02 0x60 0x02 0x61 0x02 0x62 0x02 0x63>; + clock-names = "clk_sys_0", "clk_sys_1", "clk_sys_2", "clk_img_d", "clk_img_v", "clk_sc_top", "clk_sc_d", "clk_sc_v1", "clk_sc_v2", "clk_sc_v3"; + clock-freq-vip-sys1 = <0x11e1a300>; + interrupts = <0x19 0x04>; + interrupt-names = "sc"; + interrupt-parent = <0x04>; + }; + + ive { + compatible = "cvitek,ive"; + reg = <0x00 0xa0a0000 0x00 0x3100>; + reg-names = "ive_base"; + interrupt-names = "ive_irq"; + interrupt-parent = <0x04>; + interrupts = <0x61 0x04>; + }; + + vo { + compatible = "cvitek,vo"; + reg = <0x00 0xa080000 0x00 0x10000 0x00 0xa0c8000 0x00 0xa0 0x00 0xa0d1000 0x00 0x100>; + reg-names = "sc", "vip_sys", "dphy"; + clocks = <0x02 0x66 0x02 0x67 0x02 0x65>; + reset-gpio = <0x11 0x02 0x01>; + pwm-gpio = <0x11 0x00 0x00>; + power-ct-gpio = <0x11 0x01 0x00>; + clock-names = "clk_disp", "clk_dsi", "clk_bt"; + }; + + reserved-memory { + #size-cells = <0x02>; + #address-cells = <0x02>; + ranges; + + cvifb { + alloc-ranges = <0x00 0x8b13e000 0x00 0x1c2000>; + size = <0x00 0x1c2000>; + phandle = <0x12>; + }; + + ion { + compatible = "ion-region"; + size = <0x00 0x4b00000>; + phandle = <0x05>; + }; + }; + + cvifb { + compatible = "cvitek,fb"; + memory-region = <0x12>; + reg = <0x00 0xa088000 0x00 0x1000>; + reg-names = "disp"; + }; + + dwa { + compatible = "cvitek,dwa"; + reg = <0x00 0xa0c0000 0x00 0x1000>; + reg-names = "dwa"; + clocks = <0x02 0x4d 0x02 0x4e 0x02 0x85 0x02 0x97 0x02 0x98 0x02 0x64>; + clock-names = "clk_sys_0", "clk_sys_1", "clk_sys_2", "clk_sys_3", "clk_sys_4", "clk_dwa"; + clock-freq-vip-sys1 = <0x11e1a300>; + interrupts = <0x1c 0x04>; + interrupt-names = "dwa"; + interrupt-parent = <0x04>; + }; + + rgn { + compatible = "cvitek,rgn"; + }; + + vcodec { + compatible = "cvitek,asic-vcodec"; + reg = <0x00 0xb020000 0x00 0x10000 0x00 0xb010000 0x00 0x10000 0x00 0xb030000 0x00 0x100 0x00 0xb058000 0x00 0x100 0x00 0xb050000 0x00 0x400>; + reg-names = "h265", "h264", "vc_ctrl", "vc_sbm", "vc_addr_remap"; + clocks = <0x02 0x50 0x02 0x52 0x02 0x56 0x02 0x53 0x02 0x57 0x02 0x51 0x02 0x84 0x02 0x8b 0x02 0x88>; + clock-names = "clk_axi_video_codec", "clk_h264c", "clk_apb_h264c", "clk_h265c", "clk_apb_h265c", "clk_vc_src0", "clk_vc_src1", "clk_vc_src2", "clk_cfg_reg_vc"; + interrupts = <0x16 0x04 0x15 0x04 0x17 0x04>; + interrupt-names = "h265", "h264", "sbm"; + interrupt-parent = <0x04>; + }; + + jpu { + compatible = "cvitek,asic-jpeg"; + reg = <0x00 0xb000000 0x00 0x300 0x00 0xb030000 0x00 0x100 0x00 0xb058000 0x00 0x100>; + reg-names = "jpeg", "vc_ctrl", "vc_sbm"; + clocks = <0x02 0x50 0x02 0x54 0x02 0x55 0x02 0x51 0x02 0x84 0x02 0x8b 0x02 0x88>; + clock-names = "clk_axi_video_codec", "clk_jpeg", "clk_apb_jpeg", "clk_vc_src0", "clk_vc_src1", "clk_vc_src2", "clk_cfg_reg_vc"; + resets = <0x03 0x04>; + reset-names = "jpeg"; + interrupts = <0x14 0x04>; + interrupt-names = "jpeg"; + interrupt-parent = <0x04>; + }; + + cvi_vc_drv { + compatible = "cvitek,cvi_vc_drv"; + reg = <0x00 0xb030000 0x00 0x100 0x00 0xb058000 0x00 0x100 0x00 0xb050000 0x00 0x400>; + reg-names = "vc_ctrl", "vc_sbm", "vc_addr_remap"; + }; + + rtos_cmdqu { + compatible = "cvitek,rtos_cmdqu"; + reg = <0x00 0x1900000 0x00 0x1000>; + reg-names = "mailbox"; + interrupts = <0x65 0x04>; + interrupt-names = "mailbox"; + interrupt-parent = <0x04>; + }; + + usb@04340000 { + compatible = "cvitek,cv182x-usb"; + reg = <0x00 0x4340000 0x00 0x10000 0x00 0x3006000 0x00 0x58>; + dr_mode = "otg"; + g-use-dma; + g-rx-fifo-size = <0x218>; + g-np-tx-fifo-size = <0x20>; + g-tx-fifo-size = <0x300 0x200 0x200 0x180 0x80 0x80>; + clocks = <0x02 0x44 0x02 0x45 0x02 0x46 0x02 0x47 0x02 0x48>; + clock-names = "clk_axi", "clk_apb", "clk_125m", "clk_33k", "clk_12m"; + status = "okay"; + interrupts = <0x1e 0x04>; + interrupt-parent = <0x04>; + }; + + thermal@030E0000 { + compatible = "cvitek,cv181x-thermal"; + reg = <0x00 0x30e0000 0x00 0x10000>; + clocks = <0x02 0x11>; + clock-names = "clk_tempsen"; + reset-names = "tempsen"; + #thermal-sensor-cells = <0x01>; + interrupts = <0x10 0x04>; + interrupt-names = "tempsen"; + phandle = <0x13>; + }; + + thermal-zones { + + soc_thermal_0 { + polling-delay-passive = <0x3e8>; + polling-delay = <0x3e8>; + thermal-sensors = <0x13 0x00>; + + trips { + + soc_thermal_trip_0 { + temperature = <0x186a0>; + hysteresis = <0x1388>; + type = "passive"; + }; + + soc_thermal_trip_1 { + temperature = <0x1adb0>; + hysteresis = <0x1388>; + type = "passive"; + }; + + soc_thermal_crtical_0 { + temperature = <0x1fbd0>; + hysteresis = <0x00>; + type = "critical"; + }; + }; + }; + }; + + cviaudio_core { + compatible = "cvitek,audio"; + }; + + audio_clock { + compatible = "fixed-clock"; + #clock-cells = <0x00>; + clock-frequency = <0x1770000>; + }; + + aliases { + i2c0 = "/i2c@04000000"; + i2c1 = "/i2c@04010000"; + i2c2 = "/i2c@04020000"; + i2c3 = "/i2c@04030000"; + i2c4 = "/i2c@04040000"; + serial0 = "/serial@04140000"; + serial1 = "/serial@04150000"; + serial2 = "/serial@04160000"; + serial3 = "/serial@04170000"; + serial4 = "/serial@041C0000"; + ethernet0 = "/ethernet@4070000"; + }; + + chosen { + stdout-path = "serial0"; + }; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + timebase-frequency = <0x17d7840>; + + cpu-map { + + cluster0 { + + core0 { + cpu = <0x01>; + }; + }; + }; + + cpu@0 { + device_type = "cpu"; + reg = <0x00>; + status = "okay"; + compatible = "riscv"; + riscv,isa = "rv64imafdvcsu"; + mmu-type = "riscv,sv39"; + clock-frequency = <0x17d7840>; + + interrupt-controller { + #interrupt-cells = <0x01>; + interrupt-controller; + compatible = "riscv,cpu-intc"; + phandle = <0x14>; + }; + }; + }; + + soc { + #address-cells = <0x02>; + #size-cells = <0x02>; + compatible = "simple-bus"; + ranges; + + interrupt-controller@70000000 { + riscv,ndev = <0x65>; + riscv,max-priority = <0x07>; + reg-names = "control"; + reg = <0x00 0x70000000 0x00 0x4000000>; + interrupts-extended = <0x14 0xffffffff 0x14 0x09>; + interrupt-controller; + compatible = "riscv,plic0"; + #interrupt-cells = <0x02>; + #address-cells = <0x00>; + phandle = <0x04>; + }; + + clint@74000000 { + interrupts-extended = <0x14 0x03 0x14 0x07>; + reg = <0x00 0x74000000 0x00 0x10000>; + compatible = "riscv,clint0"; + clint,has-no-64bit-mmio; + }; + }; + + cv181x_cooling { + clocks = <0x02 0x95 0x02 0x0c>; + clock-names = "clk_cpu", "clk_tpu_axi"; + dev-freqs = <0x32a9f880 0x1dcd6500 0x1954fc40 0x165a0bc0 0x1954fc40 0x11e1a300>; + compatible = "cvitek,cv181x-cooling"; + #cooling-cells = <0x02>; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x00 0x80000000 0x00 0xfe00000>; + }; + + fast_image { + compatible = "cvitek,rtos_image"; + reg-names = "rtos_region"; + reg = <0x00 0x8fe00000 0x00 0x200000>; + ion-size = <0x1600000>; + }; +}; diff --git a/src/utils/mod.rs b/src/utils/mod.rs index d295a48..82f8eda 100644 --- a/src/utils/mod.rs +++ b/src/utils/mod.rs @@ -1,8 +1,8 @@ -use crate::buildin::Node; +use crate::buildin::{Node, StrSeq}; impl Node<'_> { - /// Try to get a node by path - pub fn find(&self, path: &str) -> Option { + /// Try to get a node by a full-path. + fn raw_find(&self, path: &str) -> Option { // Direct return root node let mut current_node = Some(self.clone()); if path == "/" { @@ -29,6 +29,28 @@ impl Node<'_> { } current_node } + /// Try to get a node by path. + pub fn find(&self, path: &str) -> Option { + // Direct return root node + let current_node = Some(self.clone()); + if path == "/" { + return current_node; + } + let (root, _) = path.split_at(1); + if root != "/" { + // Path name does not start with `/`, Check if the aliases. + if let Some(aliases) = self.raw_find("/aliases") { + if let Some(full_path) = aliases.get_prop(path) { + // As spec 3.3 said, this prop value should be one string, + // which is a full path ref to a node. + let full_path = full_path.deserialize::(); + return self.raw_find(full_path.iter().next().unwrap()); + } + } + return None; + } + return self.raw_find(path); + } /// use depth-first search to traversal the tree, and exec func for each node pub fn search(&self, func: &mut F) @@ -51,12 +73,16 @@ mod tests { }; const RAW_DEVICE_TREE: &[u8] = include_bytes!("../../examples/hifive-unmatched-a00.dtb"); const BUFFER_SIZE: usize = RAW_DEVICE_TREE.len(); - #[repr(align(8))] - struct AlignedBuffer { - pub data: [u8; RAW_DEVICE_TREE.len()], - } + + const RAW_DEVICE_TREE_WITH_ALIASES: &[u8] = + include_bytes!("../../examples/cv1812cp_milkv_duo256m_sd.dtb"); + const BUFFER_SIZE_WITH_ALIASES: usize = RAW_DEVICE_TREE_WITH_ALIASES.len(); #[test] fn test_search() { + #[repr(align(8))] + struct AlignedBuffer { + pub data: [u8; RAW_DEVICE_TREE.len()], + } let mut aligned_data: Box = Box::new(AlignedBuffer { data: [0; BUFFER_SIZE], }); @@ -73,22 +99,31 @@ mod tests { } #[test] fn test_find() { + #[repr(align(8))] + struct AlignedBuffer { + pub data: [u8; RAW_DEVICE_TREE_WITH_ALIASES.len()], + } let mut aligned_data: Box = Box::new(AlignedBuffer { - data: [0; BUFFER_SIZE], + data: [0; BUFFER_SIZE_WITH_ALIASES], }); - aligned_data.data[..BUFFER_SIZE].clone_from_slice(RAW_DEVICE_TREE); + aligned_data.data[..BUFFER_SIZE_WITH_ALIASES] + .clone_from_slice(RAW_DEVICE_TREE_WITH_ALIASES); let mut slice = aligned_data.data.to_vec(); let ptr = DtbPtr::from_raw(slice.as_mut_ptr()).unwrap(); let dtb = Dtb::from(ptr).share(); let node: Node = from_raw_mut(&dtb).unwrap(); - let node = node.find("/chosen").unwrap(); - let result = node.props().find(|prop| prop.get_name() == "stdout-path"); + let chosen = node.find("/chosen").unwrap(); + let result = chosen.props().find(|prop| prop.get_name() == "stdout-path"); match result { Some(iter) => { - if iter.deserialize::().iter().next().unwrap() != "serial0" { + let stdout_path = String::from(iter.deserialize::().iter().next().unwrap()); + if stdout_path != "serial0" { panic!("wrong /chosen/stdout-path value"); } + if let None = node.find(&stdout_path) { + panic!("unable to find stdout-path node."); + } } None => panic!("failed to find /chosen/stdout-path"), } From 2f51fdf7fbe3ed394af41d83652c45f8acd51636 Mon Sep 17 00:00:00 2001 From: Woshiluo Luo Date: Sat, 7 Dec 2024 13:56:52 +0800 Subject: [PATCH 2/2] fix: use match in test_find Signed-off-by: Woshiluo Luo --- src/utils/mod.rs | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/utils/mod.rs b/src/utils/mod.rs index 82f8eda..6060e23 100644 --- a/src/utils/mod.rs +++ b/src/utils/mod.rs @@ -121,8 +121,9 @@ mod tests { if stdout_path != "serial0" { panic!("wrong /chosen/stdout-path value"); } - if let None = node.find(&stdout_path) { - panic!("unable to find stdout-path node."); + match node.find(&stdout_path) { + Some(_) => (), + None => panic!("unable to find stdout-path node."), } } None => panic!("failed to find /chosen/stdout-path"),