diff --git a/conf/machine/iot2050.conf b/conf/machine/iot2050.conf index df4cbc584..01460bca9 100644 --- a/conf/machine/iot2050.conf +++ b/conf/machine/iot2050.conf @@ -1,5 +1,5 @@ # -# Copyright (c) Siemens AG, 2019-2022 +# Copyright (c) Siemens AG, 2019-2023 # # Authors: # Le Jin @@ -21,6 +21,7 @@ DTB_FILES ?= " \ ti/k3-am6548-iot2050-advanced.dtb \ ti/k3-am6548-iot2050-advanced-pg2.dtb \ ti/k3-am6548-iot2050-advanced-m2.dtb \ + ti/k3-am6548-iot2050-advanced-sm.dtb \ " IMAGE_FSTYPES ?= "wic" diff --git a/recipes-bsp/u-boot/files/0001-Watchdog-Support-WDIOF_CARDRESET-on-TI-AM65x-platfor.patch b/recipes-bsp/u-boot/files/0001-Watchdog-Support-WDIOF_CARDRESET-on-TI-AM65x-platfor.patch deleted file mode 100644 index 169120a87..000000000 --- a/recipes-bsp/u-boot/files/0001-Watchdog-Support-WDIOF_CARDRESET-on-TI-AM65x-platfor.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Li Hua Qian -Date: Tue, 29 Aug 2023 11:46:21 +0800 -Subject: [PATCH] Watchdog: Support WDIOF_CARDRESET on TI AM65x platform - -To have the WDIOF_CARDRESET support for the TI AM65x platform watchdog, -this patch reserves some memories, which indicate if the current boot due -to a watchdog reset. - -Signed-off-by: Li Hua Qian ---- - arch/arm/dts/k3-am65-iot2050-common.dtsi | 11 +++++++++++ - 1 file changed, 11 insertions(+) - -diff --git a/arch/arm/dts/k3-am65-iot2050-common.dtsi b/arch/arm/dts/k3-am65-iot2050-common.dtsi -index 65da226847f..b6135b849f1 100644 ---- a/arch/arm/dts/k3-am65-iot2050-common.dtsi -+++ b/arch/arm/dts/k3-am65-iot2050-common.dtsi -@@ -64,6 +64,12 @@ - alignment = <0x1000>; - no-map; - }; -+ -+ /* To reserve the power-on(PON) reason for watchdog reset */ -+ wdt_reset_memory_region: wdt-memory@a2200000 { -+ reg = <0x00 0xa2200000 0x00 0x00001000>; -+ no-map; -+ }; - }; - - leds { -@@ -720,6 +726,11 @@ - mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>; - }; - -+&mcu_rti1 { -+ memory-region = <&wdt_reset_memory_region>; -+ -+}; -+ - &icssg0_mdio { - status = "disabled"; - }; diff --git a/recipes-bsp/u-boot/files/0002-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch b/recipes-bsp/u-boot/files/0001-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch similarity index 97% rename from recipes-bsp/u-boot/files/0002-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch rename to recipes-bsp/u-boot/files/0001-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch index 4c01c51f6..34430636f 100644 --- a/recipes-bsp/u-boot/files/0002-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch +++ b/recipes-bsp/u-boot/files/0001-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch @@ -12,7 +12,7 @@ Signed-off-by: Jan Kiszka 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/tools/iot2050-sign-fw.sh b/tools/iot2050-sign-fw.sh -index 6b426c854c2..75ffd560823 100755 +index 6b426c854c20..75ffd560823c 100755 --- a/tools/iot2050-sign-fw.sh +++ b/tools/iot2050-sign-fw.sh @@ -5,6 +5,8 @@ if [ -z "$1" ]; then diff --git a/recipes-bsp/u-boot/files/0003-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch b/recipes-bsp/u-boot/files/0002-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch similarity index 96% rename from recipes-bsp/u-boot/files/0003-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch rename to recipes-bsp/u-boot/files/0002-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch index 5154426ba..31dbc9197 100644 --- a/recipes-bsp/u-boot/files/0003-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch +++ b/recipes-bsp/u-boot/files/0002-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch @@ -13,7 +13,7 @@ Signed-off-by: Jan Kiszka 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c -index 15f5310c7bf..e35e55fb5de 100644 +index 15f5310c7bf3..e35e55fb5de8 100644 --- a/board/siemens/iot2050/board.c +++ b/board/siemens/iot2050/board.c @@ -160,7 +160,7 @@ static bool board_is_sr1(void) diff --git a/recipes-bsp/u-boot/files/0004-board-siemens-iot2050-Fix-M.2-detection.patch b/recipes-bsp/u-boot/files/0003-board-siemens-iot2050-Fix-M.2-detection.patch similarity index 98% rename from recipes-bsp/u-boot/files/0004-board-siemens-iot2050-Fix-M.2-detection.patch rename to recipes-bsp/u-boot/files/0003-board-siemens-iot2050-Fix-M.2-detection.patch index affdc245e..0d89364db 100644 --- a/recipes-bsp/u-boot/files/0004-board-siemens-iot2050-Fix-M.2-detection.patch +++ b/recipes-bsp/u-boot/files/0003-board-siemens-iot2050-Fix-M.2-detection.patch @@ -20,7 +20,7 @@ Signed-off-by: Jan Kiszka 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c -index e35e55fb5de..0b0686e2628 100644 +index e35e55fb5de8..0b0686e2628b 100644 --- a/board/siemens/iot2050/board.c +++ b/board/siemens/iot2050/board.c @@ -155,19 +155,20 @@ static bool board_is_advanced(void) diff --git a/recipes-bsp/u-boot/files/0005-iot2050-Allow-for-more-than-1-USB-storage-device.patch b/recipes-bsp/u-boot/files/0004-iot2050-Allow-for-more-than-1-USB-storage-device.patch similarity index 96% rename from recipes-bsp/u-boot/files/0005-iot2050-Allow-for-more-than-1-USB-storage-device.patch rename to recipes-bsp/u-boot/files/0004-iot2050-Allow-for-more-than-1-USB-storage-device.patch index 02ca5f471..91994f66a 100644 --- a/recipes-bsp/u-boot/files/0005-iot2050-Allow-for-more-than-1-USB-storage-device.patch +++ b/recipes-bsp/u-boot/files/0004-iot2050-Allow-for-more-than-1-USB-storage-device.patch @@ -14,7 +14,7 @@ Reviewed-by: Heinrich Schuchardt 1 file changed, 9 insertions(+) diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h -index 4968722d18f..94a9c767882 100644 +index 4968722d18f6..94a9c7678825 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -15,6 +15,15 @@ diff --git a/recipes-bsp/u-boot/files/0005-board-siemens-iot2050-Fix-coding-style.patch b/recipes-bsp/u-boot/files/0005-board-siemens-iot2050-Fix-coding-style.patch new file mode 100644 index 000000000..3a7ec4fac --- /dev/null +++ b/recipes-bsp/u-boot/files/0005-board-siemens-iot2050-Fix-coding-style.patch @@ -0,0 +1,25 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Fri, 1 Dec 2023 19:43:28 +0800 +Subject: [PATCH] board: siemens: iot2050: Fix coding style + +Add a space after the 'if' + +Signed-off-by: Baocheng Su +--- + board/siemens/iot2050/board.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c +index 0b0686e2628b..1fa71f8da6a4 100644 +--- a/board/siemens/iot2050/board.c ++++ b/board/siemens/iot2050/board.c +@@ -220,7 +220,7 @@ void set_board_info_env(void) + if (board_is_advanced()) { + if (board_is_pg1()) + fdtfile = "ti/k3-am6548-iot2050-advanced.dtb"; +- else if(board_is_m2()) ++ else if (board_is_m2()) + fdtfile = "ti/k3-am6548-iot2050-advanced-m2.dtb"; + else + fdtfile = "ti/k3-am6548-iot2050-advanced-pg2.dtb"; diff --git a/recipes-bsp/u-boot/files/0006-board-siemens-iot2050-Control-pcie-power-for-all-var.patch b/recipes-bsp/u-boot/files/0006-board-siemens-iot2050-Control-pcie-power-for-all-var.patch new file mode 100644 index 000000000..efc900256 --- /dev/null +++ b/recipes-bsp/u-boot/files/0006-board-siemens-iot2050-Control-pcie-power-for-all-var.patch @@ -0,0 +1,51 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Wed, 29 Nov 2023 23:01:48 +0800 +Subject: [PATCH] board: siemens: iot2050: Control pcie power for all variants + +The power control pin of pcie interface not only works for M.2 interface +but also for miniPCIE, so promote this logic to all variants to +workaround the module hang issue. + +Signed-off-by: Baocheng Su +--- + board/siemens/iot2050/board.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c +index 1fa71f8da6a4..b83d5f8669e8 100644 +--- a/board/siemens/iot2050/board.c ++++ b/board/siemens/iot2050/board.c +@@ -185,6 +185,12 @@ static void remove_mmc1_target(void) + free(boot_targets); + } + ++static void enable_pcie_connector_power(void) ++{ ++ set_pinvalue("gpio@601000_17", "P3V3_PCIE_CON_EN", 1); ++ udelay(4 * 100); ++} ++ + void set_board_info_env(void) + { + struct iot2050_info *info = IOT2050_INFO_DATA; +@@ -288,10 +294,6 @@ static void m2_connector_setup(void) + struct m2_config_pins config_pins; + unsigned int n; + +- /* enable M.2 connector power */ +- set_pinvalue("gpio@601000_17", "P3V3_M2_EN", 1); +- udelay(4 * 100); +- + if (m2_manual_config < CONNECTOR_MODE_INVALID) { + mode_info = " [manual mode]"; + connector_mode = m2_manual_config; +@@ -429,6 +431,8 @@ int board_late_init(void) + /* change CTRL_MMR register to let serdes0 not output USB3.0 signals. */ + writel(0x3, SERDES0_LANE_SELECT); + ++ enable_pcie_connector_power(); ++ + if (board_is_m2()) + m2_connector_setup(); + diff --git a/recipes-bsp/u-boot/files/0007-board-siemens-iot2050-Pass-DDR-size-from-FSBL.patch b/recipes-bsp/u-boot/files/0007-board-siemens-iot2050-Pass-DDR-size-from-FSBL.patch new file mode 100644 index 000000000..83376a124 --- /dev/null +++ b/recipes-bsp/u-boot/files/0007-board-siemens-iot2050-Pass-DDR-size-from-FSBL.patch @@ -0,0 +1,117 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Wed, 29 Nov 2023 23:16:15 +0800 +Subject: [PATCH] board: siemens: iot2050: Pass DDR size from FSBL + +Due to new DDR size introduction, the current logic of determining the +DDR size is not able to get the correct size. + +Instead, the DDR size is determined by the FSBL(SEBOOT) then passed to +u-boot through the scratchpad info. + +The SEBoot version must be >= D/V01.04.0x.0x to support this change. + +Also now for some variants, the DDR size may > 2GB, so borrow some code +from the TI evm to iot2050 to support more than 2GB DDR. + +Signed-off-by: Baocheng Su +--- + board/siemens/iot2050/board.c | 39 ++++++++++++++++++++++++++--------- + doc/board/siemens/iot2050.rst | 3 +++ + include/configs/iot2050.h | 3 +++ + 3 files changed, 35 insertions(+), 10 deletions(-) + +diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c +index b83d5f8669e8..d6228b9bd26b 100644 +--- a/board/siemens/iot2050/board.c ++++ b/board/siemens/iot2050/board.c +@@ -38,6 +38,8 @@ struct iot2050_info { + u8 mac_addr_cnt; + u8 mac_addr[8][ARP_HLEN]; + char seboot_version[40 + 1]; ++ u8 padding[3]; ++ u32 ddr_size_mb; + } __packed; + + /* +@@ -341,25 +343,42 @@ int board_init(void) + + int dram_init(void) + { +- if (board_is_advanced()) +- gd->ram_size = SZ_2G; +- else +- gd->ram_size = SZ_1G; ++ struct iot2050_info *info = IOT2050_INFO_DATA; ++ gd->ram_size = ((phys_size_t)(info->ddr_size_mb)) << 20; + + return 0; + } + ++ulong board_get_usable_ram_top(ulong total_size) ++{ ++ /* Limit RAM used by U-Boot to the DDR low region */ ++ if (gd->ram_top > 0x100000000) ++ return 0x100000000; ++ ++ return gd->ram_top; ++} ++ + int dram_init_banksize(void) + { + dram_init(); + +- /* Bank 0 declares the memory available in the DDR low region */ +- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; +- gd->bd->bi_dram[0].size = gd->ram_size; ++ if (gd->ram_size > SZ_2G) { ++ /* Bank 0 declares the memory available in the DDR low region */ ++ gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; ++ gd->bd->bi_dram[0].size = SZ_2G; ++ ++ /* Bank 1 declares the memory available in the DDR high region */ ++ gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1; ++ gd->bd->bi_dram[1].size = gd->ram_size - SZ_2G; ++ } else { ++ /* Bank 0 declares the memory available in the DDR low region */ ++ gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; ++ gd->bd->bi_dram[0].size = gd->ram_size; + +- /* Bank 1 declares the memory available in the DDR high region */ +- gd->bd->bi_dram[1].start = 0; +- gd->bd->bi_dram[1].size = 0; ++ /* Bank 1 declares the memory available in the DDR high region */ ++ gd->bd->bi_dram[1].start = 0; ++ gd->bd->bi_dram[1].size = 0; ++ } + + return 0; + } +diff --git a/doc/board/siemens/iot2050.rst b/doc/board/siemens/iot2050.rst +index ee3c5c958464..e88d25caf611 100644 +--- a/doc/board/siemens/iot2050.rst ++++ b/doc/board/siemens/iot2050.rst +@@ -29,6 +29,9 @@ The following binaries from that source need to be present in the build folder: + - seboot_pg1.bin + - seboot_pg2.bin + ++Note that SE-Boot D01.04.01.02/V01.04.01 or greater is required, otherwise the ++DDR size will not be picked up correctly by U-Boot. ++ + When using the watchdog, a related firmware for the R5 core(s) is needed, e.g. + https://github.com/siemens/k3-rti-wdt. The name and location of the image is + configured via CONFIG_WDT_K3_RTI_FW_FILE. +diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h +index 94a9c7678825..5e97ea0d9438 100644 +--- a/include/configs/iot2050.h ++++ b/include/configs/iot2050.h +@@ -24,6 +24,9 @@ + func(USB, usb, 2) + #endif + ++/* DDR Configuration */ ++#define CFG_SYS_SDRAM_BASE1 0x880000000 ++ + /* + * This defines all MMC devices, even if the basic variant has no mmc1. + * The non-supported device will be removed from the boot targets during diff --git a/recipes-bsp/u-boot/files/0008-board-siemens-iot2050-Generalize-the-fdt-fixup.patch b/recipes-bsp/u-boot/files/0008-board-siemens-iot2050-Generalize-the-fdt-fixup.patch new file mode 100644 index 000000000..8c1002ef1 --- /dev/null +++ b/recipes-bsp/u-boot/files/0008-board-siemens-iot2050-Generalize-the-fdt-fixup.patch @@ -0,0 +1,95 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Wed, 29 Nov 2023 23:29:12 +0800 +Subject: [PATCH] board: siemens: iot2050: Generalize the fdt fixup + +The fdt fixup logic actually also applies to other possible variants who +also have device tree overlays. So generalize this part by extracting +it from the m.2 specific function and make it a standalone one. + +Since now we only have M.2 variant consuming the overlay, it may not +have immediate effect for other variant, however this makes the future +variant more easier to apply fdt fixups. + +Signed-off-by: Baocheng Su +--- + board/siemens/iot2050/board.c | 32 +++++++++++++++++++------------- + 1 file changed, 19 insertions(+), 13 deletions(-) + +diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c +index d6228b9bd26b..32f5280125c0 100644 +--- a/board/siemens/iot2050/board.c ++++ b/board/siemens/iot2050/board.c +@@ -245,23 +245,14 @@ void set_board_info_env(void) + env_save(); + } + +-static void m2_overlay_prepare(void) ++static void do_overlay_prepare(const char *overlay_path) + { + #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +- const char *overlay_path; + void *overlay; + u64 loadaddr; + ofnode node; + int ret; + +- if (connector_mode == BKEY_PCIEX2) +- return; +- +- if (connector_mode == BKEY_PCIE_EKEY_PCIE) +- overlay_path = "/fit-images/bkey-ekey-pcie-overlay"; +- else +- overlay_path = "/fit-images/bkey-usb3-overlay"; +- + node = ofnode_path(overlay_path); + if (!ofnode_valid(node)) + goto fit_error; +@@ -288,6 +279,21 @@ fit_error: + #endif + } + ++static void m2_overlay_prepare(void) ++{ ++ const char *overlay_path; ++ ++ if (connector_mode == BKEY_PCIEX2) ++ return; ++ ++ if (connector_mode == BKEY_PCIE_EKEY_PCIE) ++ overlay_path = "/fit-images/bkey-ekey-pcie-overlay"; ++ else ++ overlay_path = "/fit-images/bkey-usb3-overlay"; ++ ++ do_overlay_prepare(overlay_path); ++} ++ + static void m2_connector_setup(void) + { + ulong m2_manual_config = env_get_ulong("m2_manual_config", 10, +@@ -466,7 +472,7 @@ int board_late_init(void) + } + + #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +-static void m2_fdt_fixup(void *blob) ++static void variants_fdt_fixup(void *blob) + { + void *overlay_copy = NULL; + void *fdt_copy = NULL; +@@ -506,14 +512,14 @@ cleanup: + return; + + fixup_error: +- pr_err("Could not apply M.2 device tree overlay\n"); ++ pr_err("Could not apply device tree overlay\n"); + goto cleanup; + } + + int ft_board_setup(void *blob, struct bd_info *bd) + { + if (board_is_m2()) +- m2_fdt_fixup(blob); ++ variants_fdt_fixup(blob); + + return 0; + } diff --git a/recipes-bsp/u-boot/files/0009-dts-iot2050-Sync-kernel-dts-to-u-boot.patch b/recipes-bsp/u-boot/files/0009-dts-iot2050-Sync-kernel-dts-to-u-boot.patch new file mode 100644 index 000000000..640c2ad08 --- /dev/null +++ b/recipes-bsp/u-boot/files/0009-dts-iot2050-Sync-kernel-dts-to-u-boot.patch @@ -0,0 +1,1463 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Li Hua Qian +Date: Tue, 29 Aug 2023 11:46:21 +0800 +Subject: [PATCH] dts: iot2050: Sync kernel dts to u-boot + +Signed-off-by: Su Baocheng +--- + .../k3-am65-iot2050-arduino-connector.dtsi | 768 ++++++++++++++++++ + arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi | 13 +- + arch/arm/dts/k3-am65-iot2050-common.dtsi | 248 ++---- + arch/arm/dts/k3-am65-iot2050-spl.dts | 1 + + .../dts/k3-am6528-iot2050-basic-common.dtsi | 8 +- + arch/arm/dts/k3-am6528-iot2050-basic.dts | 5 + + .../k3-am6548-iot2050-advanced-common.dtsi | 2 +- + .../arm/dts/k3-am6548-iot2050-advanced-m2.dts | 36 +- + .../dts/k3-am6548-iot2050-advanced-pg2.dts | 8 +- + arch/arm/dts/k3-am6548-iot2050-advanced.dts | 1 + + 10 files changed, 859 insertions(+), 231 deletions(-) + create mode 100644 arch/arm/dts/k3-am65-iot2050-arduino-connector.dtsi + +diff --git a/arch/arm/dts/k3-am65-iot2050-arduino-connector.dtsi b/arch/arm/dts/k3-am65-iot2050-arduino-connector.dtsi +new file mode 100644 +index 000000000000..cd86f412b837 +--- /dev/null ++++ b/arch/arm/dts/k3-am65-iot2050-arduino-connector.dtsi +@@ -0,0 +1,768 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) Siemens AG, 2018-2023 ++ * ++ * Authors: ++ * Le Jin ++ * Jan Kiszka ++ * ++ * Common bits for IOT2050 variants with Arduino connector ++ */ ++ ++&wkup_pmx0 { ++ pinctrl-names = ++ "default", ++ "d0-uart0-rxd", "d0-gpio", "d0-gpio-pullup", "d0-gpio-pulldown", ++ "d1-uart0-txd", "d1-gpio", "d1-gpio-pullup", "d1-gpio-pulldown", ++ "d2-uart0-ctsn", "d2-gpio", "d2-gpio-pullup", "d2-gpio-pulldown", ++ "d3-uart0-rtsn", "d3-gpio", "d3-gpio-pullup", "d3-gpio-pulldown", ++ "d10-spi0-cs0", "d10-gpio", "d10-gpio-pullup", "d10-gpio-pulldown", ++ "d11-spi0-d0", "d11-gpio", "d11-gpio-pullup", "d11-gpio-pulldown", ++ "d12-spi0-d1", "d12-gpio", "d12-gpio-pullup", "d12-gpio-pulldown", ++ "d13-spi0-clk", "d13-gpio", "d13-gpio-pullup", "d13-gpio-pulldown", ++ "a0-gpio", "a0-gpio-pullup", "a0-gpio-pulldown", ++ "a1-gpio", "a1-gpio-pullup", "a1-gpio-pulldown", ++ "a2-gpio", "a2-gpio-pullup", "a2-gpio-pulldown", ++ "a3-gpio", "a3-gpio-pullup", "a3-gpio-pulldown", ++ "a4-gpio", "a4-gpio-pullup", "a4-gpio-pulldown", ++ "a5-gpio", "a5-gpio-pullup", "a5-gpio-pulldown"; ++ ++ pinctrl-0 = <&d0_uart0_rxd>; ++ pinctrl-1 = <&d0_uart0_rxd>; ++ pinctrl-2 = <&d0_gpio>; ++ pinctrl-3 = <&d0_gpio_pullup>; ++ pinctrl-4 = <&d0_gpio_pulldown>; ++ pinctrl-5 = <&d1_uart0_txd>; ++ pinctrl-6 = <&d1_gpio>; ++ pinctrl-7 = <&d1_gpio_pullup>; ++ pinctrl-8 = <&d1_gpio_pulldown>; ++ pinctrl-9 = <&d2_uart0_ctsn>; ++ pinctrl-10 = <&d2_gpio>; ++ pinctrl-11 = <&d2_gpio_pullup>; ++ pinctrl-12 = <&d2_gpio_pulldown>; ++ pinctrl-13 = <&d3_uart0_rtsn>; ++ pinctrl-14 = <&d3_gpio>; ++ pinctrl-15 = <&d3_gpio_pullup>; ++ pinctrl-16 = <&d3_gpio_pulldown>; ++ pinctrl-17 = <&d10_spi0_cs0>; ++ pinctrl-18 = <&d10_gpio>; ++ pinctrl-19 = <&d10_gpio_pullup>; ++ pinctrl-20 = <&d10_gpio_pulldown>; ++ pinctrl-21 = <&d11_spi0_d0>; ++ pinctrl-22 = <&d11_gpio>; ++ pinctrl-23 = <&d11_gpio_pullup>; ++ pinctrl-24 = <&d11_gpio_pulldown>; ++ pinctrl-25 = <&d12_spi0_d1>; ++ pinctrl-26 = <&d12_gpio>; ++ pinctrl-27 = <&d12_gpio_pullup>; ++ pinctrl-28 = <&d12_gpio_pulldown>; ++ pinctrl-29 = <&d13_spi0_clk>; ++ pinctrl-30 = <&d13_gpio>; ++ pinctrl-31 = <&d13_gpio_pullup>; ++ pinctrl-32 = <&d13_gpio_pulldown>; ++ pinctrl-33 = <&a0_gpio>; ++ pinctrl-34 = <&a0_gpio_pullup>; ++ pinctrl-35 = <&a0_gpio_pulldown>; ++ pinctrl-36 = <&a1_gpio>; ++ pinctrl-37 = <&a1_gpio_pullup>; ++ pinctrl-38 = <&a1_gpio_pulldown>; ++ pinctrl-39 = <&a2_gpio>; ++ pinctrl-40 = <&a2_gpio_pullup>; ++ pinctrl-41 = <&a2_gpio_pulldown>; ++ pinctrl-42 = <&a3_gpio>; ++ pinctrl-43 = <&a3_gpio_pullup>; ++ pinctrl-44 = <&a3_gpio_pulldown>; ++ pinctrl-45 = <&a4_gpio>; ++ pinctrl-46 = <&a4_gpio_pullup>; ++ pinctrl-47 = <&a4_gpio_pulldown>; ++ pinctrl-48 = <&a5_gpio>; ++ pinctrl-49 = <&a5_gpio_pullup>; ++ pinctrl-50 = <&a5_gpio_pulldown>; ++ ++ d0_uart0_rxd: d0-uart0-rxd-pins { ++ pinctrl-single,pins = < ++ /* (P4) MCU_UART0_RXD */ ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) ++ >; ++ }; ++ ++ d0_gpio: d0-gpio-pins { ++ pinctrl-single,pins = < ++ /* (P4) WKUP_GPIO0_29 */ ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d0_gpio_pullup: d0-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (P4) WKUP_GPIO0_29 */ ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d0_gpio_pulldown: d0-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (P4) WKUP_GPIO0_29 */ ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d1_uart0_txd: d1-uart0-txd-pins { ++ pinctrl-single,pins = < ++ /* (P5) MCU_UART0_TXD */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) ++ >; ++ }; ++ ++ d1_gpio: d1-gpio-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_30 */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d1_gpio_pullup: d1-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_30 */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d1_gpio_pulldown: d1-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_30 */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d2_uart0_ctsn: d2-uart0-ctsn-pins { ++ pinctrl-single,pins = < ++ /* (P1) MCU_UART0_CTSn */ ++ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) ++ >; ++ }; ++ ++ d2_gpio: d2-gpio-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_31 */ ++ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d2_gpio_pullup: d2-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_31 */ ++ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d2_gpio_pulldown: d2-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_31 */ ++ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d3_uart0_rtsn: d3-uart0-rtsn-pins { ++ pinctrl-single,pins = < ++ /* (N3) MCU_UART0_RTSn */ ++ AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) ++ >; ++ }; ++ ++ d3_gpio: d3-gpio-pins { ++ pinctrl-single,pins = < ++ /* (N3) WKUP_GPIO0_33 */ ++ AM65X_WKUP_IOPAD(0x0054, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d3_gpio_pullup: d3-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (N3) WKUP_GPIO0_33 */ ++ AM65X_WKUP_IOPAD(0x0054, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d3_gpio_pulldown: d3-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (N3) WKUP_GPIO0_33 */ ++ AM65X_WKUP_IOPAD(0x0054, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d10_spi0_cs0: d10-spi0-cs0-pins { ++ pinctrl-single,pins = < ++ /* (Y4) MCU_SPI0_CS0 */ ++ AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) ++ >; ++ }; ++ ++ d10_gpio: d10-gpio-pins { ++ pinctrl-single,pins = < ++ /* (Y4) WKUP_GPIO0_51 */ ++ AM65X_WKUP_IOPAD(0x009c, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d10_gpio_pullup: d10-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (Y4) WKUP_GPIO0_51 */ ++ AM65X_WKUP_IOPAD(0x009c, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d10_gpio_pulldown: d10-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (Y4) WKUP_GPIO0_51 */ ++ AM65X_WKUP_IOPAD(0x009c, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d11_spi0_d0: d11-spi0-d0-pins { ++ pinctrl-single,pins = < ++ /* (Y3) MCU_SPI0_D0 */ ++ AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 0) ++ >; ++ }; ++ ++ d11_gpio: d11-gpio-pins { ++ pinctrl-single,pins = < ++ /* (Y3) WKUP_GPIO0_49 */ ++ AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d11_gpio_pullup: d11-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (Y3) WKUP_GPIO0_49 */ ++ AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d11_gpio_pulldown: d11-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (Y3) WKUP_GPIO0_49 */ ++ AM65X_WKUP_IOPAD(0x0094, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d12_spi0_d1: d12-spi0-d1-pins { ++ pinctrl-single,pins = < ++ /* (Y2) MCU_SPI0_D1 */ ++ AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 0) ++ >; ++ }; ++ ++ d12_gpio: d12-gpio-pins { ++ pinctrl-single,pins = < ++ /* (Y2) WKUP_GPIO0_50 */ ++ AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d12_gpio_pullup: d12-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (Y2) WKUP_GPIO0_50 */ ++ AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d12_gpio_pulldown: d12-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (Y2) WKUP_GPIO0_50 */ ++ AM65X_WKUP_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d13_spi0_clk: d13-spi0-clk-pins { ++ pinctrl-single,pins = < ++ /* (Y1) MCU_SPI0_CLK */ ++ AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 0) ++ >; ++ }; ++ ++ d13_gpio: d13-gpio-pins { ++ pinctrl-single,pins = < ++ /* (Y1) WKUP_GPIO0_48 */ ++ AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d13_gpio_pullup: d13-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (Y1) WKUP_GPIO0_48 */ ++ AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d13_gpio_pulldown: d13-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (Y1) WKUP_GPIO0_48 */ ++ AM65X_WKUP_IOPAD(0x0090, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a0_gpio: a0-gpio-pins { ++ pinctrl-single,pins = < ++ /* (L6) WKUP_GPIO0_45 */ ++ AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a0_gpio_pullup: a0-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (L6) WKUP_GPIO0_45 */ ++ AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a0_gpio_pulldown: a0-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (L6) WKUP_GPIO0_45 */ ++ AM65X_WKUP_IOPAD(0x0084, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a1_gpio: a1-gpio-pins { ++ pinctrl-single,pins = < ++ /* (M6) WKUP_GPIO0_44 */ ++ AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a1_gpio_pullup: a1-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (M6) WKUP_GPIO0_44 */ ++ AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a1_gpio_pulldown: a1-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (M6) WKUP_GPIO0_44 */ ++ AM65X_WKUP_IOPAD(0x0080, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a2_gpio: a2-gpio-pins { ++ pinctrl-single,pins = < ++ /* (L5) WKUP_GPIO0_43 */ ++ AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a2_gpio_pullup: a2-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (L5) WKUP_GPIO0_43 */ ++ AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a2_gpio_pulldown: a2-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (L5) WKUP_GPIO0_43 */ ++ AM65X_WKUP_IOPAD(0x007C, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a3_gpio: a3-gpio-pins { ++ pinctrl-single,pins = < ++ /* (M5) WKUP_GPIO0_39 */ ++ AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a3_gpio_pullup: a3-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (M5) WKUP_GPIO0_39 */ ++ AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a3_gpio_pulldown: a3-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (M5) WKUP_GPIO0_39 */ ++ AM65X_WKUP_IOPAD(0x006C, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a4_gpio: a4-gpio-pins { ++ pinctrl-single,pins = < ++ /* (L2) WKUP_GPIO0_42 */ ++ AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a4_gpio_pullup: a4-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (L2) WKUP_GPIO0_42 */ ++ AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a4_gpio_pulldown: a4-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (L2) WKUP_GPIO0_42 */ ++ AM65X_WKUP_IOPAD(0x0078, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a5_gpio: a5-gpio-pins { ++ pinctrl-single,pins = < ++ /* (N5) WKUP_GPIO0_35 */ ++ AM65X_WKUP_IOPAD(0x005C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a5_gpio_pullup: a5-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (N5) WKUP_GPIO0_35 */ ++ AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ a5_gpio_pulldown: a5-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (N5) WKUP_GPIO0_35 */ ++ AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ wkup_i2c0_pins_default: wkup-i2c0-default-pins { ++ pinctrl-single,pins = < ++ /* (AC7) WKUP_I2C0_SCL */ ++ AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) ++ /* (AD6) WKUP_I2C0_SDA */ ++ AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) ++ >; ++ }; ++ ++ arduino_i2c_aio_switch_pins_default: arduino-i2c-aio-switch-default-pins { ++ pinctrl-single,pins = < ++ /* (R2) WKUP_GPIO0_21 */ ++ AM65X_WKUP_IOPAD(0x0024, PIN_OUTPUT, 7) ++ >; ++ }; ++ ++ arduino_io_oe_pins_default: arduino-io-oe-default-pins { ++ pinctrl-single,pins = < ++ /* (N4) WKUP_GPIO0_34 */ ++ AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 7) ++ /* (M2) WKUP_GPIO0_36 */ ++ AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 7) ++ /* (M3) WKUP_GPIO0_37 */ ++ AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 7) ++ /* (M4) WKUP_GPIO0_38 */ ++ AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 7) ++ /* (M1) WKUP_GPIO0_41 */ ++ AM65X_WKUP_IOPAD(0x0074, PIN_OUTPUT, 7) ++ >; ++ }; ++}; ++ ++&main_pmx0 { ++ pinctrl-names = ++ "default", ++ "d4-ehrpwm0-a", "d4-gpio", "d4-gpio-pullup", "d4-gpio-pulldown", ++ "d5-ehrpwm1-a", "d5-gpio", "d5-gpio-pullup", "d5-gpio-pulldown", ++ "d6-ehrpwm2-a", "d6-gpio", "d6-gpio-pullup", "d6-gpio-pulldown", ++ "d7-ehrpwm3-a", "d7-gpio", "d7-gpio-pullup", "d7-gpio-pulldown", ++ "d8-ehrpwm4-a", "d8-gpio", "d8-gpio-pullup", "d8-gpio-pulldown", ++ "d9-ehrpwm5-a", "d9-gpio", "d9-gpio-pullup", "d9-gpio-pulldown"; ++ ++ pinctrl-0 = <&d4_ehrpwm0_a>; ++ pinctrl-1 = <&d4_ehrpwm0_a>; ++ pinctrl-2 = <&d4_gpio>; ++ pinctrl-3 = <&d4_gpio_pullup>; ++ pinctrl-4 = <&d4_gpio_pulldown>; ++ ++ pinctrl-5 = <&d5_ehrpwm1_a>; ++ pinctrl-6 = <&d5_gpio>; ++ pinctrl-7 = <&d5_gpio_pullup>; ++ pinctrl-8 = <&d5_gpio_pulldown>; ++ ++ pinctrl-9 = <&d6_ehrpwm2_a>; ++ pinctrl-10 = <&d6_gpio>; ++ pinctrl-11 = <&d6_gpio_pullup>; ++ pinctrl-12 = <&d6_gpio_pulldown>; ++ ++ pinctrl-13 = <&d7_ehrpwm3_a>; ++ pinctrl-14 = <&d7_gpio>; ++ pinctrl-15 = <&d7_gpio_pullup>; ++ pinctrl-16 = <&d7_gpio_pulldown>; ++ ++ pinctrl-17 = <&d8_ehrpwm4_a>; ++ pinctrl-18 = <&d8_gpio>; ++ pinctrl-19 = <&d8_gpio_pullup>; ++ pinctrl-20 = <&d8_gpio_pulldown>; ++ ++ pinctrl-21 = <&d9_ehrpwm5_a>; ++ pinctrl-22 = <&d9_gpio>; ++ pinctrl-23 = <&d9_gpio_pullup>; ++ pinctrl-24 = <&d9_gpio_pulldown>; ++ ++ d4_ehrpwm0_a: d4-ehrpwm0-a-pins { ++ pinctrl-single,pins = < ++ /* (AG18) EHRPWM0_A */ ++ AM65X_IOPAD(0x0084, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d4_gpio: d4-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AG18) GPIO0_33 */ ++ AM65X_IOPAD(0x0084, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d4_gpio_pullup: d4-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AG18) GPIO0_33 */ ++ AM65X_IOPAD(0x0084, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d4_gpio_pulldown: d4-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AG18) GPIO0_33 */ ++ AM65X_IOPAD(0x0084, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d5_ehrpwm1_a: d5-ehrpwm1-a-pins { ++ pinctrl-single,pins = < ++ /* (AF17) EHRPWM1_A */ ++ AM65X_IOPAD(0x008C, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d5_gpio: d5-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AF17) GPIO0_35 */ ++ AM65X_IOPAD(0x008C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d5_gpio_pullup: d5-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AF17) GPIO0_35 */ ++ AM65X_IOPAD(0x008C, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d5_gpio_pulldown: d5-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AF17) GPIO0_35 */ ++ AM65X_IOPAD(0x008C, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d6_ehrpwm2_a: d6-ehrpwm2-a-pins { ++ pinctrl-single,pins = < ++ /* (AH16) EHRPWM2_A */ ++ AM65X_IOPAD(0x0098, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d6_gpio: d6-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AH16) GPIO0_38 */ ++ AM65X_IOPAD(0x0098, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d6_gpio_pullup: d6-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AH16) GPIO0_38 */ ++ AM65X_IOPAD(0x0098, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d6_gpio_pulldown: d6-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AH16) GPIO0_38 */ ++ AM65X_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d7_ehrpwm3_a: d7-ehrpwm3-a-pins { ++ pinctrl-single,pins = < ++ /* (AH15) EHRPWM3_A */ ++ AM65X_IOPAD(0x00AC, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d7_gpio: d7-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AH15) GPIO0_43 */ ++ AM65X_IOPAD(0x00AC, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d7_gpio_pullup: d7-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AH15) GPIO0_43 */ ++ AM65X_IOPAD(0x00AC, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d7_gpio_pulldown: d7-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AH15) GPIO0_43 */ ++ AM65X_IOPAD(0x00AC, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d8_ehrpwm4_a: d8-ehrpwm4-a-pins { ++ pinctrl-single,pins = < ++ /* (AG15) EHRPWM4_A */ ++ AM65X_IOPAD(0x00C0, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d8_gpio: d8-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AG15) GPIO0_48 */ ++ AM65X_IOPAD(0x00C0, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d8_gpio_pullup: d8-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AG15) GPIO0_48 */ ++ AM65X_IOPAD(0x00C0, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d8_gpio_pulldown: d8-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AG15) GPIO0_48 */ ++ AM65X_IOPAD(0x00C0, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d9_ehrpwm5_a: d9-ehrpwm5-a-pins { ++ pinctrl-single,pins = < ++ /* (AD15) EHRPWM5_A */ ++ AM65X_IOPAD(0x00CC, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d9_gpio: d9-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AD15) GPIO0_51 */ ++ AM65X_IOPAD(0x00CC, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d9_gpio_pullup: d9-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AD15) GPIO0_51 */ ++ AM65X_IOPAD(0x00CC, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d9_gpio_pulldown: d9-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AD15) GPIO0_51 */ ++ AM65X_IOPAD(0x00CC, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++}; ++ ++&main_gpio0 { ++ gpio-line-names = ++ "main_gpio0-base", "", "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", "", "", ++ "", "", "", "IO4", "", "IO5", "", "", "IO6", "", ++ "", "", "", "IO7", "", "", "", "", "IO8", "", ++ "", "IO9"; ++}; ++ ++&wkup_gpio0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = ++ <&arduino_i2c_aio_switch_pins_default>, ++ <&arduino_io_oe_pins_default>, ++ <&push_button_pins_default>, ++ <&db9_com_mode_pins_default>; ++ gpio-line-names = ++ /* 0..9 */ ++ "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0", ++ "UART0-enable", "UART0-terminate", "", "WIFI-disable", ++ /* 10..19 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 20..29 */ ++ "", "A4A5-I2C-mux", "", "", "", "USER-button", "", "", "","IO0", ++ /* 30..39 */ ++ "IO1", "IO2", "", "IO3", "IO17-direction", "A5", ++ "IO16-direction", "IO15-direction", "IO14-direction", "A3", ++ /* 40..49 */ ++ "", "IO18-direction", "A4", "A2", "A1", "A0", "", "", "IO13", ++ "IO11", ++ /* 50..51 */ ++ "IO12", "IO10"; ++}; ++ ++&wkup_i2c0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wkup_i2c0_pins_default>; ++ clock-frequency = <400000>; ++}; ++ ++&mcu_i2c0 { ++ /* D4200 */ ++ pcal9535_1: gpio@20 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x20>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ gpio-line-names = ++ "A0-pull", "A1-pull", "A2-pull", "A3-pull", "A4-pull", ++ "A5-pull", "", "", ++ "IO14-enable", "IO15-enable", "IO16-enable", ++ "IO17-enable", "IO18-enable", "IO19-enable"; ++ }; ++ ++ /* D4201 */ ++ pcal9535_2: gpio@21 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x21>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ gpio-line-names = ++ "IO0-direction", "IO1-direction", "IO2-direction", ++ "IO3-direction", "IO4-direction", "IO5-direction", ++ "IO6-direction", "IO7-direction", ++ "IO8-direction", "IO9-direction", "IO10-direction", ++ "IO11-direction", "IO12-direction", "IO13-direction", ++ "IO19-direction"; ++ }; ++ ++ /* D4202 */ ++ pcal9535_3: gpio@25 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x25>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ gpio-line-names = ++ "IO0-pull", "IO1-pull", "IO2-pull", "IO3-pull", ++ "IO4-pull", "IO5-pull", "IO6-pull", "IO7-pull", ++ "IO8-pull", "IO9-pull", "IO10-pull", "IO11-pull", ++ "IO12-pull", "IO13-pull"; ++ }; ++}; ++ ++&mcu_uart0 { ++ status = "okay"; ++}; ++ ++&tscadc1 { ++ status = "okay"; ++ adc { ++ ti,adc-channels = <0 1 2 3 4 5>; ++ }; ++}; +diff --git a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi +index e73458ca6900..42adb8815f38 100644 +--- a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi ++++ b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) Siemens AG, 2021 ++ * Copyright (c) Siemens AG, 2021-2023 + * + * Authors: + * Chao Zeng +@@ -9,8 +9,13 @@ + * Common bits of the IOT2050 Basic and Advanced variants, PG2 + */ + ++&mcu_r5fss0 { ++ /* lock-step mode not supported on PG2 boards */ ++ ti,cluster-mode = <0>; ++}; ++ + &main_pmx0 { +- cp2102n_reset_pin_default: cp2102n-reset-pin-default { ++ cp2102n_reset_pin_default: cp2102n-reset-default-pins { + pinctrl-single,pins = < + /* (AF12) GPIO1_24, used as cp2102 reset */ + AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7) +@@ -20,7 +25,9 @@ + + &main_gpio1 { + pinctrl-names = "default"; +- pinctrl-0 = <&cp2102n_reset_pin_default>; ++ pinctrl-0 = ++ <&main_pcie_enable_pins_default>, ++ <&cp2102n_reset_pin_default>; + gpio-line-names = + "", "", "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", "", "", +diff --git a/arch/arm/dts/k3-am65-iot2050-common.dtsi b/arch/arm/dts/k3-am65-iot2050-common.dtsi +index 65da226847f4..279d97a16c7a 100644 +--- a/arch/arm/dts/k3-am65-iot2050-common.dtsi ++++ b/arch/arm/dts/k3-am65-iot2050-common.dtsi +@@ -21,7 +21,6 @@ + + chosen { + stdout-path = "serial3:115200n8"; +- bootargs = "earlycon=ns16550a,mmio32,0x02810000"; + }; + + reserved-memory { +@@ -64,6 +63,12 @@ + alignment = <0x1000>; + no-map; + }; ++ ++ /* To reserve the power-on(PON) reason for watchdog reset */ ++ wdt_reset_memory_region: wdt-memory@a2200000 { ++ reg = <0x00 0xa2200000 0x00 0x1000>; ++ no-map; ++ }; + }; + + leds { +@@ -105,16 +110,7 @@ + }; + + &wkup_pmx0 { +- wkup_i2c0_pins_default: wkup-i2c0-pins-default { +- pinctrl-single,pins = < +- /* (AC7) WKUP_I2C0_SCL */ +- AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) +- /* (AD6) WKUP_I2C0_SDA */ +- AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) +- >; +- }; +- +- mcu_i2c0_pins_default: mcu-i2c0-pins-default { ++ mcu_i2c0_pins_default: mcu-i2c0-default-pins { + pinctrl-single,pins = < + /* (AD8) MCU_I2C0_SCL */ + AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0) +@@ -123,54 +119,14 @@ + >; + }; + +- arduino_i2c_aio_switch_pins_default: arduino-i2c-aio-switch-pins-default { +- pinctrl-single,pins = < +- /* (R2) WKUP_GPIO0_21 */ +- AM65X_WKUP_IOPAD(0x0024, PIN_OUTPUT, 7) +- >; +- }; +- +- push_button_pins_default: push-button-pins-default { ++ push_button_pins_default: push-button-default-pins { + pinctrl-single,pins = < + /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */ + AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) + >; + }; + +- arduino_uart_pins_default: arduino-uart-pins-default { +- pinctrl-single,pins = < +- /* (P4) MCU_UART0_RXD */ +- AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) +- /* (P5) MCU_UART0_TXD */ +- AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) +- >; +- }; +- +- arduino_io_d2_to_d3_pins_default: arduino-io-d2-to-d3-pins-default { +- pinctrl-single,pins = < +- /* (P1) WKUP_GPIO0_31 */ +- AM65X_WKUP_IOPAD(0x004C, PIN_OUTPUT, 7) +- /* (N3) WKUP_GPIO0_33 */ +- AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 7) +- >; +- }; +- +- arduino_io_oe_pins_default: arduino-io-oe-pins-default { +- pinctrl-single,pins = < +- /* (N4) WKUP_GPIO0_34 */ +- AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 7) +- /* (M2) WKUP_GPIO0_36 */ +- AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 7) +- /* (M3) WKUP_GPIO0_37 */ +- AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 7) +- /* (M4) WKUP_GPIO0_38 */ +- AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 7) +- /* (M1) WKUP_GPIO0_41 */ +- AM65X_WKUP_IOPAD(0x0074, PIN_OUTPUT, 7) +- >; +- }; +- +- mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { ++ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { + pinctrl-single,pins = < + /* (V1) MCU_OSPI0_CLK */ + AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) +@@ -185,7 +141,7 @@ + >; + }; + +- db9_com_mode_pins_default: db9-com-mode-pins-default { ++ db9_com_mode_pins_default: db9-com-mode-default-pins { + pinctrl-single,pins = < + /* (AD3) WKUP_GPIO0_5, used as uart0 mode 0 */ + AM65X_WKUP_IOPAD(0x00c4, PIN_OUTPUT, 7) +@@ -198,7 +154,7 @@ + >; + }; + +- leds_pins_default: leds-pins-default { ++ leds_pins_default: leds-default-pins { + pinctrl-single,pins = < + /* (T2) WKUP_GPIO0_17, used as user led1 red */ + AM65X_WKUP_IOPAD(0x0014, PIN_OUTPUT, 7) +@@ -211,7 +167,7 @@ + >; + }; + +- mcu_spi0_pins_default: mcu-spi0-pins-default { ++ mcu_spi0_pins_default: mcu-spi0-default-pins { + pinctrl-single,pins = < + /* (Y1) MCU_SPI0_CLK */ + AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 0) +@@ -224,7 +180,7 @@ + >; + }; + +- minipcie_pins_default: minipcie-pins-default { ++ minipcie_pins_default: minipcie-default-pins { + pinctrl-single,pins = < + /* (P2) MCU_OSPI1_DQS.WKUP_GPIO0_27 */ + AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7) +@@ -233,7 +189,13 @@ + }; + + &main_pmx0 { +- main_uart1_pins_default: main-uart1-pins-default { ++ main_pcie_enable_pins_default: main-pcie-enable-default-pins { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */ ++ >; ++ }; ++ ++ main_uart1_pins_default: main-uart1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) UART1_RXD */ + AM65X_IOPAD(0x014c, PIN_OUTPUT, 6) /* (AD23) UART1_TXD */ +@@ -242,14 +204,14 @@ + >; + }; + +- main_i2c3_pins_default: main-i2c3-pins-default { ++ main_i2c3_pins_default: main-i2c3-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01c0, PIN_INPUT, 2) /* (AF13) I2C3_SCL */ + AM65X_IOPAD(0x01d4, PIN_INPUT, 2) /* (AG12) I2C3_SDA */ + >; + }; + +- main_mmc1_pins_default: main-mmc1-pins-default { ++ main_mmc1_pins_default: main-mmc1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */ + AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */ +@@ -262,30 +224,19 @@ + >; + }; + +- usb0_pins_default: usb0-pins-default { ++ usb0_pins_default: usb0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ + >; + }; + +- usb1_pins_default: usb1-pins-default { ++ usb1_pins_default: usb1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ + >; + }; + +- arduino_io_d4_to_d9_pins_default: arduino-io-d4-to-d9-pins-default { +- pinctrl-single,pins = < +- AM65X_IOPAD(0x0084, PIN_OUTPUT, 7) /* (AG18) GPIO0_33 */ +- AM65X_IOPAD(0x008C, PIN_OUTPUT, 7) /* (AF17) GPIO0_35 */ +- AM65X_IOPAD(0x0098, PIN_OUTPUT, 7) /* (AH16) GPIO0_38 */ +- AM65X_IOPAD(0x00AC, PIN_OUTPUT, 7) /* (AH15) GPIO0_43 */ +- AM65X_IOPAD(0x00C0, PIN_OUTPUT, 7) /* (AG15) GPIO0_48 */ +- AM65X_IOPAD(0x00CC, PIN_OUTPUT, 7) /* (AD15) GPIO0_51 */ +- >; +- }; +- +- dss_vout1_pins_default: dss-vout1-pins-default { ++ dss_vout1_pins_default: dss-vout1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0000, PIN_OUTPUT, 1) /* VOUT1_DATA0 */ + AM65X_IOPAD(0x0004, PIN_OUTPUT, 1) /* VOUT1_DATA1 */ +@@ -318,13 +269,13 @@ + >; + }; + +- dp_pins_default: dp-pins-default { ++ dp_pins_default: dp-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0078, PIN_OUTPUT, 7) /* (AF18) DP rst_n */ + >; + }; + +- main_i2c2_pins_default: main-i2c2-pins-default { ++ main_i2c2_pins_default: main-i2c2-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) I2C2_SCL */ + AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) I2C2_SDA */ +@@ -333,25 +284,19 @@ + }; + + &main_pmx1 { +- main_i2c0_pins_default: main-i2c0-pins-default { ++ main_i2c0_pins_default: main-i2c0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ + AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ + >; + }; + +- main_i2c1_pins_default: main-i2c1-pins-default { ++ main_i2c1_pins_default: main-i2c1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ + AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ + >; + }; +- +- ecap0_pins_default: ecap0-pins-default { +- pinctrl-single,pins = < +- AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */ +- >; +- }; + }; + + &wkup_uart0 { +@@ -368,54 +313,9 @@ + status = "disabled"; + }; + +-&mcu_uart0 { ++&main_gpio1 { + pinctrl-names = "default"; +- pinctrl-0 = <&arduino_uart_pins_default>; +-}; +- +-&main_gpio0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&arduino_io_d4_to_d9_pins_default>; +- gpio-line-names = +- "main_gpio0-base", "", "", "", "", "", "", "", "", "", +- "", "", "", "", "", "", "", "", "", "", +- "", "", "", "", "", "", "", "", "", "", +- "", "", "", "IO4", "", "IO5", "", "", "IO6", "", +- "", "", "", "IO7", "", "", "", "", "IO8", "", +- "", "IO9"; +-}; +- +-&wkup_gpio0 { +- pinctrl-names = "default"; +- pinctrl-0 = < +- &arduino_io_d2_to_d3_pins_default +- &arduino_i2c_aio_switch_pins_default +- &arduino_io_oe_pins_default +- &push_button_pins_default +- &db9_com_mode_pins_default +- >; +- gpio-line-names = +- /* 0..9 */ +- "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0", +- "UART0-enable", "UART0-terminate", "", "WIFI-disable", +- /* 10..19 */ +- "", "", "", "", "", "", "", "", "", "", +- /* 20..29 */ +- "", "A4A5-I2C-mux", "", "", "", "USER-button", "", "", "","IO0", +- /* 30..39 */ +- "IO1", "IO2", "", "IO3", "IO17-direction", "A5", +- "IO16-direction", "IO15-direction", "IO14-direction", "A3", +- /* 40..49 */ +- "", "IO18-direction", "A4", "A2", "A1", "A0", "", "", "IO13", +- "IO11", +- /* 50..51 */ +- "IO12", "IO10"; +-}; +- +-&wkup_i2c0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&wkup_i2c0_pins_default>; +- clock-frequency = <400000>; ++ pinctrl-0 = <&main_pcie_enable_pins_default>; + }; + + &mcu_i2c0 { +@@ -425,7 +325,7 @@ + + psu: regulator@60 { + compatible = "ti,tps62363"; +- reg = <0x60>; ++ reg = <0x60>; + regulator-name = "tps62363-vout"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1500000>; +@@ -434,47 +334,6 @@ + ti,vsel1-state-high; + ti,enable-vout-discharge; + }; +- +- /* D4200 */ +- pcal9535_1: gpio@20 { +- compatible = "nxp,pcal9535"; +- reg = <0x20>; +- #gpio-cells = <2>; +- gpio-controller; +- gpio-line-names = +- "A0-pull", "A1-pull", "A2-pull", "A3-pull", "A4-pull", +- "A5-pull", "", "", +- "IO14-enable", "IO15-enable", "IO16-enable", +- "IO17-enable", "IO18-enable", "IO19-enable"; +- }; +- +- /* D4201 */ +- pcal9535_2: gpio@21 { +- compatible = "nxp,pcal9535"; +- reg = <0x21>; +- #gpio-cells = <2>; +- gpio-controller; +- gpio-line-names = +- "IO0-direction", "IO1-direction", "IO2-direction", +- "IO3-direction", "IO4-direction", "IO5-direction", +- "IO6-direction", "IO7-direction", +- "IO8-direction", "IO9-direction", "IO10-direction", +- "IO11-direction", "IO12-direction", "IO13-direction", +- "IO19-direction"; +- }; +- +- /* D4202 */ +- pcal9535_3: gpio@25 { +- compatible = "nxp,pcal9535"; +- reg = <0x25>; +- #gpio-cells = <2>; +- gpio-controller; +- gpio-line-names = +- "IO0-pull", "IO1-pull", "IO2-pull", "IO3-pull", +- "IO4-pull", "IO5-pull", "IO6-pull", "IO7-pull", +- "IO8-pull", "IO9-pull", "IO10-pull", "IO11-pull", +- "IO12-pull", "IO13-pull"; +- }; + }; + + &main_i2c0 { +@@ -545,11 +404,6 @@ + status = "disabled"; + }; + +-&ecap0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&ecap0_pins_default>; +-}; +- + &sdhci1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc1_pins_default>; +@@ -570,24 +424,22 @@ + }; + + &mcu_spi0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&mcu_spi0_pins_default>; +- ++ status = "okay"; + #address-cells = <1>; +- #size-cells= <0>; ++ #size-cells = <0>; + ti,pindir-d0-out-d1-in; ++ ++ spidev@0 { ++ compatible = "rohm,dh2228fv"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ }; + }; + + &tscadc0 { + status = "disabled"; + }; + +-&tscadc1 { +- adc { +- ti,adc-channels = <0 1 2 3 4 5>; +- }; +-}; +- + &ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; +@@ -711,13 +563,17 @@ + &mcu_r5fss0_core0 { + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; +- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; ++ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; + }; + + &mcu_r5fss0_core1 { + memory-region = <&mcu_r5fss0_core1_dma_memory_region>, + <&mcu_r5fss0_core1_memory_region>; +- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>; ++ mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>; ++}; ++ ++&mcu_rti1 { ++ memory-region = <&wdt_reset_memory_region>; + }; + + &icssg0_mdio { +@@ -731,3 +587,15 @@ + &icssg2_mdio { + status = "disabled"; + }; ++ ++&mcasp0 { ++ status = "disabled"; ++}; ++ ++&mcasp1 { ++ status = "disabled"; ++}; ++ ++&mcasp2 { ++ status = "disabled"; ++}; +diff --git a/arch/arm/dts/k3-am65-iot2050-spl.dts b/arch/arm/dts/k3-am65-iot2050-spl.dts +index 4e668fa3e039..cae795b26b18 100644 +--- a/arch/arm/dts/k3-am65-iot2050-spl.dts ++++ b/arch/arm/dts/k3-am65-iot2050-spl.dts +@@ -9,6 +9,7 @@ + /dts-v1/; + + #include "k3-am65-iot2050-common.dtsi" ++#include "k3-am65-iot2050-arduino-connector.dtsi" + #include "k3-am65-iot2050-common-u-boot.dtsi" + + / { +diff --git a/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi b/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi +index 4a9bf7d7c07d..e865f0ae5550 100644 +--- a/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi ++++ b/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi +@@ -10,6 +10,7 @@ + */ + + #include "k3-am65-iot2050-common.dtsi" ++#include "k3-am65-iot2050-arduino-connector.dtsi" + + / { + memory@80000000 { +@@ -35,7 +36,7 @@ + }; + + &main_pmx0 { +- main_uart0_pins_default: main-uart0-pins-default { ++ main_uart0_pins_default: main-uart0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ + AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ +@@ -53,8 +54,3 @@ + pinctrl-names = "default"; + pinctrl-0 = <&main_uart0_pins_default>; + }; +- +-&mcu_r5fss0 { +- /* lock-step mode not supported on Basic boards */ +- ti,cluster-mode = <0>; +-}; +diff --git a/arch/arm/dts/k3-am6528-iot2050-basic.dts b/arch/arm/dts/k3-am6528-iot2050-basic.dts +index 87928ff28214..be9c8db4c43a 100644 +--- a/arch/arm/dts/k3-am6528-iot2050-basic.dts ++++ b/arch/arm/dts/k3-am6528-iot2050-basic.dts +@@ -22,3 +22,8 @@ + compatible = "siemens,iot2050-basic", "ti,am654"; + model = "SIMATIC IOT2050 Basic"; + }; ++ ++&mcu_r5fss0 { ++ /* lock-step mode not supported on this board */ ++ ti,cluster-mode = <0>; ++}; +diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi b/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi +index d25e8b26187f..112b3c4ef975 100644 +--- a/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi ++++ b/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi +@@ -22,7 +22,7 @@ + }; + + &main_pmx0 { +- main_mmc0_pins_default: main-mmc0-pins-default { ++ main_mmc0_pins_default: main-mmc0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ + AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ +diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts +index 9400e35882a6..2401cbe2b66c 100644 +--- a/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts ++++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts +@@ -15,38 +15,28 @@ + + #include "k3-am6548-iot2050-advanced-common.dtsi" + #include "k3-am65-iot2050-common-pg2.dtsi" ++#include "k3-am65-iot2050-arduino-connector.dtsi" + + / { + compatible = "siemens,iot2050-advanced-m2", "ti,am654"; + model = "SIMATIC IOT2050 Advanced M2"; + }; + +-&mcu_r5fss0 { +- /* lock-step mode not supported on this board */ +- ti,cluster-mode = <0>; +-}; +- + &main_pmx0 { +- main_m2_enable_pins_default: main-m2-enable-pins-default { +- pinctrl-single,pins = < +- AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */ +- >; +- }; +- +- main_bkey_pcie_reset: main-bkey-pcie-reset { ++ main_bkey_pcie_reset: main-bkey-pcie-reset-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01bc, PIN_OUTPUT_PULLUP, 7) /* (AG13) GPIO1_15 */ + >; + }; + +- main_pmx0_m2_config_pins_default: main-pmx0-m2-config-pins-default { ++ main_pmx0_m2_config_pins_default: main-pmx0-m2-config-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01c8, PIN_INPUT_PULLUP, 7) /* (AE13) GPIO1_18 */ + AM65X_IOPAD(0x01cc, PIN_INPUT_PULLUP, 7) /* (AD13) GPIO1_19 */ + >; + }; + +- main_m2_pcie_mux_control: main-m2-pcie-mux-control { ++ main_m2_pcie_mux_control: main-m2-pcie-mux-control-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0148, PIN_INPUT_PULLUP, 7) /* (AG22) GPIO0_82 */ + AM65X_IOPAD(0x0160, PIN_INPUT_PULLUP, 7) /* (AE20) GPIO0_88 */ +@@ -56,7 +46,7 @@ + }; + + &main_pmx1 { +- main_pmx1_m2_config_pins_default: main-pmx1-m2-config-pins-default { ++ main_pmx1_m2_config_pins_default: main-pmx1-m2-config-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0018, PIN_INPUT_PULLUP, 7) /* (B22) GPIO1_88 */ + AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7) /* (C23) GPIO1_89 */ +@@ -66,20 +56,16 @@ + + &main_gpio0 { + pinctrl-names = "default"; +- pinctrl-0 = < +- &main_m2_pcie_mux_control +- &arduino_io_d4_to_d9_pins_default +- >; ++ pinctrl-0 = <&main_m2_pcie_mux_control>; + }; + + &main_gpio1 { + pinctrl-names = "default"; +- pinctrl-0 = < +- &main_m2_enable_pins_default +- &main_pmx0_m2_config_pins_default +- &main_pmx1_m2_config_pins_default +- &cp2102n_reset_pin_default +- >; ++ pinctrl-0 = ++ <&main_pcie_enable_pins_default>, ++ <&main_pmx0_m2_config_pins_default>, ++ <&main_pmx1_m2_config_pins_default>, ++ <&cp2102n_reset_pin_default>; + }; + + /* +diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dts +index f00dc86d01b9..c1205feef54e 100644 +--- a/arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dts ++++ b/arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dts +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) Siemens AG, 2018-2021 ++ * Copyright (c) Siemens AG, 2018-2023 + * + * Authors: + * Le Jin +@@ -17,13 +17,9 @@ + + #include "k3-am6548-iot2050-advanced-common.dtsi" + #include "k3-am65-iot2050-common-pg2.dtsi" ++#include "k3-am65-iot2050-arduino-connector.dtsi" + + / { + compatible = "siemens,iot2050-advanced-pg2", "ti,am654"; + model = "SIMATIC IOT2050 Advanced PG2"; + }; +- +-&mcu_r5fss0 { +- /* lock-step mode not supported on this board */ +- ti,cluster-mode = <0>; +-}; +diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced.dts b/arch/arm/dts/k3-am6548-iot2050-advanced.dts +index 077f165bdc68..b66965f992b9 100644 +--- a/arch/arm/dts/k3-am6548-iot2050-advanced.dts ++++ b/arch/arm/dts/k3-am6548-iot2050-advanced.dts +@@ -17,6 +17,7 @@ + + #include "k3-am6548-iot2050-advanced-common.dtsi" + #include "k3-am65-iot2050-common-pg1.dtsi" ++#include "k3-am65-iot2050-arduino-connector.dtsi" + + / { + compatible = "siemens,iot2050-advanced", "ti,am654"; diff --git a/recipes-bsp/u-boot/files/0010-dts-iot2050-Support-new-IOT2050-SM-variant.patch b/recipes-bsp/u-boot/files/0010-dts-iot2050-Support-new-IOT2050-SM-variant.patch new file mode 100644 index 000000000..300b7b083 --- /dev/null +++ b/recipes-bsp/u-boot/files/0010-dts-iot2050-Support-new-IOT2050-SM-variant.patch @@ -0,0 +1,366 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Wed, 29 Nov 2023 23:35:51 +0800 +Subject: [PATCH] dts: iot2050: Support new IOT2050-SM variant + +the dts file for IOT2050-SM variant is copied from kernel side without +any change. + +Main differences between the new variant and Advanced PG2: + +1. Arduino interface is removed. Instead, an new ASIC is added for + communicating with PLC 1200 signal modules. +2. USB 3.0 type A connector is removed, only USB 2.0 type A connector is + avaiable. +3. DP interface is tailored down. Instead, to communicate with the + PLC 1200 signal modules, a USB 3.0 type B connector is added but the + signal is not USB. +4. DDR size is increased to 4 GB. +5. Two sensors are added, one tilt sensor and one light sensor. + +Signed-off-by: Baocheng Su +--- + arch/arm/dts/Makefile | 4 +- + arch/arm/dts/k3-am65-iot2050-boot-image.dtsi | 5 +- + .../k3-am6548-iot2050-advanced-sm-u-boot.dtsi | 1 + + .../arm/dts/k3-am6548-iot2050-advanced-sm.dts | 234 ++++++++++++++++++ + board/siemens/iot2050/board.c | 15 +- + doc/board/siemens/iot2050.rst | 4 +- + 6 files changed, 259 insertions(+), 4 deletions(-) + create mode 120000 arch/arm/dts/k3-am6548-iot2050-advanced-sm-u-boot.dtsi + create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced-sm.dts + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 85fd5b1157b1..0edd5b73a414 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -1316,7 +1316,9 @@ dtb-$(CONFIG_SOC_K3_AM654) += \ + k3-am6548-iot2050-advanced-pg2.dtb \ + k3-am6548-iot2050-advanced-m2.dtb \ + k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo \ +- k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo ++ k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo \ ++ k3-am6548-iot2050-advanced-sm.dtb ++ + dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \ + k3-j721e-r5-common-proc-board.dtb \ + k3-j7200-common-proc-board.dtb \ +diff --git a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi +index 64318d09cf0a..5d83109389cc 100644 +--- a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi ++++ b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi +@@ -229,7 +229,10 @@ + }; + + fit@380000 { +- fit,fdt-list-val = "k3-am6528-iot2050-basic-pg2", "k3-am6548-iot2050-advanced-pg2", "k3-am6548-iot2050-advanced-m2"; ++ fit,fdt-list-val = "k3-am6528-iot2050-basic-pg2", ++ "k3-am6548-iot2050-advanced-pg2", ++ "k3-am6548-iot2050-advanced-m2", ++ "k3-am6548-iot2050-advanced-sm"; + + images { + bkey-usb3-overlay { +diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-sm-u-boot.dtsi b/arch/arm/dts/k3-am6548-iot2050-advanced-sm-u-boot.dtsi +new file mode 120000 +index 000000000000..859776d3ffe1 +--- /dev/null ++++ b/arch/arm/dts/k3-am6548-iot2050-advanced-sm-u-boot.dtsi +@@ -0,0 +1 @@ ++k3-am6528-iot2050-basic-pg2-u-boot.dtsi +\ No newline at end of file +diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-sm.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-sm.dts +new file mode 100644 +index 000000000000..c00e4a9e8efd +--- /dev/null ++++ b/arch/arm/dts/k3-am6548-iot2050-advanced-sm.dts +@@ -0,0 +1,234 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) Siemens AG, 2023 ++ * ++ * Authors: ++ * Baocheng Su ++ * Chao Zeng ++ * Huaqian Li ++ * ++ * AM6548-based (quad-core) IOT2050 SM variant, Product Generation 2 ++ * 4 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 ++ * ++ * Product homepage: ++ * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html ++ */ ++ ++/dts-v1/; ++ ++#include "k3-am6548-iot2050-advanced-common.dtsi" ++#include "k3-am65-iot2050-common-pg2.dtsi" ++ ++/ { ++ compatible = "siemens,iot2050-advanced-sm", "ti,am654"; ++ model = "SIMATIC IOT2050 Advanced SM"; ++ ++ memory@80000000 { ++ device_type = "memory"; ++ /* 4G RAM */ ++ reg = <0x00000000 0x80000000 0x00000000 0x80000000>, ++ <0x00000008 0x80000000 0x00000000 0x80000000>; ++ }; ++ ++ aliases { ++ spi1 = &main_spi0; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&leds_pins_default>, <&user1_led_pins>; ++ ++ user-led1-red { ++ gpios = <&wkup_gpio0 52 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ user-led1-green { ++ gpios = <&wkup_gpio0 53 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++}; ++ ++&main_pmx0 { ++ main_pcie_enable_pins_default: main-pcie-enable-default-pins { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01d8, PIN_OUTPUT, 7) /* (AH12) GPIO1_22 */ ++ >; ++ }; ++ ++ main_spi0_pins: main-spi0-default-pins { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */ ++ AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */ ++ AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */ ++ AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */ ++ >; ++ }; ++}; ++ ++&main_pmx1 { ++ asic_spi_mux_ctrl_pin: asic-spi-mux-ctrl-default-pins { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0010, PIN_OUTPUT, 7) /* (D21) GPIO1_86 */ ++ >; ++ }; ++}; ++ ++&wkup_pmx0 { ++ user1_led_pins: user1-led-default-pins { ++ pinctrl-single,pins = < ++ /* (AB1) WKUP_UART0_RXD:WKUP_GPIO0_52, as USER 1 led red */ ++ AM65X_WKUP_IOPAD(0x00a0, PIN_OUTPUT, 7) ++ /* (AB5) WKUP_UART0_TXD:WKUP_GPIO0_53, as USER 1 led green */ ++ AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 7) ++ >; ++ }; ++ ++ soc_asic_pins: soc-asic-default-pins { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 7) /* (P4) WKUP_GPIO0_29 */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) /* (P5) WKUP_GPIO0_30 */ ++ AM65X_WKUP_IOPAD(0x004c, PIN_INPUT, 7) /* (P1) WKUP_GPIO0_31 */ ++ >; ++ }; ++}; ++ ++&main_gpio0 { ++ gpio-line-names = "main_gpio0-base"; ++}; ++ ++&main_gpio1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = ++ <&cp2102n_reset_pin_default>, ++ <&main_pcie_enable_pins_default>, ++ <&asic_spi_mux_ctrl_pin>; ++ gpio-line-names = ++ /* 0..9 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 10..19 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 20..29 */ ++ "", "", "", "", "CP2102N-RESET", "", "", "", "", "", ++ /* 30..39 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 40..49 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 50..59 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 60..69 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 70..79 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 80..86 */ ++ "", "", "", "", "", "", "ASIC-spi-mux-ctrl"; ++}; ++ ++&wkup_gpio0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = ++ <&push_button_pins_default>, ++ <&db9_com_mode_pins_default>, ++ <&soc_asic_pins>; ++ gpio-line-names = ++ /* 0..9 */ ++ "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0", ++ "UART0-enable", "UART0-terminate", "", "WIFI-disable", ++ /* 10..19 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 20..29 */ ++ "", "", "", "", "", "USER-button", "", "", "","ASIC-gpio-0", ++ /* 30..31 */ ++ "ASIC-gpio-1", "ASIC-gpio-2"; ++}; ++ ++&main_spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_spi0_pins>; ++ ++ #address-cells = <1>; ++ #size-cells= <0>; ++ ++ spidev@0 { ++ compatible = "rohm,dh2228fv"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ }; ++}; ++ ++&mcu_spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcu_spi0_pins_default>; ++}; ++ ++&main_i2c3 { ++ accelerometer: lsm6dso@6a { ++ compatible = "st,lsm6dso"; ++ reg = <0x6a>; ++ }; ++ ++ proximitysensor: pm16d17@44 { ++ compatible = "everlight,pm16d17"; ++ reg = <0x44>; ++ ++ ps-gain = <1>; ++ ps-itime = "0.4"; ++ ps-wtime = "25"; ++ ps-ir-led-pulse-count = <1>; ++ }; ++ ++ /delete-node/ edp-bridge@f; ++}; ++ ++&dss { ++ status = "disabled"; ++}; ++ ++&dss_ports { ++ /delete-node/ port@1; ++}; ++ ++&mcu_uart0 { ++ status = "disabled"; ++}; ++ ++&tscadc1 { ++ status = "disabled"; ++}; ++ ++&serdes0 { ++ assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; ++ assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>; ++}; ++ ++&serdes1 { ++ status = "disabled"; ++}; ++ ++&pcie0_rc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&minipcie_pins_default>; ++ ++ num-lanes = <1>; ++ phys = <&serdes0 PHY_TYPE_PCIE 1>; ++ phy-names = "pcie-phy0"; ++ reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++&pcie1_rc { ++ status = "disabled"; ++}; ++ ++&dwc3_0 { ++ assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ ++ <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */ ++ /delete-property/ phys; ++ /delete-property/ phy-names; ++}; ++ ++&usb0 { ++ maximum-speed = "high-speed"; ++ /delete-property/ snps,dis-u1-entry-quirk; ++ /delete-property/ snps,dis-u2-entry-quirk; ++}; +diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c +index 32f5280125c0..8497212ab890 100644 +--- a/board/siemens/iot2050/board.c ++++ b/board/siemens/iot2050/board.c +@@ -174,6 +174,14 @@ static bool board_is_m2(void) + strcmp((char *)info->name, "IOT2050-ADVANCED-M2") == 0; + } + ++static bool board_is_sm(void) ++{ ++ struct iot2050_info *info = IOT2050_INFO_DATA; ++ ++ return info->magic == IOT2050_INFO_MAGIC && ++ strcmp((char *)info->name, "IOT2050-ADVANCED-SM") == 0; ++} ++ + static void remove_mmc1_target(void) + { + char *boot_targets = strdup(env_get("boot_targets")); +@@ -189,7 +197,10 @@ static void remove_mmc1_target(void) + + static void enable_pcie_connector_power(void) + { +- set_pinvalue("gpio@601000_17", "P3V3_PCIE_CON_EN", 1); ++ if (board_is_sm()) ++ set_pinvalue("gpio@601000_22", "P3V3_PCIE_CON_EN", 1); ++ else ++ set_pinvalue("gpio@601000_17", "P3V3_PCIE_CON_EN", 1); + udelay(4 * 100); + } + +@@ -230,6 +241,8 @@ void set_board_info_env(void) + fdtfile = "ti/k3-am6548-iot2050-advanced.dtb"; + else if (board_is_m2()) + fdtfile = "ti/k3-am6548-iot2050-advanced-m2.dtb"; ++ else if (board_is_sm()) ++ fdtfile = "ti/k3-am6548-iot2050-advanced-sm.dtb"; + else + fdtfile = "ti/k3-am6548-iot2050-advanced-pg2.dtb"; + } else { +diff --git a/doc/board/siemens/iot2050.rst b/doc/board/siemens/iot2050.rst +index e88d25caf611..ab9a89a3e752 100644 +--- a/doc/board/siemens/iot2050.rst ++++ b/doc/board/siemens/iot2050.rst +@@ -8,7 +8,9 @@ The SIMATIC IOT2050 is an open industrial IoT gateway that is using the TI + AM6528 GP (Basic variant) or the AM6548 HS (Advanced variant). The Advanced + variant is prepared for secure boot. M.2 Variant also uses the AM6548 HS. + Instead of a MiniPCI connector, it comes with two M.2 connectors and can +-support 5G/WIFI/BT applications or connect an SSD. ++support 5G/WIFI/BT applications or connect an SSD. Compared with the AM6548 ++Advanced variant, SM variant removes the Arduino interface, and adds a new ++ASIC for communicating with the PLC 1200 signal modules. + + The IOT2050 starts only from OSPI. It loads a Siemens-provided bootloader + called SE-Boot for the MCU domain (R5F cores), then hands over to ATF and diff --git a/recipes-bsp/u-boot/files/prebuild/seboot_pg1.bin b/recipes-bsp/u-boot/files/prebuild/seboot_pg1.bin index b6dec806c..8303a892d 100644 Binary files a/recipes-bsp/u-boot/files/prebuild/seboot_pg1.bin and b/recipes-bsp/u-boot/files/prebuild/seboot_pg1.bin differ diff --git a/recipes-bsp/u-boot/files/prebuild/seboot_pg2.bin b/recipes-bsp/u-boot/files/prebuild/seboot_pg2.bin index 8040ab80c..858e325b4 100644 Binary files a/recipes-bsp/u-boot/files/prebuild/seboot_pg2.bin and b/recipes-bsp/u-boot/files/prebuild/seboot_pg2.bin differ diff --git a/recipes-bsp/u-boot/u-boot-iot2050_2023.10.bb b/recipes-bsp/u-boot/u-boot-iot2050_2023.10.bb index 9532f11f4..f52d7a20d 100644 --- a/recipes-bsp/u-boot/u-boot-iot2050_2023.10.bb +++ b/recipes-bsp/u-boot/u-boot-iot2050_2023.10.bb @@ -12,11 +12,16 @@ require u-boot-iot2050.inc SRC_URI += " \ https://ftp.denx.de/pub/u-boot/u-boot-${PV}.tar.bz2 \ - file://0001-Watchdog-Support-WDIOF_CARDRESET-on-TI-AM65x-platfor.patch \ - file://0002-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch \ - file://0003-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch \ - file://0004-board-siemens-iot2050-Fix-M.2-detection.patch \ - file://0005-iot2050-Allow-for-more-than-1-USB-storage-device.patch \ + file://0001-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch \ + file://0002-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch \ + file://0003-board-siemens-iot2050-Fix-M.2-detection.patch \ + file://0004-iot2050-Allow-for-more-than-1-USB-storage-device.patch \ + file://0005-board-siemens-iot2050-Fix-coding-style.patch \ + file://0006-board-siemens-iot2050-Control-pcie-power-for-all-var.patch \ + file://0007-board-siemens-iot2050-Pass-DDR-size-from-FSBL.patch \ + file://0008-board-siemens-iot2050-Generalize-the-fdt-fixup.patch \ + file://0009-dts-iot2050-Sync-kernel-dts-to-u-boot.patch \ + file://0010-dts-iot2050-Support-new-IOT2050-SM-variant.patch \ " SRC_URI[sha256sum] = "e00e6c6f014e046101739d08d06f328811cebcf5ae101348f409cbbd55ce6900" diff --git a/recipes-kernel/linux/files/iot2050_defconfig_extra.cfg b/recipes-kernel/linux/files/iot2050_defconfig_extra.cfg index fc7445c5b..1694d8a8c 100644 --- a/recipes-kernel/linux/files/iot2050_defconfig_extra.cfg +++ b/recipes-kernel/linux/files/iot2050_defconfig_extra.cfg @@ -222,3 +222,21 @@ CONFIG_DRM_VIRTIO_GPU=y CONFIG_VIRTIO_INPUT=y CONFIG_WATCHDOG_SYSFS=y + +CONFIG_IIO_ST_LSM6DSX=m +CONFIG_IIO_ST_LSM6DSX_I2C=m + +CONFIG_IIO_BUFFER=y +CONFIG_IIO_BUFFER_CB=m +CONFIG_IIO_BUFFER_DMA=m +CONFIG_IIO_BUFFER_DMAENGINE=m +CONFIG_IIO_BUFFER_HW_CONSUMER=m +CONFIG_IIO_KFIFO_BUF=m +CONFIG_IIO_TRIGGERED_BUFFER=m +CONFIG_IIO_CONFIGFS=m +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 +CONFIG_IIO_SW_DEVICE=m +CONFIG_IIO_SW_TRIGGER=m +CONFIG_IIO_TRIGGERED_EVENT=m +CONFIG_PM16D17=m diff --git a/recipes-kernel/linux/files/patches-6.1/0078-arm64-dts-ti-iot2050-Disable-R5-lockstep-for-all-PG2.patch b/recipes-kernel/linux/files/patches-6.1/0078-arm64-dts-ti-iot2050-Disable-R5-lockstep-for-all-PG2.patch new file mode 100644 index 000000000..693a3b486 --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0078-arm64-dts-ti-iot2050-Disable-R5-lockstep-for-all-PG2.patch @@ -0,0 +1,110 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Fri, 1 Dec 2023 19:25:47 +0800 +Subject: [PATCH] arm64: dts: ti: iot2050: Disable R5 lockstep for all PG2 + boards + +The R5 lockstep disabling should be common for all PG2 boards, move it +from variants dts to common-pg2.dtsi. + +As now the Basic PG2 consumes this twice, move Basic disabling to the +PG1 variant. + +Signed-off-by: Baocheng Su +[Jan: avoid duplication of disabling for Basic PG2] +Signed-off-by: Jan Kiszka +--- + arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi | 7 ++++++- + arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi | 5 ----- + arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts | 5 +++++ + arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts | 5 ----- + arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts | 7 +------ + 5 files changed, 12 insertions(+), 17 deletions(-) + +diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi +index e9b57b87e42e..42adb8815f38 100644 +--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) Siemens AG, 2021 ++ * Copyright (c) Siemens AG, 2021-2023 + * + * Authors: + * Chao Zeng +@@ -9,6 +9,11 @@ + * Common bits of the IOT2050 Basic and Advanced variants, PG2 + */ + ++&mcu_r5fss0 { ++ /* lock-step mode not supported on PG2 boards */ ++ ti,cluster-mode = <0>; ++}; ++ + &main_pmx0 { + cp2102n_reset_pin_default: cp2102n-reset-default-pins { + pinctrl-single,pins = < +diff --git a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi +index 9b757ed3bdcd..bba5dc527f52 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi +@@ -53,8 +53,3 @@ &main_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart0_pins_default>; + }; +- +-&mcu_r5fss0 { +- /* lock-step mode not supported on Basic boards */ +- ti,cluster-mode = <0>; +-}; +diff --git a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts +index 87928ff28214..be9c8db4c43a 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts ++++ b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts +@@ -22,3 +22,8 @@ / { + compatible = "siemens,iot2050-basic", "ti,am654"; + model = "SIMATIC IOT2050 Basic"; + }; ++ ++&mcu_r5fss0 { ++ /* lock-step mode not supported on this board */ ++ ti,cluster-mode = <0>; ++}; +diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +index bd6f2e696e94..1e5d4d98b69b 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts ++++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +@@ -21,11 +21,6 @@ / { + model = "SIMATIC IOT2050 Advanced M2"; + }; + +-&mcu_r5fss0 { +- /* lock-step mode not supported on this board */ +- ti,cluster-mode = <0>; +-}; +- + &main_pmx0 { + main_bkey_pcie_reset: main-bkey-pcie-reset-default-pins { + pinctrl-single,pins = < +diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts +index f00dc86d01b9..a8ce8c891894 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts ++++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) Siemens AG, 2018-2021 ++ * Copyright (c) Siemens AG, 2018-2023 + * + * Authors: + * Le Jin +@@ -22,8 +22,3 @@ / { + compatible = "siemens,iot2050-advanced-pg2", "ti,am654"; + model = "SIMATIC IOT2050 Advanced PG2"; + }; +- +-&mcu_r5fss0 { +- /* lock-step mode not supported on this board */ +- ti,cluster-mode = <0>; +-}; diff --git a/recipes-kernel/linux/files/patches-6.1/0079-arm64-dts-ti-iot2050-Factor-out-arduino-connector-bi.patch b/recipes-kernel/linux/files/patches-6.1/0079-arm64-dts-ti-iot2050-Factor-out-arduino-connector-bi.patch new file mode 100644 index 000000000..f8de150a5 --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0079-arm64-dts-ti-iot2050-Factor-out-arduino-connector-bi.patch @@ -0,0 +1,1651 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Thu, 14 Dec 2023 13:54:46 +0100 +Subject: [PATCH] arm64: dts: ti: iot2050: Factor out arduino connector bits + +A new variant is to be added which will not have a arduino connector +like the existing ones. Factor out all bits that are specific to this +connector. + +The split is not perfect because wkup_gpio0 is defined based on what is +common to all variants having the connector, thus containing also +connector-unrelated information. But this is still cleaner than +replicating this node into all 4 variants. + +Signed-off-by: Jan Kiszka +--- + .../ti/k3-am65-iot2050-arduino-connector.dtsi | 768 ++++++++++++++++++ + .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 746 ----------------- + .../ti/k3-am6528-iot2050-basic-common.dtsi | 1 + + .../dts/ti/k3-am6548-iot2050-advanced-m2.dts | 1 + + .../dts/ti/k3-am6548-iot2050-advanced-pg2.dts | 1 + + .../dts/ti/k3-am6548-iot2050-advanced.dts | 1 + + 6 files changed, 772 insertions(+), 746 deletions(-) + create mode 100644 arch/arm64/boot/dts/ti/k3-am65-iot2050-arduino-connector.dtsi + +diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-arduino-connector.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-arduino-connector.dtsi +new file mode 100644 +index 000000000000..cd86f412b837 +--- /dev/null ++++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-arduino-connector.dtsi +@@ -0,0 +1,768 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) Siemens AG, 2018-2023 ++ * ++ * Authors: ++ * Le Jin ++ * Jan Kiszka ++ * ++ * Common bits for IOT2050 variants with Arduino connector ++ */ ++ ++&wkup_pmx0 { ++ pinctrl-names = ++ "default", ++ "d0-uart0-rxd", "d0-gpio", "d0-gpio-pullup", "d0-gpio-pulldown", ++ "d1-uart0-txd", "d1-gpio", "d1-gpio-pullup", "d1-gpio-pulldown", ++ "d2-uart0-ctsn", "d2-gpio", "d2-gpio-pullup", "d2-gpio-pulldown", ++ "d3-uart0-rtsn", "d3-gpio", "d3-gpio-pullup", "d3-gpio-pulldown", ++ "d10-spi0-cs0", "d10-gpio", "d10-gpio-pullup", "d10-gpio-pulldown", ++ "d11-spi0-d0", "d11-gpio", "d11-gpio-pullup", "d11-gpio-pulldown", ++ "d12-spi0-d1", "d12-gpio", "d12-gpio-pullup", "d12-gpio-pulldown", ++ "d13-spi0-clk", "d13-gpio", "d13-gpio-pullup", "d13-gpio-pulldown", ++ "a0-gpio", "a0-gpio-pullup", "a0-gpio-pulldown", ++ "a1-gpio", "a1-gpio-pullup", "a1-gpio-pulldown", ++ "a2-gpio", "a2-gpio-pullup", "a2-gpio-pulldown", ++ "a3-gpio", "a3-gpio-pullup", "a3-gpio-pulldown", ++ "a4-gpio", "a4-gpio-pullup", "a4-gpio-pulldown", ++ "a5-gpio", "a5-gpio-pullup", "a5-gpio-pulldown"; ++ ++ pinctrl-0 = <&d0_uart0_rxd>; ++ pinctrl-1 = <&d0_uart0_rxd>; ++ pinctrl-2 = <&d0_gpio>; ++ pinctrl-3 = <&d0_gpio_pullup>; ++ pinctrl-4 = <&d0_gpio_pulldown>; ++ pinctrl-5 = <&d1_uart0_txd>; ++ pinctrl-6 = <&d1_gpio>; ++ pinctrl-7 = <&d1_gpio_pullup>; ++ pinctrl-8 = <&d1_gpio_pulldown>; ++ pinctrl-9 = <&d2_uart0_ctsn>; ++ pinctrl-10 = <&d2_gpio>; ++ pinctrl-11 = <&d2_gpio_pullup>; ++ pinctrl-12 = <&d2_gpio_pulldown>; ++ pinctrl-13 = <&d3_uart0_rtsn>; ++ pinctrl-14 = <&d3_gpio>; ++ pinctrl-15 = <&d3_gpio_pullup>; ++ pinctrl-16 = <&d3_gpio_pulldown>; ++ pinctrl-17 = <&d10_spi0_cs0>; ++ pinctrl-18 = <&d10_gpio>; ++ pinctrl-19 = <&d10_gpio_pullup>; ++ pinctrl-20 = <&d10_gpio_pulldown>; ++ pinctrl-21 = <&d11_spi0_d0>; ++ pinctrl-22 = <&d11_gpio>; ++ pinctrl-23 = <&d11_gpio_pullup>; ++ pinctrl-24 = <&d11_gpio_pulldown>; ++ pinctrl-25 = <&d12_spi0_d1>; ++ pinctrl-26 = <&d12_gpio>; ++ pinctrl-27 = <&d12_gpio_pullup>; ++ pinctrl-28 = <&d12_gpio_pulldown>; ++ pinctrl-29 = <&d13_spi0_clk>; ++ pinctrl-30 = <&d13_gpio>; ++ pinctrl-31 = <&d13_gpio_pullup>; ++ pinctrl-32 = <&d13_gpio_pulldown>; ++ pinctrl-33 = <&a0_gpio>; ++ pinctrl-34 = <&a0_gpio_pullup>; ++ pinctrl-35 = <&a0_gpio_pulldown>; ++ pinctrl-36 = <&a1_gpio>; ++ pinctrl-37 = <&a1_gpio_pullup>; ++ pinctrl-38 = <&a1_gpio_pulldown>; ++ pinctrl-39 = <&a2_gpio>; ++ pinctrl-40 = <&a2_gpio_pullup>; ++ pinctrl-41 = <&a2_gpio_pulldown>; ++ pinctrl-42 = <&a3_gpio>; ++ pinctrl-43 = <&a3_gpio_pullup>; ++ pinctrl-44 = <&a3_gpio_pulldown>; ++ pinctrl-45 = <&a4_gpio>; ++ pinctrl-46 = <&a4_gpio_pullup>; ++ pinctrl-47 = <&a4_gpio_pulldown>; ++ pinctrl-48 = <&a5_gpio>; ++ pinctrl-49 = <&a5_gpio_pullup>; ++ pinctrl-50 = <&a5_gpio_pulldown>; ++ ++ d0_uart0_rxd: d0-uart0-rxd-pins { ++ pinctrl-single,pins = < ++ /* (P4) MCU_UART0_RXD */ ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) ++ >; ++ }; ++ ++ d0_gpio: d0-gpio-pins { ++ pinctrl-single,pins = < ++ /* (P4) WKUP_GPIO0_29 */ ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d0_gpio_pullup: d0-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (P4) WKUP_GPIO0_29 */ ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d0_gpio_pulldown: d0-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (P4) WKUP_GPIO0_29 */ ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d1_uart0_txd: d1-uart0-txd-pins { ++ pinctrl-single,pins = < ++ /* (P5) MCU_UART0_TXD */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) ++ >; ++ }; ++ ++ d1_gpio: d1-gpio-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_30 */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d1_gpio_pullup: d1-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_30 */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d1_gpio_pulldown: d1-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_30 */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d2_uart0_ctsn: d2-uart0-ctsn-pins { ++ pinctrl-single,pins = < ++ /* (P1) MCU_UART0_CTSn */ ++ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) ++ >; ++ }; ++ ++ d2_gpio: d2-gpio-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_31 */ ++ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d2_gpio_pullup: d2-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_31 */ ++ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d2_gpio_pulldown: d2-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (P5) WKUP_GPIO0_31 */ ++ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d3_uart0_rtsn: d3-uart0-rtsn-pins { ++ pinctrl-single,pins = < ++ /* (N3) MCU_UART0_RTSn */ ++ AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) ++ >; ++ }; ++ ++ d3_gpio: d3-gpio-pins { ++ pinctrl-single,pins = < ++ /* (N3) WKUP_GPIO0_33 */ ++ AM65X_WKUP_IOPAD(0x0054, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d3_gpio_pullup: d3-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (N3) WKUP_GPIO0_33 */ ++ AM65X_WKUP_IOPAD(0x0054, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d3_gpio_pulldown: d3-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (N3) WKUP_GPIO0_33 */ ++ AM65X_WKUP_IOPAD(0x0054, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d10_spi0_cs0: d10-spi0-cs0-pins { ++ pinctrl-single,pins = < ++ /* (Y4) MCU_SPI0_CS0 */ ++ AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) ++ >; ++ }; ++ ++ d10_gpio: d10-gpio-pins { ++ pinctrl-single,pins = < ++ /* (Y4) WKUP_GPIO0_51 */ ++ AM65X_WKUP_IOPAD(0x009c, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d10_gpio_pullup: d10-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (Y4) WKUP_GPIO0_51 */ ++ AM65X_WKUP_IOPAD(0x009c, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d10_gpio_pulldown: d10-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (Y4) WKUP_GPIO0_51 */ ++ AM65X_WKUP_IOPAD(0x009c, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d11_spi0_d0: d11-spi0-d0-pins { ++ pinctrl-single,pins = < ++ /* (Y3) MCU_SPI0_D0 */ ++ AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 0) ++ >; ++ }; ++ ++ d11_gpio: d11-gpio-pins { ++ pinctrl-single,pins = < ++ /* (Y3) WKUP_GPIO0_49 */ ++ AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d11_gpio_pullup: d11-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (Y3) WKUP_GPIO0_49 */ ++ AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d11_gpio_pulldown: d11-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (Y3) WKUP_GPIO0_49 */ ++ AM65X_WKUP_IOPAD(0x0094, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d12_spi0_d1: d12-spi0-d1-pins { ++ pinctrl-single,pins = < ++ /* (Y2) MCU_SPI0_D1 */ ++ AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 0) ++ >; ++ }; ++ ++ d12_gpio: d12-gpio-pins { ++ pinctrl-single,pins = < ++ /* (Y2) WKUP_GPIO0_50 */ ++ AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d12_gpio_pullup: d12-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (Y2) WKUP_GPIO0_50 */ ++ AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d12_gpio_pulldown: d12-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (Y2) WKUP_GPIO0_50 */ ++ AM65X_WKUP_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d13_spi0_clk: d13-spi0-clk-pins { ++ pinctrl-single,pins = < ++ /* (Y1) MCU_SPI0_CLK */ ++ AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 0) ++ >; ++ }; ++ ++ d13_gpio: d13-gpio-pins { ++ pinctrl-single,pins = < ++ /* (Y1) WKUP_GPIO0_48 */ ++ AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d13_gpio_pullup: d13-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (Y1) WKUP_GPIO0_48 */ ++ AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d13_gpio_pulldown: d13-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (Y1) WKUP_GPIO0_48 */ ++ AM65X_WKUP_IOPAD(0x0090, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a0_gpio: a0-gpio-pins { ++ pinctrl-single,pins = < ++ /* (L6) WKUP_GPIO0_45 */ ++ AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a0_gpio_pullup: a0-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (L6) WKUP_GPIO0_45 */ ++ AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a0_gpio_pulldown: a0-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (L6) WKUP_GPIO0_45 */ ++ AM65X_WKUP_IOPAD(0x0084, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a1_gpio: a1-gpio-pins { ++ pinctrl-single,pins = < ++ /* (M6) WKUP_GPIO0_44 */ ++ AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a1_gpio_pullup: a1-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (M6) WKUP_GPIO0_44 */ ++ AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a1_gpio_pulldown: a1-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (M6) WKUP_GPIO0_44 */ ++ AM65X_WKUP_IOPAD(0x0080, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a2_gpio: a2-gpio-pins { ++ pinctrl-single,pins = < ++ /* (L5) WKUP_GPIO0_43 */ ++ AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a2_gpio_pullup: a2-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (L5) WKUP_GPIO0_43 */ ++ AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a2_gpio_pulldown: a2-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (L5) WKUP_GPIO0_43 */ ++ AM65X_WKUP_IOPAD(0x007C, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a3_gpio: a3-gpio-pins { ++ pinctrl-single,pins = < ++ /* (M5) WKUP_GPIO0_39 */ ++ AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a3_gpio_pullup: a3-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (M5) WKUP_GPIO0_39 */ ++ AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a3_gpio_pulldown: a3-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (M5) WKUP_GPIO0_39 */ ++ AM65X_WKUP_IOPAD(0x006C, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a4_gpio: a4-gpio-pins { ++ pinctrl-single,pins = < ++ /* (L2) WKUP_GPIO0_42 */ ++ AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a4_gpio_pullup: a4-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (L2) WKUP_GPIO0_42 */ ++ AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a4_gpio_pulldown: a4-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (L2) WKUP_GPIO0_42 */ ++ AM65X_WKUP_IOPAD(0x0078, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ a5_gpio: a5-gpio-pins { ++ pinctrl-single,pins = < ++ /* (N5) WKUP_GPIO0_35 */ ++ AM65X_WKUP_IOPAD(0x005C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ a5_gpio_pullup: a5-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (N5) WKUP_GPIO0_35 */ ++ AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ a5_gpio_pulldown: a5-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (N5) WKUP_GPIO0_35 */ ++ AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ wkup_i2c0_pins_default: wkup-i2c0-default-pins { ++ pinctrl-single,pins = < ++ /* (AC7) WKUP_I2C0_SCL */ ++ AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) ++ /* (AD6) WKUP_I2C0_SDA */ ++ AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) ++ >; ++ }; ++ ++ arduino_i2c_aio_switch_pins_default: arduino-i2c-aio-switch-default-pins { ++ pinctrl-single,pins = < ++ /* (R2) WKUP_GPIO0_21 */ ++ AM65X_WKUP_IOPAD(0x0024, PIN_OUTPUT, 7) ++ >; ++ }; ++ ++ arduino_io_oe_pins_default: arduino-io-oe-default-pins { ++ pinctrl-single,pins = < ++ /* (N4) WKUP_GPIO0_34 */ ++ AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 7) ++ /* (M2) WKUP_GPIO0_36 */ ++ AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 7) ++ /* (M3) WKUP_GPIO0_37 */ ++ AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 7) ++ /* (M4) WKUP_GPIO0_38 */ ++ AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 7) ++ /* (M1) WKUP_GPIO0_41 */ ++ AM65X_WKUP_IOPAD(0x0074, PIN_OUTPUT, 7) ++ >; ++ }; ++}; ++ ++&main_pmx0 { ++ pinctrl-names = ++ "default", ++ "d4-ehrpwm0-a", "d4-gpio", "d4-gpio-pullup", "d4-gpio-pulldown", ++ "d5-ehrpwm1-a", "d5-gpio", "d5-gpio-pullup", "d5-gpio-pulldown", ++ "d6-ehrpwm2-a", "d6-gpio", "d6-gpio-pullup", "d6-gpio-pulldown", ++ "d7-ehrpwm3-a", "d7-gpio", "d7-gpio-pullup", "d7-gpio-pulldown", ++ "d8-ehrpwm4-a", "d8-gpio", "d8-gpio-pullup", "d8-gpio-pulldown", ++ "d9-ehrpwm5-a", "d9-gpio", "d9-gpio-pullup", "d9-gpio-pulldown"; ++ ++ pinctrl-0 = <&d4_ehrpwm0_a>; ++ pinctrl-1 = <&d4_ehrpwm0_a>; ++ pinctrl-2 = <&d4_gpio>; ++ pinctrl-3 = <&d4_gpio_pullup>; ++ pinctrl-4 = <&d4_gpio_pulldown>; ++ ++ pinctrl-5 = <&d5_ehrpwm1_a>; ++ pinctrl-6 = <&d5_gpio>; ++ pinctrl-7 = <&d5_gpio_pullup>; ++ pinctrl-8 = <&d5_gpio_pulldown>; ++ ++ pinctrl-9 = <&d6_ehrpwm2_a>; ++ pinctrl-10 = <&d6_gpio>; ++ pinctrl-11 = <&d6_gpio_pullup>; ++ pinctrl-12 = <&d6_gpio_pulldown>; ++ ++ pinctrl-13 = <&d7_ehrpwm3_a>; ++ pinctrl-14 = <&d7_gpio>; ++ pinctrl-15 = <&d7_gpio_pullup>; ++ pinctrl-16 = <&d7_gpio_pulldown>; ++ ++ pinctrl-17 = <&d8_ehrpwm4_a>; ++ pinctrl-18 = <&d8_gpio>; ++ pinctrl-19 = <&d8_gpio_pullup>; ++ pinctrl-20 = <&d8_gpio_pulldown>; ++ ++ pinctrl-21 = <&d9_ehrpwm5_a>; ++ pinctrl-22 = <&d9_gpio>; ++ pinctrl-23 = <&d9_gpio_pullup>; ++ pinctrl-24 = <&d9_gpio_pulldown>; ++ ++ d4_ehrpwm0_a: d4-ehrpwm0-a-pins { ++ pinctrl-single,pins = < ++ /* (AG18) EHRPWM0_A */ ++ AM65X_IOPAD(0x0084, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d4_gpio: d4-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AG18) GPIO0_33 */ ++ AM65X_IOPAD(0x0084, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d4_gpio_pullup: d4-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AG18) GPIO0_33 */ ++ AM65X_IOPAD(0x0084, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d4_gpio_pulldown: d4-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AG18) GPIO0_33 */ ++ AM65X_IOPAD(0x0084, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d5_ehrpwm1_a: d5-ehrpwm1-a-pins { ++ pinctrl-single,pins = < ++ /* (AF17) EHRPWM1_A */ ++ AM65X_IOPAD(0x008C, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d5_gpio: d5-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AF17) GPIO0_35 */ ++ AM65X_IOPAD(0x008C, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d5_gpio_pullup: d5-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AF17) GPIO0_35 */ ++ AM65X_IOPAD(0x008C, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d5_gpio_pulldown: d5-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AF17) GPIO0_35 */ ++ AM65X_IOPAD(0x008C, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d6_ehrpwm2_a: d6-ehrpwm2-a-pins { ++ pinctrl-single,pins = < ++ /* (AH16) EHRPWM2_A */ ++ AM65X_IOPAD(0x0098, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d6_gpio: d6-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AH16) GPIO0_38 */ ++ AM65X_IOPAD(0x0098, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d6_gpio_pullup: d6-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AH16) GPIO0_38 */ ++ AM65X_IOPAD(0x0098, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d6_gpio_pulldown: d6-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AH16) GPIO0_38 */ ++ AM65X_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d7_ehrpwm3_a: d7-ehrpwm3-a-pins { ++ pinctrl-single,pins = < ++ /* (AH15) EHRPWM3_A */ ++ AM65X_IOPAD(0x00AC, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d7_gpio: d7-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AH15) GPIO0_43 */ ++ AM65X_IOPAD(0x00AC, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d7_gpio_pullup: d7-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AH15) GPIO0_43 */ ++ AM65X_IOPAD(0x00AC, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d7_gpio_pulldown: d7-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AH15) GPIO0_43 */ ++ AM65X_IOPAD(0x00AC, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d8_ehrpwm4_a: d8-ehrpwm4-a-pins { ++ pinctrl-single,pins = < ++ /* (AG15) EHRPWM4_A */ ++ AM65X_IOPAD(0x00C0, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d8_gpio: d8-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AG15) GPIO0_48 */ ++ AM65X_IOPAD(0x00C0, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d8_gpio_pullup: d8-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AG15) GPIO0_48 */ ++ AM65X_IOPAD(0x00C0, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d8_gpio_pulldown: d8-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AG15) GPIO0_48 */ ++ AM65X_IOPAD(0x00C0, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++ ++ d9_ehrpwm5_a: d9-ehrpwm5-a-pins { ++ pinctrl-single,pins = < ++ /* (AD15) EHRPWM5_A */ ++ AM65X_IOPAD(0x00CC, PIN_OUTPUT, 5) ++ >; ++ }; ++ ++ d9_gpio: d9-gpio-pins { ++ pinctrl-single,pins = < ++ /* (AD15) GPIO0_51 */ ++ AM65X_IOPAD(0x00CC, PIN_INPUT, 7) ++ >; ++ }; ++ ++ d9_gpio_pullup: d9-gpio-pullup-pins { ++ pinctrl-single,pins = < ++ /* (AD15) GPIO0_51 */ ++ AM65X_IOPAD(0x00CC, PIN_INPUT_PULLUP, 7) ++ >; ++ }; ++ ++ d9_gpio_pulldown: d9-gpio-pulldown-pins { ++ pinctrl-single,pins = < ++ /* (AD15) GPIO0_51 */ ++ AM65X_IOPAD(0x00CC, PIN_INPUT_PULLDOWN, 7) ++ >; ++ }; ++}; ++ ++&main_gpio0 { ++ gpio-line-names = ++ "main_gpio0-base", "", "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", "", "", ++ "", "", "", "IO4", "", "IO5", "", "", "IO6", "", ++ "", "", "", "IO7", "", "", "", "", "IO8", "", ++ "", "IO9"; ++}; ++ ++&wkup_gpio0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = ++ <&arduino_i2c_aio_switch_pins_default>, ++ <&arduino_io_oe_pins_default>, ++ <&push_button_pins_default>, ++ <&db9_com_mode_pins_default>; ++ gpio-line-names = ++ /* 0..9 */ ++ "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0", ++ "UART0-enable", "UART0-terminate", "", "WIFI-disable", ++ /* 10..19 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 20..29 */ ++ "", "A4A5-I2C-mux", "", "", "", "USER-button", "", "", "","IO0", ++ /* 30..39 */ ++ "IO1", "IO2", "", "IO3", "IO17-direction", "A5", ++ "IO16-direction", "IO15-direction", "IO14-direction", "A3", ++ /* 40..49 */ ++ "", "IO18-direction", "A4", "A2", "A1", "A0", "", "", "IO13", ++ "IO11", ++ /* 50..51 */ ++ "IO12", "IO10"; ++}; ++ ++&wkup_i2c0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wkup_i2c0_pins_default>; ++ clock-frequency = <400000>; ++}; ++ ++&mcu_i2c0 { ++ /* D4200 */ ++ pcal9535_1: gpio@20 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x20>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ gpio-line-names = ++ "A0-pull", "A1-pull", "A2-pull", "A3-pull", "A4-pull", ++ "A5-pull", "", "", ++ "IO14-enable", "IO15-enable", "IO16-enable", ++ "IO17-enable", "IO18-enable", "IO19-enable"; ++ }; ++ ++ /* D4201 */ ++ pcal9535_2: gpio@21 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x21>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ gpio-line-names = ++ "IO0-direction", "IO1-direction", "IO2-direction", ++ "IO3-direction", "IO4-direction", "IO5-direction", ++ "IO6-direction", "IO7-direction", ++ "IO8-direction", "IO9-direction", "IO10-direction", ++ "IO11-direction", "IO12-direction", "IO13-direction", ++ "IO19-direction"; ++ }; ++ ++ /* D4202 */ ++ pcal9535_3: gpio@25 { ++ compatible = "nxp,pcal9535"; ++ reg = <0x25>; ++ #gpio-cells = <2>; ++ gpio-controller; ++ gpio-line-names = ++ "IO0-pull", "IO1-pull", "IO2-pull", "IO3-pull", ++ "IO4-pull", "IO5-pull", "IO6-pull", "IO7-pull", ++ "IO8-pull", "IO9-pull", "IO10-pull", "IO11-pull", ++ "IO12-pull", "IO13-pull"; ++ }; ++}; ++ ++&mcu_uart0 { ++ status = "okay"; ++}; ++ ++&tscadc1 { ++ status = "okay"; ++ adc { ++ ti,adc-channels = <0 1 2 3 4 5>; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +index 00a250433203..f602dbc4e917 100644 +--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +@@ -184,434 +184,6 @@ icssg0_emac1: port@1 { + }; + + &wkup_pmx0 { +- pinctrl-names = +- "default", +- "d0-uart0-rxd", "d0-gpio", "d0-gpio-pullup", "d0-gpio-pulldown", +- "d1-uart0-txd", "d1-gpio", "d1-gpio-pullup", "d1-gpio-pulldown", +- "d2-uart0-ctsn", "d2-gpio", "d2-gpio-pullup", "d2-gpio-pulldown", +- "d3-uart0-rtsn", "d3-gpio", "d3-gpio-pullup", "d3-gpio-pulldown", +- "d10-spi0-cs0", "d10-gpio", "d10-gpio-pullup", "d10-gpio-pulldown", +- "d11-spi0-d0", "d11-gpio", "d11-gpio-pullup", "d11-gpio-pulldown", +- "d12-spi0-d1", "d12-gpio", "d12-gpio-pullup", "d12-gpio-pulldown", +- "d13-spi0-clk", "d13-gpio", "d13-gpio-pullup", "d13-gpio-pulldown", +- "a0-gpio", "a0-gpio-pullup", "a0-gpio-pulldown", +- "a1-gpio", "a1-gpio-pullup", "a1-gpio-pulldown", +- "a2-gpio", "a2-gpio-pullup", "a2-gpio-pulldown", +- "a3-gpio", "a3-gpio-pullup", "a3-gpio-pulldown", +- "a4-gpio", "a4-gpio-pullup", "a4-gpio-pulldown", +- "a5-gpio", "a5-gpio-pullup", "a5-gpio-pulldown"; +- +- pinctrl-0 = <&d0_uart0_rxd>; +- pinctrl-1 = <&d0_uart0_rxd>; +- pinctrl-2 = <&d0_gpio>; +- pinctrl-3 = <&d0_gpio_pullup>; +- pinctrl-4 = <&d0_gpio_pulldown>; +- pinctrl-5 = <&d1_uart0_txd>; +- pinctrl-6 = <&d1_gpio>; +- pinctrl-7 = <&d1_gpio_pullup>; +- pinctrl-8 = <&d1_gpio_pulldown>; +- pinctrl-9 = <&d2_uart0_ctsn>; +- pinctrl-10 = <&d2_gpio>; +- pinctrl-11 = <&d2_gpio_pullup>; +- pinctrl-12 = <&d2_gpio_pulldown>; +- pinctrl-13 = <&d3_uart0_rtsn>; +- pinctrl-14 = <&d3_gpio>; +- pinctrl-15 = <&d3_gpio_pullup>; +- pinctrl-16 = <&d3_gpio_pulldown>; +- pinctrl-17 = <&d10_spi0_cs0>; +- pinctrl-18 = <&d10_gpio>; +- pinctrl-19 = <&d10_gpio_pullup>; +- pinctrl-20 = <&d10_gpio_pulldown>; +- pinctrl-21 = <&d11_spi0_d0>; +- pinctrl-22 = <&d11_gpio>; +- pinctrl-23 = <&d11_gpio_pullup>; +- pinctrl-24 = <&d11_gpio_pulldown>; +- pinctrl-25 = <&d12_spi0_d1>; +- pinctrl-26 = <&d12_gpio>; +- pinctrl-27 = <&d12_gpio_pullup>; +- pinctrl-28 = <&d12_gpio_pulldown>; +- pinctrl-29 = <&d13_spi0_clk>; +- pinctrl-30 = <&d13_gpio>; +- pinctrl-31 = <&d13_gpio_pullup>; +- pinctrl-32 = <&d13_gpio_pulldown>; +- pinctrl-33 = <&a0_gpio>; +- pinctrl-34 = <&a0_gpio_pullup>; +- pinctrl-35 = <&a0_gpio_pulldown>; +- pinctrl-36 = <&a1_gpio>; +- pinctrl-37 = <&a1_gpio_pullup>; +- pinctrl-38 = <&a1_gpio_pulldown>; +- pinctrl-39 = <&a2_gpio>; +- pinctrl-40 = <&a2_gpio_pullup>; +- pinctrl-41 = <&a2_gpio_pulldown>; +- pinctrl-42 = <&a3_gpio>; +- pinctrl-43 = <&a3_gpio_pullup>; +- pinctrl-44 = <&a3_gpio_pulldown>; +- pinctrl-45 = <&a4_gpio>; +- pinctrl-46 = <&a4_gpio_pullup>; +- pinctrl-47 = <&a4_gpio_pulldown>; +- pinctrl-48 = <&a5_gpio>; +- pinctrl-49 = <&a5_gpio_pullup>; +- pinctrl-50 = <&a5_gpio_pulldown>; +- +- d0_uart0_rxd: d0-uart0-rxd-pins { +- pinctrl-single,pins = < +- /* (P4) MCU_UART0_RXD */ +- AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) +- >; +- }; +- +- d0_gpio: d0-gpio-pins { +- pinctrl-single,pins = < +- /* (P4) WKUP_GPIO0_29 */ +- AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 7) +- >; +- }; +- +- d0_gpio_pullup: d0-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (P4) WKUP_GPIO0_29 */ +- AM65X_WKUP_IOPAD(0x0044, PIN_INPUT_PULLUP, 7) +- >; +- }; +- +- d0_gpio_pulldown: d0-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (P4) WKUP_GPIO0_29 */ +- AM65X_WKUP_IOPAD(0x0044, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d1_uart0_txd: d1-uart0-txd-pins { +- pinctrl-single,pins = < +- /* (P5) MCU_UART0_TXD */ +- AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) +- >; +- }; +- +- d1_gpio: d1-gpio-pins { +- pinctrl-single,pins = < +- /* (P5) WKUP_GPIO0_30 */ +- AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) +- >; +- }; +- +- d1_gpio_pullup: d1-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (P5) WKUP_GPIO0_30 */ +- AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) +- >; +- }; +- +- d1_gpio_pulldown: d1-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (P5) WKUP_GPIO0_30 */ +- AM65X_WKUP_IOPAD(0x0048, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d2_uart0_ctsn: d2-uart0-ctsn-pins { +- pinctrl-single,pins = < +- /* (P1) MCU_UART0_CTSn */ +- AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) +- >; +- }; +- +- d2_gpio: d2-gpio-pins { +- pinctrl-single,pins = < +- /* (P5) WKUP_GPIO0_31 */ +- AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7) +- >; +- }; +- +- d2_gpio_pullup: d2-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (P5) WKUP_GPIO0_31 */ +- AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7) +- >; +- }; +- +- d2_gpio_pulldown: d2-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (P5) WKUP_GPIO0_31 */ +- AM65X_WKUP_IOPAD(0x004C, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d3_uart0_rtsn: d3-uart0-rtsn-pins { +- pinctrl-single,pins = < +- /* (N3) MCU_UART0_RTSn */ +- AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) +- >; +- }; +- +- d3_gpio: d3-gpio-pins { +- pinctrl-single,pins = < +- /* (N3) WKUP_GPIO0_33 */ +- AM65X_WKUP_IOPAD(0x0054, PIN_INPUT, 7) +- >; +- }; +- +- d3_gpio_pullup: d3-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (N3) WKUP_GPIO0_33 */ +- AM65X_WKUP_IOPAD(0x0054, PIN_INPUT, 7) +- >; +- }; +- +- d3_gpio_pulldown: d3-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (N3) WKUP_GPIO0_33 */ +- AM65X_WKUP_IOPAD(0x0054, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d10_spi0_cs0: d10-spi0-cs0-pins { +- pinctrl-single,pins = < +- /* (Y4) MCU_SPI0_CS0 */ +- AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) +- >; +- }; +- +- d10_gpio: d10-gpio-pins { +- pinctrl-single,pins = < +- /* (Y4) WKUP_GPIO0_51 */ +- AM65X_WKUP_IOPAD(0x009c, PIN_INPUT, 7) +- >; +- }; +- +- d10_gpio_pullup: d10-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (Y4) WKUP_GPIO0_51 */ +- AM65X_WKUP_IOPAD(0x009c, PIN_INPUT, 7) +- >; +- }; +- +- d10_gpio_pulldown: d10-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (Y4) WKUP_GPIO0_51 */ +- AM65X_WKUP_IOPAD(0x009c, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d11_spi0_d0: d11-spi0-d0-pins { +- pinctrl-single,pins = < +- /* (Y3) MCU_SPI0_D0 */ +- AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 0) +- >; +- }; +- +- d11_gpio: d11-gpio-pins { +- pinctrl-single,pins = < +- /* (Y3) WKUP_GPIO0_49 */ +- AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 7) +- >; +- }; +- +- d11_gpio_pullup: d11-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (Y3) WKUP_GPIO0_49 */ +- AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 7) +- >; +- }; +- +- d11_gpio_pulldown: d11-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (Y3) WKUP_GPIO0_49 */ +- AM65X_WKUP_IOPAD(0x0094, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d12_spi0_d1: d12-spi0-d1-pins { +- pinctrl-single,pins = < +- /* (Y2) MCU_SPI0_D1 */ +- AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 0) +- >; +- }; +- +- d12_gpio: d12-gpio-pins { +- pinctrl-single,pins = < +- /* (Y2) WKUP_GPIO0_50 */ +- AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 7) +- >; +- }; +- +- d12_gpio_pullup: d12-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (Y2) WKUP_GPIO0_50 */ +- AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 7) +- >; +- }; +- +- d12_gpio_pulldown: d12-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (Y2) WKUP_GPIO0_50 */ +- AM65X_WKUP_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d13_spi0_clk: d13-spi0-clk-pins { +- pinctrl-single,pins = < +- /* (Y1) MCU_SPI0_CLK */ +- AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 0) +- >; +- }; +- +- d13_gpio: d13-gpio-pins { +- pinctrl-single,pins = < +- /* (Y1) WKUP_GPIO0_48 */ +- AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 7) +- >; +- }; +- +- d13_gpio_pullup: d13-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (Y1) WKUP_GPIO0_48 */ +- AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 7) +- >; +- }; +- +- d13_gpio_pulldown: d13-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (Y1) WKUP_GPIO0_48 */ +- AM65X_WKUP_IOPAD(0x0090, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- a0_gpio: a0-gpio-pins { +- pinctrl-single,pins = < +- /* (L6) WKUP_GPIO0_45 */ +- AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 7) +- >; +- }; +- +- a0_gpio_pullup: a0-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (L6) WKUP_GPIO0_45 */ +- AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 7) +- >; +- }; +- +- a0_gpio_pulldown: a0-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (L6) WKUP_GPIO0_45 */ +- AM65X_WKUP_IOPAD(0x0084, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- a1_gpio: a1-gpio-pins { +- pinctrl-single,pins = < +- /* (M6) WKUP_GPIO0_44 */ +- AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 7) +- >; +- }; +- +- a1_gpio_pullup: a1-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (M6) WKUP_GPIO0_44 */ +- AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 7) +- >; +- }; +- +- a1_gpio_pulldown: a1-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (M6) WKUP_GPIO0_44 */ +- AM65X_WKUP_IOPAD(0x0080, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- a2_gpio: a2-gpio-pins { +- pinctrl-single,pins = < +- /* (L5) WKUP_GPIO0_43 */ +- AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7) +- >; +- }; +- +- a2_gpio_pullup: a2-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (L5) WKUP_GPIO0_43 */ +- AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7) +- >; +- }; +- +- a2_gpio_pulldown: a2-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (L5) WKUP_GPIO0_43 */ +- AM65X_WKUP_IOPAD(0x007C, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- a3_gpio: a3-gpio-pins { +- pinctrl-single,pins = < +- /* (M5) WKUP_GPIO0_39 */ +- AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7) +- >; +- }; +- +- a3_gpio_pullup: a3-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (M5) WKUP_GPIO0_39 */ +- AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7) +- >; +- }; +- +- a3_gpio_pulldown: a3-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (M5) WKUP_GPIO0_39 */ +- AM65X_WKUP_IOPAD(0x006C, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- a4_gpio: a4-gpio-pins { +- pinctrl-single,pins = < +- /* (L2) WKUP_GPIO0_42 */ +- AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 7) +- >; +- }; +- +- a4_gpio_pullup: a4-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (L2) WKUP_GPIO0_42 */ +- AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 7) +- >; +- }; +- +- a4_gpio_pulldown: a4-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (L2) WKUP_GPIO0_42 */ +- AM65X_WKUP_IOPAD(0x0078, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- a5_gpio: a5-gpio-pins { +- pinctrl-single,pins = < +- /* (N5) WKUP_GPIO0_35 */ +- AM65X_WKUP_IOPAD(0x005C, PIN_INPUT, 7) +- >; +- }; +- +- a5_gpio_pullup: a5-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (N5) WKUP_GPIO0_35 */ +- AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLUP, 7) +- >; +- }; +- +- a5_gpio_pulldown: a5-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (N5) WKUP_GPIO0_35 */ +- AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- wkup_i2c0_pins_default: wkup-i2c0-default-pins { +- pinctrl-single,pins = < +- /* (AC7) WKUP_I2C0_SCL */ +- AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) +- /* (AD6) WKUP_I2C0_SDA */ +- AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) +- >; +- }; +- + mcu_i2c0_pins_default: mcu-i2c0-default-pins { + pinctrl-single,pins = < + /* (AD8) MCU_I2C0_SCL */ +@@ -621,13 +193,6 @@ AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) + >; + }; + +- arduino_i2c_aio_switch_pins_default: arduino-i2c-aio-switch-default-pins { +- pinctrl-single,pins = < +- /* (R2) WKUP_GPIO0_21 */ +- AM65X_WKUP_IOPAD(0x0024, PIN_OUTPUT, 7) +- >; +- }; +- + push_button_pins_default: push-button-default-pins { + pinctrl-single,pins = < + /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */ +@@ -635,21 +200,6 @@ AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) + >; + }; + +- arduino_io_oe_pins_default: arduino-io-oe-default-pins { +- pinctrl-single,pins = < +- /* (N4) WKUP_GPIO0_34 */ +- AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 7) +- /* (M2) WKUP_GPIO0_36 */ +- AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 7) +- /* (M3) WKUP_GPIO0_37 */ +- AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 7) +- /* (M4) WKUP_GPIO0_38 */ +- AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 7) +- /* (M1) WKUP_GPIO0_41 */ +- AM65X_WKUP_IOPAD(0x0074, PIN_OUTPUT, 7) +- >; +- }; +- + mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { + pinctrl-single,pins = < + /* (V1) MCU_OSPI0_CLK */ +@@ -713,214 +263,6 @@ AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7) + }; + + &main_pmx0 { +- pinctrl-names = +- "default", +- "d4-ehrpwm0-a", "d4-gpio", "d4-gpio-pullup", "d4-gpio-pulldown", +- "d5-ehrpwm1-a", "d5-gpio", "d5-gpio-pullup", "d5-gpio-pulldown", +- "d6-ehrpwm2-a", "d6-gpio", "d6-gpio-pullup", "d6-gpio-pulldown", +- "d7-ehrpwm3-a", "d7-gpio", "d7-gpio-pullup", "d7-gpio-pulldown", +- "d8-ehrpwm4-a", "d8-gpio", "d8-gpio-pullup", "d8-gpio-pulldown", +- "d9-ehrpwm5-a", "d9-gpio", "d9-gpio-pullup", "d9-gpio-pulldown"; +- +- pinctrl-0 = <&d4_ehrpwm0_a>; +- pinctrl-1 = <&d4_ehrpwm0_a>; +- pinctrl-2 = <&d4_gpio>; +- pinctrl-3 = <&d4_gpio_pullup>; +- pinctrl-4 = <&d4_gpio_pulldown>; +- +- pinctrl-5 = <&d5_ehrpwm1_a>; +- pinctrl-6 = <&d5_gpio>; +- pinctrl-7 = <&d5_gpio_pullup>; +- pinctrl-8 = <&d5_gpio_pulldown>; +- +- pinctrl-9 = <&d6_ehrpwm2_a>; +- pinctrl-10 = <&d6_gpio>; +- pinctrl-11 = <&d6_gpio_pullup>; +- pinctrl-12 = <&d6_gpio_pulldown>; +- +- pinctrl-13 = <&d7_ehrpwm3_a>; +- pinctrl-14 = <&d7_gpio>; +- pinctrl-15 = <&d7_gpio_pullup>; +- pinctrl-16 = <&d7_gpio_pulldown>; +- +- pinctrl-17 = <&d8_ehrpwm4_a>; +- pinctrl-18 = <&d8_gpio>; +- pinctrl-19 = <&d8_gpio_pullup>; +- pinctrl-20 = <&d8_gpio_pulldown>; +- +- pinctrl-21 = <&d9_ehrpwm5_a>; +- pinctrl-22 = <&d9_gpio>; +- pinctrl-23 = <&d9_gpio_pullup>; +- pinctrl-24 = <&d9_gpio_pulldown>; +- +- d4_ehrpwm0_a: d4-ehrpwm0-a-pins { +- pinctrl-single,pins = < +- /* (AG18) EHRPWM0_A */ +- AM65X_IOPAD(0x0084, PIN_OUTPUT, 5) +- >; +- }; +- +- d4_gpio: d4-gpio-pins { +- pinctrl-single,pins = < +- /* (AG18) GPIO0_33 */ +- AM65X_IOPAD(0x0084, PIN_INPUT, 7) +- >; +- }; +- +- d4_gpio_pullup: d4-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (AG18) GPIO0_33 */ +- AM65X_IOPAD(0x0084, PIN_INPUT_PULLUP, 7) +- >; +- }; +- +- d4_gpio_pulldown: d4-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (AG18) GPIO0_33 */ +- AM65X_IOPAD(0x0084, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d5_ehrpwm1_a: d5-ehrpwm1-a-pins { +- pinctrl-single,pins = < +- /* (AF17) EHRPWM1_A */ +- AM65X_IOPAD(0x008C, PIN_OUTPUT, 5) +- >; +- }; +- +- d5_gpio: d5-gpio-pins { +- pinctrl-single,pins = < +- /* (AF17) GPIO0_35 */ +- AM65X_IOPAD(0x008C, PIN_INPUT, 7) +- >; +- }; +- +- d5_gpio_pullup: d5-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (AF17) GPIO0_35 */ +- AM65X_IOPAD(0x008C, PIN_INPUT_PULLUP, 7) +- >; +- }; +- +- d5_gpio_pulldown: d5-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (AF17) GPIO0_35 */ +- AM65X_IOPAD(0x008C, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d6_ehrpwm2_a: d6-ehrpwm2-a-pins { +- pinctrl-single,pins = < +- /* (AH16) EHRPWM2_A */ +- AM65X_IOPAD(0x0098, PIN_OUTPUT, 5) +- >; +- }; +- +- d6_gpio: d6-gpio-pins { +- pinctrl-single,pins = < +- /* (AH16) GPIO0_38 */ +- AM65X_IOPAD(0x0098, PIN_INPUT, 7) +- >; +- }; +- +- d6_gpio_pullup: d6-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (AH16) GPIO0_38 */ +- AM65X_IOPAD(0x0098, PIN_INPUT_PULLUP, 7) +- >; +- }; +- +- d6_gpio_pulldown: d6-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (AH16) GPIO0_38 */ +- AM65X_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d7_ehrpwm3_a: d7-ehrpwm3-a-pins { +- pinctrl-single,pins = < +- /* (AH15) EHRPWM3_A */ +- AM65X_IOPAD(0x00AC, PIN_OUTPUT, 5) +- >; +- }; +- +- d7_gpio: d7-gpio-pins { +- pinctrl-single,pins = < +- /* (AH15) GPIO0_43 */ +- AM65X_IOPAD(0x00AC, PIN_INPUT, 7) +- >; +- }; +- +- d7_gpio_pullup: d7-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (AH15) GPIO0_43 */ +- AM65X_IOPAD(0x00AC, PIN_INPUT_PULLUP, 7) +- >; +- }; +- +- d7_gpio_pulldown: d7-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (AH15) GPIO0_43 */ +- AM65X_IOPAD(0x00AC, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d8_ehrpwm4_a: d8-ehrpwm4-a-pins { +- pinctrl-single,pins = < +- /* (AG15) EHRPWM4_A */ +- AM65X_IOPAD(0x00C0, PIN_OUTPUT, 5) +- >; +- }; +- +- d8_gpio: d8-gpio-pins { +- pinctrl-single,pins = < +- /* (AG15) GPIO0_48 */ +- AM65X_IOPAD(0x00C0, PIN_INPUT, 7) +- >; +- }; +- +- d8_gpio_pullup: d8-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (AG15) GPIO0_48 */ +- AM65X_IOPAD(0x00C0, PIN_INPUT_PULLUP, 7) +- >; +- }; +- +- d8_gpio_pulldown: d8-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (AG15) GPIO0_48 */ +- AM65X_IOPAD(0x00C0, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- +- d9_ehrpwm5_a: d9-ehrpwm5-a-pins { +- pinctrl-single,pins = < +- /* (AD15) EHRPWM5_A */ +- AM65X_IOPAD(0x00CC, PIN_OUTPUT, 5) +- >; +- }; +- +- d9_gpio: d9-gpio-pins { +- pinctrl-single,pins = < +- /* (AD15) GPIO0_51 */ +- AM65X_IOPAD(0x00CC, PIN_INPUT, 7) +- >; +- }; +- +- d9_gpio_pullup: d9-gpio-pullup-pins { +- pinctrl-single,pins = < +- /* (AD15) GPIO0_51 */ +- AM65X_IOPAD(0x00CC, PIN_INPUT_PULLUP, 7) +- >; +- }; +- +- d9_gpio_pulldown: d9-gpio-pulldown-pins { +- pinctrl-single,pins = < +- /* (AD15) GPIO0_51 */ +- AM65X_IOPAD(0x00CC, PIN_INPUT_PULLDOWN, 7) +- >; +- }; +- + main_pcie_enable_pins_default: main-pcie-enable-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */ +@@ -1082,52 +424,11 @@ &main_uart2 { + status = "disabled"; + }; + +-&main_gpio0 { +- gpio-line-names = +- "main_gpio0-base", "", "", "", "", "", "", "", "", "", +- "", "", "", "", "", "", "", "", "", "", +- "", "", "", "", "", "", "", "", "", "", +- "", "", "", "IO4", "", "IO5", "", "", "IO6", "", +- "", "", "", "IO7", "", "", "", "", "IO8", "", +- "", "IO9"; +-}; +- + &main_gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_pcie_enable_pins_default>; + }; + +-&wkup_gpio0 { +- pinctrl-names = "default"; +- pinctrl-0 = +- <&arduino_i2c_aio_switch_pins_default>, +- <&arduino_io_oe_pins_default>, +- <&push_button_pins_default>, +- <&db9_com_mode_pins_default>; +- gpio-line-names = +- /* 0..9 */ +- "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0", +- "UART0-enable", "UART0-terminate", "", "WIFI-disable", +- /* 10..19 */ +- "", "", "", "", "", "", "", "", "", "", +- /* 20..29 */ +- "", "A4A5-I2C-mux", "", "", "", "USER-button", "", "", "","IO0", +- /* 30..39 */ +- "IO1", "IO2", "", "IO3", "IO17-direction", "A5", +- "IO16-direction", "IO15-direction", "IO14-direction", "A3", +- /* 40..49 */ +- "", "IO18-direction", "A4", "A2", "A1", "A0", "", "", "IO13", +- "IO11", +- /* 50..51 */ +- "IO12", "IO10"; +-}; +- +-&wkup_i2c0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&wkup_i2c0_pins_default>; +- clock-frequency = <400000>; +-}; +- + &mcu_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_i2c0_pins_default>; +@@ -1144,47 +445,6 @@ psu: regulator@60 { + ti,vsel1-state-high; + ti,enable-vout-discharge; + }; +- +- /* D4200 */ +- pcal9535_1: gpio@20 { +- compatible = "nxp,pcal9535"; +- reg = <0x20>; +- #gpio-cells = <2>; +- gpio-controller; +- gpio-line-names = +- "A0-pull", "A1-pull", "A2-pull", "A3-pull", "A4-pull", +- "A5-pull", "", "", +- "IO14-enable", "IO15-enable", "IO16-enable", +- "IO17-enable", "IO18-enable", "IO19-enable"; +- }; +- +- /* D4201 */ +- pcal9535_2: gpio@21 { +- compatible = "nxp,pcal9535"; +- reg = <0x21>; +- #gpio-cells = <2>; +- gpio-controller; +- gpio-line-names = +- "IO0-direction", "IO1-direction", "IO2-direction", +- "IO3-direction", "IO4-direction", "IO5-direction", +- "IO6-direction", "IO7-direction", +- "IO8-direction", "IO9-direction", "IO10-direction", +- "IO11-direction", "IO12-direction", "IO13-direction", +- "IO19-direction"; +- }; +- +- /* D4202 */ +- pcal9535_3: gpio@25 { +- compatible = "nxp,pcal9535"; +- reg = <0x25>; +- #gpio-cells = <2>; +- gpio-controller; +- gpio-line-names = +- "IO0-pull", "IO1-pull", "IO2-pull", "IO3-pull", +- "IO4-pull", "IO5-pull", "IO6-pull", "IO7-pull", +- "IO8-pull", "IO9-pull", "IO10-pull", "IO11-pull", +- "IO12-pull", "IO13-pull"; +- }; + }; + + &main_i2c0 { +@@ -1291,12 +551,6 @@ &tscadc0 { + status = "disabled"; + }; + +-&tscadc1 { +- adc { +- ti,adc-channels = <0 1 2 3 4 5>; +- }; +-}; +- + &ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; +diff --git a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi +index bba5dc527f52..e865f0ae5550 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi +@@ -10,6 +10,7 @@ + */ + + #include "k3-am65-iot2050-common.dtsi" ++#include "k3-am65-iot2050-arduino-connector.dtsi" + + / { + memory@80000000 { +diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +index 1e5d4d98b69b..2401cbe2b66c 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts ++++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +@@ -15,6 +15,7 @@ + + #include "k3-am6548-iot2050-advanced-common.dtsi" + #include "k3-am65-iot2050-common-pg2.dtsi" ++#include "k3-am65-iot2050-arduino-connector.dtsi" + + / { + compatible = "siemens,iot2050-advanced-m2", "ti,am654"; +diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts +index a8ce8c891894..c1205feef54e 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts ++++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-pg2.dts +@@ -17,6 +17,7 @@ + + #include "k3-am6548-iot2050-advanced-common.dtsi" + #include "k3-am65-iot2050-common-pg2.dtsi" ++#include "k3-am65-iot2050-arduino-connector.dtsi" + + / { + compatible = "siemens,iot2050-advanced-pg2", "ti,am654"; +diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts +index 077f165bdc68..b66965f992b9 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts ++++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts +@@ -17,6 +17,7 @@ + + #include "k3-am6548-iot2050-advanced-common.dtsi" + #include "k3-am65-iot2050-common-pg1.dtsi" ++#include "k3-am65-iot2050-arduino-connector.dtsi" + + / { + compatible = "siemens,iot2050-advanced", "ti,am654"; diff --git a/recipes-kernel/linux/files/patches-6.1/0080-dt-bindings-vendor-prefixes-Add-EVERLIGHT.patch b/recipes-kernel/linux/files/patches-6.1/0080-dt-bindings-vendor-prefixes-Add-EVERLIGHT.patch new file mode 100644 index 000000000..1ad4ac1ce --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0080-dt-bindings-vendor-prefixes-Add-EVERLIGHT.patch @@ -0,0 +1,25 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Fri, 24 Nov 2023 21:03:58 +0800 +Subject: [PATCH] dt-bindings: vendor-prefixes: Add EVERLIGHT + +Add vendor prefix for EVERLIGHT Electronics Co., Ltd. + +Signed-off-by: Baocheng Su +--- + Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml +index 6e323a380294..a94b386eb175 100644 +--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml ++++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml +@@ -428,6 +428,8 @@ patternProperties: + description: Eukréa Electromatique + "^everest,.*": + description: Everest Semiconductor Co. Ltd. ++ "^everlight,.*": ++ description: EVERLIGHT Electronics Co., Ltd. + "^everspin,.*": + description: Everspin Technologies, Inc. + "^evervision,.*": diff --git a/recipes-kernel/linux/files/patches-6.1/0081-dt-bindings-iio-Add-everlight-pm16d17-binding.patch b/recipes-kernel/linux/files/patches-6.1/0081-dt-bindings-iio-Add-everlight-pm16d17-binding.patch new file mode 100644 index 000000000..930979f1e --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0081-dt-bindings-iio-Add-everlight-pm16d17-binding.patch @@ -0,0 +1,115 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: chao zeng +Date: Tue, 16 May 2023 21:10:47 +0800 +Subject: [PATCH] dt-bindings: iio: Add everlight pm16d17 binding + +Add the binding document for the everlight pm16d17 sensor. + +Signed-off-by: Chao Zeng +Co-developed-by: Baocheng Su +Signed-off-by: Baocheng Su +--- + .../iio/proximity/everlight,pm16d17.yaml | 94 +++++++++++++++++++ + 1 file changed, 94 insertions(+) + create mode 100644 Documentation/devicetree/bindings/iio/proximity/everlight,pm16d17.yaml + +diff --git a/Documentation/devicetree/bindings/iio/proximity/everlight,pm16d17.yaml b/Documentation/devicetree/bindings/iio/proximity/everlight,pm16d17.yaml +new file mode 100644 +index 000000000000..4b488d6cafa2 +--- /dev/null ++++ b/Documentation/devicetree/bindings/iio/proximity/everlight,pm16d17.yaml +@@ -0,0 +1,94 @@ ++# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/iio/proximity/everlight,pm16d17.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Everlight PM-16D17 Ambient Light & Proximity Sensor ++ ++maintainers: ++ - Chao Zeng ++ ++description: | ++ This sensor uses standard I2C interface. Interrupt function is not covered ++ ++properties: ++ compatible: ++ enum: ++ - everlight,pm16d17 ++ ++ reg: ++ maxItems: 1 ++ ++ ps-gain: ++ description: Receiver gain of proximity sensor ++ $ref: /schemas/types.yaml#/definitions/uint32 ++ enum: [1, 2, 4, 8] ++ default: 1 ++ ++ ps-itime: ++ description: Conversion time for proximity sensor [ms] ++ $ref: /schemas/types.yaml#/definitions/string ++ enum: ++ - "0.4" ++ - "0.8" ++ - "1.6" ++ - "3.2" ++ - "6.3" ++ - "12.6" ++ - "25.2" ++ default: "0.4" ++ ++ ps-wtime: ++ description: Waiting time for proximity sensor [ms] ++ $ref: /schemas/types.yaml#/definitions/string ++ enum: ++ - "12.5" ++ - "25" ++ - "50" ++ - "100" ++ - "200" ++ - "400" ++ - "800" ++ - "1600" ++ default: "12.5" ++ ++ ps-ir-led-pulse-count: ++ description: IR LED drive pulse count ++ $ref: /schemas/types.yaml#/definitions/uint32 ++ minimum: 1 ++ maximum: 256 ++ default: 1 ++ ++ ps-offset-cancel: ++ description: | ++ When PS offset cancel function is enabled, the result of subtracting any ++ value specified by the PS offset cancel register from the internal PS ++ output data is written to the PS output data register. ++ $ref: /schemas/types.yaml#/definitions/uint32 ++ default: 0 ++ maximum: 65535 ++ ++required: ++ - compatible ++ - reg ++ ++unevaluatedProperties: false ++ ++examples: ++ - | ++ i2c { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ lightsensor: pm16d17@44 { ++ compatible = "everlight,pm16d17"; ++ reg = <0x44>; ++ ++ ps-gain = <1>; ++ ps-itime = "0.4"; ++ ps-wtime = "12.5"; ++ ps-ir-led-pulse-count = <1>; ++ ps-offset-cancel = <280>; ++ }; ++ }; diff --git a/recipes-kernel/linux/files/patches-6.1/0082-iio-proximity-Add-support-for-everlight-pmd16d17-sen.patch b/recipes-kernel/linux/files/patches-6.1/0082-iio-proximity-Add-support-for-everlight-pmd16d17-sen.patch new file mode 100644 index 000000000..c397f33b4 --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0082-iio-proximity-Add-support-for-everlight-pmd16d17-sen.patch @@ -0,0 +1,393 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: chao zeng +Date: Mon, 15 May 2023 22:30:25 +0800 +Subject: [PATCH] iio: proximity: Add support for everlight pmd16d17 sensor + +Add initial support for everlight pm16d17 proximity sensor. + +Signed-off-by: Chao Zeng +Co-developed-by: Baocheng Su +Signed-off-by: Baocheng Su +--- + drivers/iio/proximity/Kconfig | 11 ++ + drivers/iio/proximity/Makefile | 1 + + drivers/iio/proximity/pm16d17.c | 336 ++++++++++++++++++++++++++++++++ + 3 files changed, 348 insertions(+) + create mode 100644 drivers/iio/proximity/pm16d17.c + +diff --git a/drivers/iio/proximity/Kconfig b/drivers/iio/proximity/Kconfig +index 0e5c17530b8b..809c1495bee0 100644 +--- a/drivers/iio/proximity/Kconfig ++++ b/drivers/iio/proximity/Kconfig +@@ -84,6 +84,17 @@ config PING + To compile this driver as a module, choose M here: the + module will be called ping. + ++config PM16D17 ++ tristate "PM16D17 proximity sensor" ++ select REGMAP_I2C ++ depends on I2C ++ help ++ Say Y here to build a driver for the Everlight Devices ++ PM16D17 proximity sensor. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called pm16d17. ++ + config RFD77402 + tristate "RFD77402 ToF sensor" + depends on I2C +diff --git a/drivers/iio/proximity/Makefile b/drivers/iio/proximity/Makefile +index cc838bb5408a..8bf203a6807a 100644 +--- a/drivers/iio/proximity/Makefile ++++ b/drivers/iio/proximity/Makefile +@@ -10,6 +10,7 @@ obj-$(CONFIG_ISL29501) += isl29501.o + obj-$(CONFIG_LIDAR_LITE_V2) += pulsedlight-lidar-lite-v2.o + obj-$(CONFIG_MB1232) += mb1232.o + obj-$(CONFIG_PING) += ping.o ++obj-$(CONFIG_PM16D17) += pm16d17.o + obj-$(CONFIG_RFD77402) += rfd77402.o + obj-$(CONFIG_SRF04) += srf04.o + obj-$(CONFIG_SRF08) += srf08.o +diff --git a/drivers/iio/proximity/pm16d17.c b/drivers/iio/proximity/pm16d17.c +new file mode 100644 +index 000000000000..77db4b23b80f +--- /dev/null ++++ b/drivers/iio/proximity/pm16d17.c +@@ -0,0 +1,336 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * Copyright (c) Siemens AG, 2023 ++ * ++ * Driver for Everlight PM-16d17 proximity sensor ++ * ++ * Author: Chao Zeng ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define PM16D17_DRV_NAME "pm16d17" ++#define PM16D17_REGMAP_NAME "pm16d17_regmap" ++ ++/* Registers Address */ ++#define PM16D17_OP_MODE 0x00 ++#define PM16D17_INTERRUPT_FLAG 0x01 ++#define PM16D17_PS_SETTING 0x0A ++#define PM16D17_VCSEL_DRIVE_CURRENT 0x0B ++#define PM16D17_VCSEL_DRIVE_PULSE 0x0C ++#define PM16D17_PS_INTUPT_LTHD_L 0x0D ++#define PM16D17_PS_INTUPT_LTHD_H 0x0E ++#define PM16D17_PS_INTUPT_HTHD_L 0x0F ++#define PM16D17_PS_INTUPT_HTHD_H 0x10 ++#define PM16D17_PS_DATA_L 0x11 ++#define PM16D17_PS_DATA_H 0x12 ++#define PM16D17_PS_SETTING2 0x13 ++#define PM16D17_PS_OFFSET_CANCEL_L 0x14 ++#define PM16D17_PS_OFFSET_CANCEL_H 0x15 ++#define PM16D17_DEV_ID 0x18 ++ ++#define DEVICE_ID 0x11 ++ ++#define ENABLE_PS_FUNCTION BIT(3) ++#define PS_GAIN_MASK GENMASK(7, 6) ++#define PS_ITIME_MASK GENMASK(5, 3) ++#define PS_WTIME_MASK GENMASK(2, 0) ++#define OFFSET_CANCEL_ENABLE BIT(7) ++#define PS_OFFSET_CANCEL_LSB_MASK GENMASK(7, 0) ++#define PS_OFFSET_CANCEL_MSB_MASK GENMASK(15, 8) ++ ++enum { ++ PITIME_0_POINT_4_MS = (0 << 3), ++ PITIME_0_POINT_8_MS = (1 << 3), ++ PITIME_1_POINT_6_MS = (2 << 3), ++ PITIME_3_POINT_2_MS = (3 << 3), ++ PITIME_6_POINT_3_MS = (4 << 3), ++ PITIME_12_POINT_6_MS = (5 << 3), ++ PITIME_25_POINT_2_MS = (6 << 3), ++}; ++ ++enum { ++ PWTIME_12_POINT_5_MS = 0, ++ PWTIME_25_MS, ++ PWTIME_50_MS, ++ PWTIME_100_MS, ++ PWTIME_200_MS, ++ PWTIME_400_MS, ++ PWTIME_800_MS, ++ PWTIME_1600_MS, ++}; ++ ++struct pm16d17_data { ++ struct i2c_client *client; ++ struct regmap *regmap; ++ struct mutex lock; ++}; ++ ++static const struct regmap_config pm16d17_regmap_config = { ++ .name = PM16D17_REGMAP_NAME, ++ .reg_bits = 8, ++ .val_bits = 8, ++ .cache_type = REGCACHE_NONE, ++}; ++ ++static const struct iio_chan_spec pm16d17_channels[] = { ++ { ++ .type = IIO_PROXIMITY, ++ .indexed = 1, ++ .channel = 0, ++ .scan_index = -1, ++ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), ++ } ++}; ++ ++static inline int pm16d17_write_reg(struct pm16d17_data *data, ++ unsigned int reg, ++ unsigned int value) ++{ ++ return regmap_write(data->regmap, reg, value); ++} ++ ++static inline unsigned int pm16d17_read_reg(struct pm16d17_data *data, ++ unsigned int reg, ++ unsigned int *reg_val) ++{ ++ return regmap_read(data->regmap, reg, reg_val); ++} ++ ++static int pm16d17_read_raw(struct iio_dev *indio_dev, ++ struct iio_chan_spec const *chan, ++ int *val, int *val2, long mask) ++{ ++ struct pm16d17_data *data = iio_priv(indio_dev); ++ unsigned int ps_data_l; ++ unsigned int ps_data_h; ++ uint16_t ps_data; ++ int ret = -EINVAL; ++ ++ mutex_lock(&data->lock); ++ ++ switch (mask) { ++ case IIO_CHAN_INFO_RAW: ++ switch (chan->type) { ++ case IIO_PROXIMITY: ++ ret = pm16d17_read_reg(data, PM16D17_PS_DATA_L, &ps_data_l); ++ if (ret < 0) ++ goto fail; ++ ++ ret = pm16d17_read_reg(data, PM16D17_PS_DATA_H, &ps_data_h); ++ if (ret < 0) ++ goto fail; ++ ++ ps_data = (ps_data_h << 8) | ps_data_l; ++ ++ dev_dbg(&data->client->dev, "PS data: %x\n", ps_data); ++ ++ *val = ps_data; ++ ret = IIO_VAL_INT; ++ break; ++ default: ++ break; ++ } ++ default: ++ break; ++ } ++fail: ++ mutex_unlock(&data->lock); ++ ++ return ret; ++} ++ ++static const struct iio_info pm16d17_info = { ++ .read_raw = pm16d17_read_raw, ++}; ++ ++static int pm16d17_chip_init(struct pm16d17_data *data) ++{ ++ struct i2c_client *client = data->client; ++ struct device_node *np = client->dev.of_node; ++ const char *conv_time = NULL; ++ const char *wait_time = NULL; ++ uint8_t op_mode_setting_val; ++ uint32_t ps_offset_cancel; ++ uint8_t offset_lsb; ++ uint8_t offset_msb; ++ uint32_t pulse_count; ++ uint32_t pgain; ++ unsigned int val; ++ int ret; ++ ++ ret = pm16d17_read_reg(data, PM16D17_DEV_ID, &val); ++ ++ if (ret < 0 || (val != DEVICE_ID)) { ++ dev_err(&client->dev, "Invalid chip id 0x%04x\n", val); ++ return -ENODEV; ++ } ++ ++ dev_dbg(&client->dev, "Detected PM16D17 with chip id: 0x%04x\n", val); ++ ++ ret = pm16d17_write_reg(data, PM16D17_OP_MODE, ENABLE_PS_FUNCTION); ++ if (ret < 0) ++ return ret; ++ ++ of_property_read_u32(np, "ps-gain", &pgain); ++ switch (pgain) ++ { ++ case 1: ++ case 2: ++ case 4: ++ case 8: ++ op_mode_setting_val |= (ilog2(pgain) << 6) & PS_GAIN_MASK; ++ break; ++ default: ++ break; ++ } ++ ++ of_property_read_string(np, "ps-itime", &conv_time); ++ if (strcmp(conv_time, "0.4") == 0) ++ op_mode_setting_val |= PITIME_0_POINT_4_MS & PS_ITIME_MASK; ++ else if (strcmp(conv_time, "0.8") == 0) ++ op_mode_setting_val |= PITIME_0_POINT_8_MS & PS_ITIME_MASK; ++ else if (strcmp(conv_time, "1.6") == 0) ++ op_mode_setting_val |= PITIME_1_POINT_6_MS & PS_ITIME_MASK; ++ else if (strcmp(conv_time, "3.2") == 0) ++ op_mode_setting_val |= PITIME_3_POINT_2_MS & PS_ITIME_MASK; ++ else if (strcmp(conv_time, "6.3") == 0) ++ op_mode_setting_val |= PITIME_6_POINT_3_MS & PS_ITIME_MASK; ++ else if (strcmp(conv_time, "12.6") == 0) ++ op_mode_setting_val |= PITIME_12_POINT_6_MS & PS_ITIME_MASK; ++ else if (strcmp(conv_time, "25.2") == 0) ++ op_mode_setting_val |= PITIME_25_POINT_2_MS & PS_ITIME_MASK; ++ else { ++ dev_info(&client->dev, "Using default ps itime value\n"); ++ op_mode_setting_val |= PITIME_0_POINT_4_MS & PS_ITIME_MASK; ++ } ++ ++ of_property_read_string(np, "ps-wtime", &wait_time); ++ if (strcmp(wait_time, "12.5") == 0) ++ op_mode_setting_val |= PWTIME_12_POINT_5_MS & PS_WTIME_MASK; ++ else if (strcmp(wait_time, "25") == 0) ++ op_mode_setting_val |= PWTIME_25_MS & PS_WTIME_MASK; ++ else if (strcmp(wait_time, "50") == 0) ++ op_mode_setting_val |= PWTIME_50_MS & PS_WTIME_MASK; ++ else if (strcmp(wait_time, "100") == 0) ++ op_mode_setting_val |= PWTIME_100_MS & PS_WTIME_MASK; ++ else if (strcmp(wait_time, "200") == 0) ++ op_mode_setting_val |= PWTIME_200_MS & PS_WTIME_MASK; ++ else if (strcmp(wait_time, "400") == 0) ++ op_mode_setting_val |= PWTIME_400_MS & PS_WTIME_MASK; ++ else if (strcmp(wait_time, "800") == 0) ++ op_mode_setting_val |= PWTIME_800_MS & PS_WTIME_MASK; ++ else if (strcmp(wait_time, "1600") == 0) ++ op_mode_setting_val |= PWTIME_1600_MS & PS_WTIME_MASK; ++ else { ++ dev_info(&client->dev, "Using default ps wtime value\n"); ++ op_mode_setting_val |= PWTIME_12_POINT_5_MS & PS_WTIME_MASK; ++ } ++ ++ ret = pm16d17_write_reg(data, PM16D17_PS_SETTING, op_mode_setting_val); ++ if (ret < 0) ++ return ret; ++ ++ of_property_read_u32(np, "ps-ir-led-pulse-count", &pulse_count); ++ if (pulse_count > 256) pulse_count = 256; ++ ret = pm16d17_write_reg(data, PM16D17_VCSEL_DRIVE_PULSE, pulse_count - 1); ++ if (ret < 0) ++ return ret; ++ ++ of_property_read_u32(np, "ps-offset-cancel", &ps_offset_cancel); ++ if (ps_offset_cancel != 0) { ++ ret = pm16d17_write_reg(data, PM16D17_PS_SETTING2, OFFSET_CANCEL_ENABLE); ++ if (ret < 0) ++ return ret; ++ ++ offset_lsb = ps_offset_cancel & PS_OFFSET_CANCEL_LSB_MASK; ++ offset_msb = (ps_offset_cancel & PS_OFFSET_CANCEL_MSB_MASK) >> 8; ++ ++ ret = pm16d17_write_reg(data, PM16D17_PS_OFFSET_CANCEL_L, offset_lsb); ++ if (ret < 0) ++ return ret; ++ ++ ret = pm16d17_write_reg(data, PM16D17_PS_OFFSET_CANCEL_H, offset_msb); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int pm16d17_probe(struct i2c_client *client) ++{ ++ struct pm16d17_data *data; ++ struct iio_dev *indio_dev; ++ int ret; ++ ++ /*request iio dev memory*/ ++ indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); ++ if (!indio_dev) ++ return -ENOMEM; ++ ++ indio_dev->dev.parent = &client->dev; ++ indio_dev->info = &pm16d17_info; ++ indio_dev->name = PM16D17_DRV_NAME; ++ indio_dev->channels = pm16d17_channels; ++ indio_dev->num_channels = ARRAY_SIZE(pm16d17_channels); ++ indio_dev->modes = INDIO_DIRECT_MODE; ++ ++ data = iio_priv(indio_dev); ++ data->client = client; ++ ++ data->regmap = devm_regmap_init_i2c(client, &pm16d17_regmap_config); ++ if (IS_ERR(data->regmap)) { ++ dev_err(&client->dev, "regmap initialization failed.\n"); ++ return PTR_ERR(data->regmap); ++ } ++ ++ mutex_init(&data->lock); ++ ++ dev_dbg(&client->dev, "Probe PM16d17 Success\n"); ++ ++ ret = pm16d17_chip_init(data); ++ if (ret) ++ return ret; ++ ++ return devm_iio_device_register(&client->dev, indio_dev); ++} ++ ++static const struct i2c_device_id pm16d17_id[] = { ++ {"pm16d17", 0}, ++ {} ++}; ++MODULE_DEVICE_TABLE(i2c, pm16d17_id); ++ ++static const struct of_device_id pm16d17_of_match[] = { ++ {.compatible = "everlight,pm16d17"}, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, pm16d17_of_match); ++ ++static struct i2c_driver pm16d17_driver = { ++ .driver = { ++ .name = PM16D17_DRV_NAME, ++ .of_match_table = pm16d17_of_match, ++ }, ++ .probe_new = pm16d17_probe, ++ .id_table = pm16d17_id, ++}; ++module_i2c_driver(pm16d17_driver); ++ ++MODULE_AUTHOR("Chao Zeng "); ++MODULE_DESCRIPTION("PM16D17 proximity sensor"); ++MODULE_LICENSE("GPL"); diff --git a/recipes-kernel/linux/files/patches-6.1/0083-dt-bindings-arm-ti-Add-binding-for-Siemens-IOT2050-S.patch b/recipes-kernel/linux/files/patches-6.1/0083-dt-bindings-arm-ti-Add-binding-for-Siemens-IOT2050-S.patch new file mode 100644 index 000000000..d3309bee6 --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0083-dt-bindings-arm-ti-Add-binding-for-Siemens-IOT2050-S.patch @@ -0,0 +1,27 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Su Bao Cheng +Date: Tue, 12 Dec 2023 13:26:59 +0800 +Subject: [PATCH] dt-bindings: arm: ti: Add binding for Siemens IOT2050 SM + variant + +This new variant is derived from the Advanced PG2 board, removing the +Arduino interface, and adding a new ASIC for communicating with the +PLC 1200 signal modules. + +Signed-off-by: Su Bao Cheng +--- + Documentation/devicetree/bindings/arm/ti/k3.yaml | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml +index d16231bdee6e..130a4f9e12cc 100644 +--- a/Documentation/devicetree/bindings/arm/ti/k3.yaml ++++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml +@@ -44,6 +44,7 @@ properties: + - siemens,iot2050-advanced + - siemens,iot2050-advanced-m2 + - siemens,iot2050-advanced-pg2 ++ - siemens,iot2050-advanced-sm + - siemens,iot2050-basic + - siemens,iot2050-basic-pg2 + - ti,am654-evm diff --git a/recipes-kernel/linux/files/patches-6.1/0084-dts-iot2050-Support-IOT2050-SM-variant.patch b/recipes-kernel/linux/files/patches-6.1/0084-dts-iot2050-Support-IOT2050-SM-variant.patch new file mode 100644 index 000000000..7e3be3e7f --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0084-dts-iot2050-Support-IOT2050-SM-variant.patch @@ -0,0 +1,274 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Tue, 19 Sep 2023 10:51:24 +0800 +Subject: [PATCH] dts: iot2050: Support IOT2050-SM variant + +Main differences between the new variant and Advanced PG2: + +1. Arduino interface is removed. Instead, an new ASIC is added for + communicating with PLC 1200 signal modules. +2. USB 3.0 type A connector is removed, only USB 2.0 type A connector is + avaiable. +3. DP interface is tailored down. Instead, to communicate with the + PLC 1200 signal modules, a USB 3.0 type B connector is added but the + signal is not USB. +4. DDR size is increased to 4 GB. +5. Two sensors are added, one tilt sensor and one light sensor. + +Co-developed-by: Chao Zeng +Signed-off-by: Chao Zeng +Co-developed-by: Li Hua Qian +Signed-off-by: Li Hua Qian +Signed-off-by: Baocheng Su +--- + arch/arm64/boot/dts/ti/Makefile | 1 + + .../dts/ti/k3-am6548-iot2050-advanced-sm.dts | 228 ++++++++++++++++++ + 2 files changed, 229 insertions(+) + create mode 100644 arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts + +diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile +index efdd3bb1e263..725ad34cac4c 100644 +--- a/arch/arm64/boot/dts/ti/Makefile ++++ b/arch/arm64/boot/dts/ti/Makefile +@@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb + dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb + dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-m2.dtb + dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-pg2.dtb ++dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-sm.dtb + + DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@ + +diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts +new file mode 100644 +index 000000000000..b418c1eaed38 +--- /dev/null ++++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts +@@ -0,0 +1,228 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) Siemens AG, 2023 ++ * ++ * Authors: ++ * Baocheng Su ++ * Chao Zeng ++ * Huaqian Li ++ * ++ * AM6548-based (quad-core) IOT2050 SM variant, Product Generation 2 ++ * 4 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 ++ * ++ * Product homepage: ++ * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html ++ */ ++ ++/dts-v1/; ++ ++#include "k3-am6548-iot2050-advanced-common.dtsi" ++#include "k3-am65-iot2050-common-pg2.dtsi" ++ ++/ { ++ compatible = "siemens,iot2050-advanced-sm", "ti,am654"; ++ model = "SIMATIC IOT2050 Advanced SM"; ++ ++ memory@80000000 { ++ device_type = "memory"; ++ /* 4G RAM */ ++ reg = <0x00000000 0x80000000 0x00000000 0x80000000>, ++ <0x00000008 0x80000000 0x00000000 0x80000000>; ++ }; ++ ++ aliases { ++ spi1 = &main_spi0; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&leds_pins_default>, <&user1_led_pins>; ++ ++ user-led1-red { ++ gpios = <&wkup_gpio0 52 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ user-led1-green { ++ gpios = <&wkup_gpio0 53 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++}; ++ ++&main_pmx0 { ++ main_pcie_enable_pins_default: main-pcie-enable-default-pins { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01d8, PIN_OUTPUT, 7) /* (AH12) GPIO1_22 */ ++ >; ++ }; ++ ++ main_spi0_pins: main-spi0-default-pins { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */ ++ AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */ ++ AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */ ++ AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */ ++ >; ++ }; ++}; ++ ++&main_pmx1 { ++ asic_spi_mux_ctrl_pin: asic-spi-mux-ctrl-default-pins { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0010, PIN_OUTPUT, 7) /* (D21) GPIO1_86 */ ++ >; ++ }; ++}; ++ ++&wkup_pmx0 { ++ user1_led_pins: user1-led-default-pins { ++ pinctrl-single,pins = < ++ /* (AB1) WKUP_UART0_RXD:WKUP_GPIO0_52, as USER 1 led red */ ++ AM65X_WKUP_IOPAD(0x00a0, PIN_OUTPUT, 7) ++ /* (AB5) WKUP_UART0_TXD:WKUP_GPIO0_53, as USER 1 led green */ ++ AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 7) ++ >; ++ }; ++ ++ soc_asic_pins: soc-asic-default-pins { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 7) /* (P4) WKUP_GPIO0_29 */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) /* (P5) WKUP_GPIO0_30 */ ++ AM65X_WKUP_IOPAD(0x004c, PIN_INPUT, 7) /* (P1) WKUP_GPIO0_31 */ ++ >; ++ }; ++}; ++ ++&main_gpio0 { ++ gpio-line-names = "main_gpio0-base"; ++}; ++ ++&main_gpio1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = ++ <&cp2102n_reset_pin_default>, ++ <&main_pcie_enable_pins_default>, ++ <&asic_spi_mux_ctrl_pin>; ++ gpio-line-names = ++ /* 0..9 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 10..19 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 20..29 */ ++ "", "", "", "", "CP2102N-RESET", "", "", "", "", "", ++ /* 30..39 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 40..49 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 50..59 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 60..69 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 70..79 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 80..86 */ ++ "", "", "", "", "", "", "ASIC-spi-mux-ctrl"; ++}; ++ ++&wkup_gpio0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = ++ <&push_button_pins_default>, ++ <&db9_com_mode_pins_default>, ++ <&soc_asic_pins>; ++ gpio-line-names = ++ /* 0..9 */ ++ "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0", ++ "UART0-enable", "UART0-terminate", "", "WIFI-disable", ++ /* 10..19 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 20..29 */ ++ "", "", "", "", "", "USER-button", "", "", "","ASIC-gpio-0", ++ /* 30..31 */ ++ "ASIC-gpio-1", "ASIC-gpio-2"; ++}; ++ ++&main_spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_spi0_pins>; ++ ++ #address-cells = <1>; ++ #size-cells= <0>; ++}; ++ ++&mcu_spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcu_spi0_pins_default>; ++}; ++ ++&main_i2c3 { ++ accelerometer: lsm6dso@6a { ++ compatible = "st,lsm6dso"; ++ reg = <0x6a>; ++ }; ++ ++ proximitysensor: pm16d17@44 { ++ compatible = "everlight,pm16d17"; ++ reg = <0x44>; ++ ++ ps-gain = <1>; ++ ps-itime = "0.4"; ++ ps-wtime = "25"; ++ ps-ir-led-pulse-count = <1>; ++ }; ++ ++ /delete-node/ edp-bridge@f; ++}; ++ ++&dss { ++ status = "disabled"; ++}; ++ ++&dss_ports { ++ /delete-node/ port@1; ++}; ++ ++&mcu_uart0 { ++ status = "disabled"; ++}; ++ ++&tscadc1 { ++ status = "disabled"; ++}; ++ ++&serdes0 { ++ assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; ++ assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>; ++}; ++ ++&serdes1 { ++ status = "disabled"; ++}; ++ ++&pcie0_rc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&minipcie_pins_default>; ++ ++ num-lanes = <1>; ++ phys = <&serdes0 PHY_TYPE_PCIE 1>; ++ phy-names = "pcie-phy0"; ++ reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++&pcie1_rc { ++ status = "disabled"; ++}; ++ ++&dwc3_0 { ++ assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ ++ <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */ ++ /delete-property/ phys; ++ /delete-property/ phy-names; ++}; ++ ++&usb0 { ++ maximum-speed = "high-speed"; ++ /delete-property/ snps,dis-u1-entry-quirk; ++ /delete-property/ snps,dis-u2-entry-quirk; ++}; diff --git a/recipes-kernel/linux/files/patches-6.1/0085-WIP-dts-iot2050-Add-spidev-for-IOT2050-SM.patch b/recipes-kernel/linux/files/patches-6.1/0085-WIP-dts-iot2050-Add-spidev-for-IOT2050-SM.patch new file mode 100644 index 000000000..b6bc59691 --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0085-WIP-dts-iot2050-Add-spidev-for-IOT2050-SM.patch @@ -0,0 +1,29 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Su Bao Cheng +Date: Mon, 18 Dec 2023 10:47:06 +0800 +Subject: [PATCH] WIP: dts: iot2050: Add spidev for IOT2050-SM + +This spidev is used for communicating between main SoC and the SM ASIC. + +Signed-off-by: Su Bao Cheng +--- + arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts +index b418c1eaed38..c00e4a9e8efd 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts ++++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-sm.dts +@@ -148,6 +148,12 @@ &main_spi0 { + + #address-cells = <1>; + #size-cells= <0>; ++ ++ spidev@0 { ++ compatible = "rohm,dh2228fv"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ }; + }; + + &mcu_spi0 {