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.metrics.json
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.metrics.json
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{
"variables": {
"RISCV": "/mux-flow/tools/riscv",
"LM_LICENSE_FILE": "2700@license-1",
"IMPERAS_QUEUE_LICENSE" : "1"
},
"builds": {
"list": [
{
"name": "uvmt_cv32",
"image": "cv32-simulation-tools:20200316.10.0",
"cmd": "cd cv32/sim/uvmt_cv32; make corev-dv SIMULATOR=dsim DSIM_WORK=/mux-flow/build/repo/dsim_work; make comp SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make corev-dv SIMULATOR=dsim DSIM_WORK=/mux-flow/build/repo/dsim_work; make comp SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work WAVES=1"
}
]
},
"regressions": [
{
"name": "cv32_ci_check_regression",
"description": "Commit sanity for CV32",
"verbose": "true",
"tests": {
"resultsDir": "/mux-flow/build/results",
"builds": ["uvmt_cv32"],
"list": [
{
"name": "uvm_hello_world_test",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make hello-world SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make hello-world SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=hello-world.vcd",
"metricsFile": "hello-world/metrics.db",
"wavesFile" : "hello-world/hello-world.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Static riscv-dv ebreak test",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=riscv_ebreak_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=riscv_ebreak_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=riscv_ebreak_test_0.vcd",
"metricsFile": "riscv_ebreak_test_0/metrics.db",
"wavesFile" : "riscv_ebreak_test_0/riscv_ebreak_test_0.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Static riscv-dv arithmetic test 0",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=riscv_arithmetic_basic_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=riscv_arithmetic_basic_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=riscv_arithmetic_basic_test_0.vcd",
"metricsFile": "riscv_arithmetic_basic_test_0/metrics.db",
"wavesFile" : "riscv_arithmetic_basic_test_0/riscv_arithmetic_basic_test_0.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv arithmetic test 0",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_arithmetic_base_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_arithmetic_base_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_arithmetic_base_test_0.vcd",
"metricsFile": "corev_arithmetic_base_test_0/metrics.db",
"wavesFile" : "corev_arithmetic_base_test_0/corev_arithmetic_base_test_0.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv arithmetic test 1",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_arithmetic_base_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_arithmetic_base_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_arithmetic_base_test_1.vcd",
"metricsFile": "corev_arithmetic_base_test_1/metrics.db",
"wavesFile" : "corev_arithmetic_base_test_1/corev_arithmetic_base_test_1.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv random instruction test 0",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_rand_instr_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_rand_instr_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_rand_instr_test_0.vcd",
"metricsFile": "corev_rand_instr_test_0/metrics.db",
"wavesFile" : "corev_rand_instr_test_0/corev_rand_instr_test_0.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv random instruction test 1",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_rand_instr_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_rand_instr_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_rand_instr_test_1.vcd",
"metricsFile": "corev_rand_instr_test_1/metrics.db",
"wavesFile" : "corev_rand_instr_test_1/corev_rand_instr_test_1.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv jump stress test 0",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_jump_stress_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_jump_stress_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_jump_stress_test_0.vcd",
"metricsFile": "corev_jump_stress_test_0/metrics.db",
"wavesFile" : "corev_jump_stress_test_0/corev_jump_stress_test_0.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv jump stress test 1",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_jump_stress_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_jump_stress_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_jump_stress_test_1.vcd",
"metricsFile": "corev_jump_stress_test_1/metrics.db",
"wavesFile" : "corev_jump_stress_test_1/corev_jump_stress_test_1.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "illegal-riscv-tests",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=illegal SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=illegal SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=illegal.vcd",
"metricsFile": "illegal/metrics.db",
"wavesFile" : "illegal/illegal.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
}
]
}
},
{
"name": "cv32_full_regression",
"description": "Full regression (all tests) for CV32",
"verbose": "true",
"tests": {
"resultsDir": "/mux-flow/build/results",
"builds": ["uvmt_cv32"],
"list": [
{
"name": "uvm_hello_world_test",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make hello-world SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make hello-world SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=hello-world.vcd",
"metricsFile": "hello-world/metrics.db",
"wavesFile" : "hello-world/hello-world.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Modeled CSR PoR test",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=modeled_csr_por SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=modeled_csr_por SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=modeled_csr_por.vcd",
"metricsFile": "modeled_csr_por/metrics.db",
"wavesFile" : "modeled_csr_por/modeled_csr_por.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Static riscv-dv ebreak test",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=riscv_ebreak_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=riscv_ebreak_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=riscv_ebreak_test_0.vcd",
"metricsFile": "riscv_ebreak_test_0/metrics.db",
"wavesFile" : "riscv_ebreak_test_0/riscv_ebreak_test_0.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Static riscv-dv arithmetic test 0",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=riscv_arithmetic_basic_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=riscv_arithmetic_basic_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=riscv_arithmetic_basic_test_0.vcd",
"metricsFile": "riscv_arithmetic_basic_test_0/metrics.db",
"wavesFile" : "riscv_arithmetic_basic_test_0/riscv_arithmetic_basic_test_0.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Static riscv-dv arithmetic test 1",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=riscv_arithmetic_basic_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=riscv_arithmetic_basic_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=riscv_arithmetic_basic_test_1.vcd",
"metricsFile": "riscv_arithmetic_basic_test_1/metrics.db",
"wavesFile" : "riscv_arithmetic_basic_test_1/riscv_arithmetic_basic_test_1.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv arithmetic test 0",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_arithmetic_base_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_arithmetic_base_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_arithmetic_base_test_0.vcd",
"metricsFile": "corev_arithmetic_base_test_0/metrics.db",
"wavesFile" : "corev_arithmetic_base_test_0/corev_arithmetic_base_test_0.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv arithmetic test 1",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_arithmetic_base_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_arithmetic_base_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_arithmetic_base_test_1.vcd",
"metricsFile": "corev_arithmetic_base_test_1/metrics.db",
"wavesFile" : "corev_arithmetic_base_test_1/corev_arithmetic_base_test_1.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv random instruction test 0",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_rand_instr_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_rand_instr_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_rand_instr_test_0.vcd",
"metricsFile": "corev_rand_instr_test_0/metrics.db",
"wavesFile" : "corev_rand_instr_test_0/corev_rand_instr_test_0.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv random instruction test 1",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_rand_instr_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_rand_instr_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_rand_instr_test_1.vcd",
"metricsFile": "corev_rand_instr_test_1/metrics.db",
"wavesFile" : "corev_rand_instr_test_1/corev_rand_instr_test_1.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv jump stress test 0",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_jump_stress_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_jump_stress_test_0 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_jump_stress_test_0.vcd",
"metricsFile": "corev_jump_stress_test_0/metrics.db",
"wavesFile" : "corev_jump_stress_test_0/corev_jump_stress_test_0.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Generated riscv-dv jump stress test 1",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_jump_stress_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=corev_jump_stress_test_1 SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=corev_jump_stress_test_1.vcd",
"metricsFile": "corev_jump_stress_test_1/metrics.db",
"wavesFile" : "corev_jump_stress_test_1/corev_jump_stress_test_1.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "cv32-riscv-compliance-tests",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make cv32-riscv-compliance-tests SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make cv32-riscv-compliance-tests SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=cv32-riscv-compliance-tests.vcd",
"metricsFile": "cv32-riscv-compliance-tests/metrics.db",
"wavesFile" : "cv32-riscv-compliance-tests/cv32-riscv-compliance-tests.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "illegal-riscv-tests",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=illegal SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=illegal SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=illegal.vcd",
"metricsFile": "illegal/metrics.db",
"wavesFile" : "illegal/illegal.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "fibonacci-test",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=fibonacci SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=fibonacci SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=fibonacci.vcd",
"metricsFile": "fibonacci/metrics.db",
"wavesFile" : "fibonacci/fibonacci.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "misalign-test",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=misalign SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=misalign SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=misalign.vcd",
"metricsFile": "misalign/metrics.db",
"wavesFile" : "misalign/misalign.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "dhrystone-test",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=dhrystone SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=dhrystone SIMULATOR=dsim USE_ISS=YES DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=dhrystone.vcd",
"metricsFile": "dhrystone/metrics.db",
"wavesFile" : "dhrystone/dhrystone.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
}
]
}
},
{
"name": "cv32_xpulp_isa_regression",
"description": "XPULP ISA test-programs (and a few other tests that run with the RM disabled)",
"verbose": "true",
"tests": {
"resultsDir": "/mux-flow/build/results",
"builds": ["uvmt_cv32"],
"list": [
{
"name": "pulp_vectorial_comparison_1",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_comparison_1 SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_comparison_1 SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_comparison_1.vcd",
"metricsFile": "pulp_vectorial_comparison_1/metrics.db",
"wavesFile" : "pulp_vectorial_comparison_1/pulp_vectorial_comparison_1.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_comparison_2",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_comparison_2 SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_comparison_2 SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_comparison_2.vcd",
"metricsFile": "pulp_vectorial_comparison_2/metrics.db",
"wavesFile" : "pulp_vectorial_comparison_2/pulp_vectorial_comparison_2.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_comparison_3",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_comparison_3 SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_comparison_3 SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_comparison_3.vcd",
"metricsFile": "pulp_vectorial_comparison_3/metrics.db",
"wavesFile" : "pulp_vectorial_comparison_3/pulp_vectorial_comparison_3.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_complex",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_complex SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_complex SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_complex.vcd",
"metricsFile": "pulp_vectorial_complex/metrics.db",
"wavesFile" : "pulp_vectorial_complex/pulp_vectorial_complex.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_dot_product_1",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_dot_product_1 SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_dot_product_1 SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_dot_product_1.vcd",
"metricsFile": "pulp_vectorial_dot_product_1/metrics.db",
"wavesFile" : "pulp_vectorial_dot_product_1/pulp_vectorial_dot_product_1.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_dot_product_2",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_dot_product_2 SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_dot_product_2 SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_dot_product_2.vcd",
"metricsFile": "pulp_vectorial_dot_product_2/metrics.db",
"wavesFile" : "pulp_vectorial_dot_product_2/pulp_vectorial_dot_product_2.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_max",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_max SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_max SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_max.vcd",
"metricsFile": "pulp_vectorial_max/metrics.db",
"wavesFile" : "pulp_vectorial_max/pulp_vectorial_max.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_min",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_min SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_min SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_min.vcd",
"metricsFile": "pulp_vectorial_min/metrics.db",
"wavesFile" : "pulp_vectorial_min/pulp_vectorial_min.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_shift",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_shift SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_shift SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_shift.vcd",
"metricsFile": "pulp_vectorial_shift/metrics.db",
"wavesFile" : "pulp_vectorial_shift/pulp_vectorial_shift.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_shuffle_pack",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_shuffle_pack SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_shuffle_pack SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_shuffle_pack.vcd",
"metricsFile": "pulp_vectorial_shuffle_pack/metrics.db",
"wavesFile" : "pulp_vectorial_shuffle_pack/pulp_vectorial_shuffle_pack.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_bit_manipulation",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_bit_manipulation SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_bit_manipulation SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_bit_manipulation.vcd",
"metricsFile": "pulp_bit_manipulation/metrics.db",
"wavesFile" : "pulp_bit_manipulation/pulp_bit_manipulation.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_general_alu",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_general_alu SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_general_alu SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_general_alu.vcd",
"metricsFile": "pulp_general_alu/metrics.db",
"wavesFile" : "pulp_general_alu/pulp_general_alu.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_immediate_branching",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_immediate_branching SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_immediate_branching SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_immediate_branching.vcd",
"metricsFile": "pulp_immediate_branching/metrics.db",
"wavesFile" : "pulp_immediate_branching/pulp_immediate_branching.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_multiply_accumulate",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_multiply_accumulate SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_multiply_accumulate SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_multiply_accumulate.vcd",
"metricsFile": "pulp_multiply_accumulate/metrics.db",
"wavesFile" : "pulp_multiply_accumulate/pulp_multiply_accumulate.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_post_increment_load_store",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_post_increment_load_store SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_post_increment_load_store SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_post_increment_load_store.vcd",
"metricsFile": "pulp_post_increment_load_store/metrics.db",
"wavesFile" : "pulp_post_increment_load_store/pulp_post_increment_load_store.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_add_sub",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_add_sub SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_add_sub SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_add_sub.vcd",
"metricsFile": "pulp_vectorial_add_sub/metrics.db",
"wavesFile" : "pulp_vectorial_add_sub/pulp_vectorial_add_sub.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_avg",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_avg SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_avg SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_avg.vcd",
"metricsFile": "pulp_vectorial_avg/metrics.db",
"wavesFile" : "pulp_vectorial_avg/pulp_vectorial_avg.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_bit_manip",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_bit_manip SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_bit_manip SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_bit_manip.vcd",
"metricsFile": "pulp_vectorial_bit_manip/metrics.db",
"wavesFile" : "pulp_vectorial_bit_manip/pulp_vectorial_bit_manip.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "pulp_vectorial_bitwise",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_bitwise SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make custom CUSTOM_PROG=pulp_vectorial_bitwise SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=pulp_vectorial_bitwise.vcd",
"metricsFile": "pulp_vectorial_bitwise/metrics.db",
"wavesFile" : "pulp_vectorial_bitwise/pulp_vectorial_bitwise.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
},
{
"name": "Debug Test 1",
"build": "uvmt_cv32",
"cmd": "cd cv32/sim/uvmt_cv32; make debug_test SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results",
"wavesCmd": "cd cv32/sim/uvmt_cv32; make debug_test SIMULATOR=dsim USE_ISS=NO DSIM_WORK=/mux-flow/build/repo/dsim_work DSIM_RESULTS=/mux-flow/build/results WAVES=1 DSIM_DMP_FILE=debug_test.vcd",
"metricsFile": "debug_test/metrics.db",
"wavesFile" : "debug_test/debug_test.vcd",
"isPass": "SIMULATION PASSED",
"seed": 1
}
]
}
}
]
}