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Lumia650Pkg.dec
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Lumia650Pkg.dec
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[Defines]
DEC_SPECIFICATION = 0x00010005
PACKAGE_NAME = Lumia650Pkg
PACKAGE_GUID = cd560434-f88c-4e47-971b-152fdbfd18df
PACKAGE_VERSION = 0.1
[Includes.common]
Include # Root include for the package
[Guids.common]
gLumia650PkgTokenSpaceGuid = { 0x4c59628e, 0x0a8a, 0x4099, { 0x8d, 0xe5, 0xf2, 0x08, 0xff, 0x80, 0xc4, 0xbf } }
gQcomTokenSpaceGuid = { 0x59f58449, 0x99e1, 0x4a19, { 0x86, 0x65, 0x12, 0xd6, 0x37, 0xed, 0xbe, 0x5e } }
[Protocols]
gQcomBamProtocolGuid = { 0xacdd545a, 0xf1f6, 0x4272, { 0x81, 0xc5, 0x04, 0x93, 0xe3, 0x58, 0x05, 0x32 } }
gQcomClockProtocolGuid = { 0x4fcc91c2, 0x9c4f, 0x4e3c, { 0xa6, 0x73, 0xc6, 0xdf, 0x62, 0xe0, 0x41, 0xd5 } }
gQcomGpioTlmmProtocolGuid = { 0x8054947b, 0x3223, 0x407a, { 0xa1, 0xcc, 0x31, 0x22, 0x2f, 0x80, 0x66, 0x40 } }
gQcomGpioTlmmInterruptProtocolGuid = { 0x1634c987, 0x50a7, 0x4f98, { 0x88, 0xf0, 0x7e, 0xbc, 0x60, 0x11, 0xa5, 0x32 } }
gQcomSpmiProtocolGuid = { 0xa95ee608, 0x52be, 0x46c9, { 0x9f, 0x78, 0x03, 0x86, 0x42, 0xdb, 0xd0, 0x7c } }
# SPMI
gQcomSPMIProtocolGuid = { 0xfa5f306b, 0xf47d, 0x4ac4, { 0xa4, 0x7d, 0x88, 0x2f, 0x82, 0x4, 0xec, 0x30 } }
# TLMM
gEfiTLMMProtocolGuid = { 0xad9aec18, 0x7bf0, 0x4809, { 0x9e, 0x96, 0x30, 0x12, 0x30, 0x9f, 0x3d, 0xf7 } }
gQcomPm8x41ProtocolGuid = { 0xb6e811d5, 0x1dce, 0x4ccb, { 0xaf, 0x21, 0xe9, 0xf7, 0xef, 0x68, 0x60, 0x7b } }
gEFIDroidKeypadDeviceProtocolGuid = { 0xb27625b5, 0x0b6c, 0x4614, { 0xaa, 0x3c, 0x33, 0x13, 0xb5, 0x1d, 0x36, 0x46 } }
# PlatformInfo
gEfiPlatformInfoProtocolGuid = { 0x157a5c45, 0x21b2, 0x43c5, { 0xba, 0x7c, 0x82, 0x2f, 0xee, 0x5f, 0xe5, 0x99 } }
[PcdsFixedAtBuild.common]
# Simple FrameBuffer
gLumia650PkgTokenSpaceGuid.PcdMipiFrameBufferAddress|0x80400000|UINT32|0x30
gLumia650PkgTokenSpaceGuid.PcdMipiFrameBufferWidth|720|UINT32|0x31
gLumia650PkgTokenSpaceGuid.PcdMipiFrameBufferHeight|1280|UINT32|0x32
gLumia650PkgTokenSpaceGuid.PcdMipiFrameBufferPixelBpp|32|UINT32|0x33
gLumia650PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleWidth|720|UINT32|0x34
gLumia650PkgTokenSpaceGuid.PcdMipiFrameBufferVisibleHeight|1280|UINT32|0x35
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000036 #0x00800000
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000038
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x10000|UINT32|0x00000039
# Memory allocation
gLumia650PkgTokenSpaceGuid.PcdPreAllocatedMemorySize|0x3CD00000|UINT64|0x00000a106
gLumia650PkgTokenSpaceGuid.PcdUefiMemPoolSize|0x03300000|UINT32|0x00000a107
# PON Debounce
gQcomTokenSpaceGuid.PcdPONDebounce|0x00000000|UINT32|0x00000F09
# QTimer
gQcomTokenSpaceGuid.PcdQTimerBase|0xF9021000|UINT64|0x00000050
# GpioTlmmDxe and GpioTlmmInterruptDxe
gQcomTokenSpaceGuid.PcdGpioTlmmBaseAddress|0|UINT64|0x00000100
gQcomTokenSpaceGuid.PcdGpioTlmmSummaryIrq|0|UINT64|0x00000101
gQcomTokenSpaceGuid.PcdGpioTlmmIoOffset|0|UINT64|0x00000102
gQcomTokenSpaceGuid.PcdGpioTlmmIoElementSize|0|UINT64|0x00000103
gQcomTokenSpaceGuid.PcdGpioTlmmCtlOffset|0|UINT64|0x00000104
gQcomTokenSpaceGuid.PcdGpioTlmmCtlElementSize|0|UINT64|0x00000105
gQcomTokenSpaceGuid.PcdGpioTlmmIntrCfgOffset|0|UINT64|0x00000106
gQcomTokenSpaceGuid.PcdGpioTlmmIntrCfgElementSize|0|UINT64|0x00000107
gQcomTokenSpaceGuid.PcdGpioTlmmIntrStatusOffset|0|UINT64|0x00000108
gQcomTokenSpaceGuid.PcdGpioTlmmIntrStatusElementSize|0|UINT64|0x00000109
gQcomTokenSpaceGuid.PcdGpioTlmmIntrTargetOffset|0|UINT64|0x0000010a
gQcomTokenSpaceGuid.PcdGpioTlmmIntrTargetElementSize|0|UINT64|0x0000010b
gQcomTokenSpaceGuid.PcdGpioTlmmIntrEnableBit|0|UINT64|0x0000010c
gQcomTokenSpaceGuid.PcdGpioTlmmIntrStatusBit|0|UINT64|0x0000010d
gQcomTokenSpaceGuid.PcdGpioTlmmIntrAckHigh|FALSE|BOOLEAN|0x0000010e
gQcomTokenSpaceGuid.PcdGpioTlmmIntrTargetBit|0|UINT64|0x0000010f
gQcomTokenSpaceGuid.PcdGpioTlmmIntrTargetKpssValue|0|UINT64|0x00000110
gQcomTokenSpaceGuid.PcdGpioTlmmIntrRawStatusBit|0|UINT64|0x00000111
gQcomTokenSpaceGuid.PcdGpioTlmmIntrPolarityBit|0|UINT64|0x00000112
gQcomTokenSpaceGuid.PcdGpioTlmmIntrDetectionBit|0|UINT64|0x00000113
gQcomTokenSpaceGuid.PcdGpioTlmmIntrDetectionWidth|0|UINT64|0x00000114
gQcomTokenSpaceGuid.PcdGpioTlmmInBit|0|UINT64|0x00000115
gQcomTokenSpaceGuid.PcdGpioTlmmOutBit|0|UINT64|0x00000116
gQcomTokenSpaceGuid.PcdGpioTlmmOeBit|0|UINT64|0x00000117
gQcomTokenSpaceGuid.PcdGpioTlmmMuxBit|0|UINT64|0x00000118
gQcomTokenSpaceGuid.PcdGpioTlmmDrvBit|0|UINT64|0x00000119
gQcomTokenSpaceGuid.PcdGpioTlmmPullBit|0|UINT64|0x0000011a
gQcomTokenSpaceGuid.PcdGpioTlmmNumFunctions|0|UINT64|0x0000011b
# SpmiDxe
gQcomTokenSpaceGuid.PcdSpmiMaxPeripherals|128|UINT64|0x00000090
gQcomTokenSpaceGuid.PcdSpmiBaseAddress|0x0|UINT64|0x00000091
gQcomTokenSpaceGuid.PcdSpmiVersion|1|UINT64|0x00000092
gQcomTokenSpaceGuid.PcdPmicArbCoreAddress|0x0|UINT64|0x00000093
gQcomTokenSpaceGuid.PcdPmicArbChannelNum|0|UINT64|0x00000094
gQcomTokenSpaceGuid.PcdPmicArbOwnerId|0|UINT64|0x00000095
# MMCHSDxe
gQcomTokenSpaceGuid.PcdMmcSdc1BamBase|0|UINT64|0x000000c0
gQcomTokenSpaceGuid.PcdMmcSdc2BamBase|0|UINT64|0x000000c1
gQcomTokenSpaceGuid.PcdMmcSdc3BamBase|0|UINT64|0x000000c2
gQcomTokenSpaceGuid.PcdMmcSdc4BamBase|0|UINT64|0x000000c3
gQcomTokenSpaceGuid.PcdMmcSdc1DmlBase|0|UINT64|0x000000c4
gQcomTokenSpaceGuid.PcdMmcSdc2DmlBase|0|UINT64|0x000000c5
gQcomTokenSpaceGuid.PcdMmcSdc3DmlBase|0|UINT64|0x000000c6
gQcomTokenSpaceGuid.PcdMmcSdc4DmlBase|0|UINT64|0x000000c7
gQcomTokenSpaceGuid.PcdMmcAdmChn|0|UINT64|0x000000c8
gQcomTokenSpaceGuid.PcdMmcAdmSd|0|UINT64|0x000000c9
gQcomTokenSpaceGuid.PcdMmcAdmBase|0|UINT64|0x000000ca
gQcomTokenSpaceGuid.PcdMmcAdmSdOffset|0|UINT64|0x000000cb
gQcomTokenSpaceGuid.PcdMmcAdmMap0|0|UINT8|0x000000cc
gQcomTokenSpaceGuid.PcdMmcAdmMap1|0|UINT8|0x000000cd
gQcomTokenSpaceGuid.PcdMmcAdmMap2|0|UINT8|0x000000ce
gQcomTokenSpaceGuid.PcdMmcAdmMap3|0|UINT8|0x000000cf
gQcomTokenSpaceGuid.PcdMmcAdmMap4|0|UINT8|0x000000d0
# SdhciMMCHSDxe
gQcomTokenSpaceGuid.PcdSdccMciHcMode|0|UINT64|0x000000e0
gQcomTokenSpaceGuid.PcdSdccHcPwrctlStatusReg|0|UINT64|0x000000e1
gQcomTokenSpaceGuid.PcdSdccHcPwrctlMaskReg|0|UINT64|0x000000e2
gQcomTokenSpaceGuid.PcdSdccHcPwrctlClearReg|0|UINT64|0x000000e3
gQcomTokenSpaceGuid.PcdSdccHcPwrctlCtlReg|0|UINT64|0x000000e4
gQcomTokenSpaceGuid.PcdMmcSdhciDdrCfgVal|0x80040853|UINT64|0x000000e5 # DDR_CONFIG_VAL
gQcomTokenSpaceGuid.PcdMmcSdc1HdrvPullCtlOffset|0|UINT64|0x000000e6
gQcomTokenSpaceGuid.PcdMmcSdc2HdrvPullCtlOffset|0|UINT64|0x000000e7
gQcomTokenSpaceGuid.PcdMmcSdc3HdrvPullCtlOffset|0|UINT64|0x000000e8
gQcomTokenSpaceGuid.PcdMmcSdc4HdrvPullCtlOffset|0|UINT64|0x000000e9
# Misc
gQcomTokenSpaceGuid.PcdGicSpiStart|0|UINT64|0x00000200
[PcdsFeatureFlag.common]
# MMCHSDxe
gQcomTokenSpaceGuid.PcdMmcAdmSupport|FALSE|BOOLEAN|0x00010001
gQcomTokenSpaceGuid.PcdMmcBamSupport|FALSE|BOOLEAN|0x00010002
# SdhciMMCHSDxe
gQcomTokenSpaceGuid.PcdMmcHs200Caps|FALSE|BOOLEAN|0x00010010