From 9e5485fcaf808d8b7d0074aecb8ec72bc1b8d1af Mon Sep 17 00:00:00 2001 From: Kevin Brodsky Date: Mon, 9 Jan 2023 12:42:03 +0000 Subject: [PATCH] vmlinux.lds.h: Work around Clang issue when targeting PCuABI CHERI/Morello Clang needlessly places data in the RELRO section in the presence of capabilities. No such section is expected in linker scripts, causing issues at link-time and/or runtime. While waiting for Clang to become more conservative about its use of RELRO data, work around the issue by placing .data.rel.ro together with .rodata, which is appropriate for the kernel. CHERI-LLVM issue: https://github.com/CTSRD-CHERI/llvm-project/issues/673 Signed-off-by: Kevin Brodsky --- include/asm-generic/vmlinux.lds.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index bae0fe4d499bc..f28308c96aa4b 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -455,6 +455,7 @@ .rodata : AT(ADDR(.rodata) - LOAD_OFFSET) { \ __start_rodata = .; \ *(.rodata) *(.rodata.*) \ + *(.data.rel.ro) \ SCHED_DATA \ RO_AFTER_INIT_DATA /* Read only after init */ \ . = ALIGN(8); \