From 6461ffa35983823d1ffbc6f2f8c72e58f140c90c Mon Sep 17 00:00:00 2001
From: "dependabot[bot]" <49699333+dependabot[bot]@users.noreply.github.com>
Date: Sun, 3 Nov 2024 19:19:23 +0000
Subject: [PATCH 1/2] [Dependabot]: Bump neorv32 from `f9a2801` to `06f3177`

Bumps [neorv32](https://github.com/stnolting/neorv32) from `f9a2801` to `06f3177`.
- [Release notes](https://github.com/stnolting/neorv32/releases)
- [Commits](https://github.com/stnolting/neorv32/compare/f9a2801c5c5764f26e57867ee67d7a6eebbd941b...06f3177249dcf29cebc9b5c88ab04d6731bde77f)

---
updated-dependencies:
- dependency-name: neorv32
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
---
 neorv32 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/neorv32 b/neorv32
index f9a2801..06f3177 160000
--- a/neorv32
+++ b/neorv32
@@ -1 +1 @@
-Subproject commit f9a2801c5c5764f26e57867ee67d7a6eebbd941b
+Subproject commit 06f3177249dcf29cebc9b5c88ab04d6731bde77f

From 5de1ac69d592c70d9ef491cae02601adc5cc1c18 Mon Sep 17 00:00:00 2001
From: stnolting <22944758+stnolting@users.noreply.github.com>
Date: Sun, 3 Nov 2024 20:27:39 +0100
Subject: [PATCH 2/2] [src] update boot configuration

---
 src/neorv32_verilog_wrapper.vhd | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/neorv32_verilog_wrapper.vhd b/src/neorv32_verilog_wrapper.vhd
index 6838e0c..206d2e6 100644
--- a/src/neorv32_verilog_wrapper.vhd
+++ b/src/neorv32_verilog_wrapper.vhd
@@ -23,9 +23,10 @@ begin
   -- -------------------------------------------------------------------------------------------
   neorv32_top_inst: neorv32_top
   generic map ( -- ADD CONFIGURATION OPTIONS AS REQUIRED
-    -- General --
+    -- Processor Clocking --
     CLOCK_FREQUENCY     => 100_000_000, -- clock frequency of clk_i in Hz
-    INT_BOOTLOADER_EN   => true,        -- boot configuration: boot explicit bootloader
+    -- Boot Configuration --
+    BOOT_MODE_SELECT    => 0,           -- boot via internal bootloader
     -- RISC-V CPU Extensions --
     RISCV_ISA_C         => true,        -- implement compressed extension?
     RISCV_ISA_M         => true,        -- implement mul/div extension?