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cpu.c
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cpu.c
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#include "cpu.h"
uint8_t __gb_read(struct gb_s *gb, const uint_fast16_t addr);
/* Internal function used to write bytes */
void __gb_write(struct gb_s *gb,
const uint_fast16_t addr,
const uint8_t val);
#ifdef ENABLE_LCD
void __gb_draw_line(struct gb_s *gb);
#endif
static uint8_t __gb_execute_cb(struct gb_s *gb)
{
uint8_t inst_cycles;
uint8_t cbop = __gb_read(gb, gb->cpu_reg.pc++);
uint8_t r = (cbop & 0x7);
uint8_t b = (cbop >> 3) & 0x7;
uint8_t d = (cbop >> 3) & 0x1;
uint8_t val;
uint8_t writeback = 1;
inst_cycles = 8;
/* Add an additional 8 cycles to these sets of instructions. */
switch (cbop & 0xC7) {
case 0x06:
case 0x86:
case 0xC6:
inst_cycles += 8;
break;
case 0x46:
inst_cycles += 4;
break;
}
switch (r) {
case 0:
val = gb->cpu_reg.b;
break;
case 1:
val = gb->cpu_reg.c;
break;
case 2:
val = gb->cpu_reg.d;
break;
case 3:
val = gb->cpu_reg.e;
break;
case 4:
val = gb->cpu_reg.h;
break;
case 5:
val = gb->cpu_reg.l;
break;
case 6:
val = __gb_read(gb, gb->cpu_reg.hl);
break;
/* Only values 0-7 are possible here, so we make the final case
* default to satisfy -Wmaybe-uninitialized warning. */
default:
val = gb->cpu_reg.a;
break;
}
/* TODO: Find out WTF this is doing. */
switch (cbop >> 6) {
case 0x0:
cbop = (cbop >> 4) & 0x3;
switch (cbop) {
case 0x0: /* RdC R */
case 0x1: /* Rd R */
if (d) { /* RRC R / RR R */
uint8_t temp = val;
val = (val >> 1);
val |= cbop ? (gb->cpu_reg.f_bits.c << 7) : (temp << 7);
gb->cpu_reg.f_bits.z = (val == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
gb->cpu_reg.f_bits.c = (temp & 0x01);
} else { /* RLC R / RL R */
uint8_t temp = val;
val = (val << 1);
val |= cbop ? gb->cpu_reg.f_bits.c : (temp >> 7);
gb->cpu_reg.f_bits.z = (val == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
gb->cpu_reg.f_bits.c = (temp >> 7);
}
break;
case 0x2:
if (d) { /* SRA R */
gb->cpu_reg.f_bits.c = val & 0x01;
val = (val >> 1) | (val & 0x80);
gb->cpu_reg.f_bits.z = (val == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
} else { /* SLA R */
gb->cpu_reg.f_bits.c = (val >> 7);
val = val << 1;
gb->cpu_reg.f_bits.z = (val == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
}
break;
case 0x3:
if (d) { /* SRL R */
gb->cpu_reg.f_bits.c = val & 0x01;
val = val >> 1;
gb->cpu_reg.f_bits.z = (val == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
} else { /* SWAP R */
uint8_t temp = (val >> 4) & 0x0F;
temp |= (val << 4) & 0xF0;
val = temp;
gb->cpu_reg.f_bits.z = (val == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
gb->cpu_reg.f_bits.c = 0;
}
break;
}
break;
case 0x1: /* BIT B, R */
gb->cpu_reg.f_bits.z = !((val >> b) & 0x1);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 1;
writeback = 0;
break;
case 0x2: /* RES B, R */
val &= (0xFE << b) | (0xFF >> (8 - b));
break;
case 0x3: /* SET B, R */
val |= (0x1 << b);
break;
}
if (writeback) {
switch (r) {
case 0:
gb->cpu_reg.b = val;
break;
case 1:
gb->cpu_reg.c = val;
break;
case 2:
gb->cpu_reg.d = val;
break;
case 3:
gb->cpu_reg.e = val;
break;
case 4:
gb->cpu_reg.h = val;
break;
case 5:
gb->cpu_reg.l = val;
break;
case 6:
__gb_write(gb, gb->cpu_reg.hl, val);
break;
case 7:
gb->cpu_reg.a = val;
break;
}
}
return inst_cycles;
}
/* Internal function used to step the CPU */
static uint8_t __gb_step_cpu(struct gb_s *gb)
{
uint8_t opcode, inst_cycles;
static const uint8_t op_cycles[0x100] = {
/* clang-format off */
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/* 0x00 */ 4, 12, 8, 8, 4, 4, 8, 4, 20, 8, 8, 8, 4, 4, 8, 4,
/* 0x10 */ 4, 12, 8, 8, 4, 4, 8, 4, 12, 8, 8, 8, 4, 4, 8, 4,
/* 0x20 */ 8, 12, 8, 8, 4, 4, 8, 4, 8, 8, 8, 8, 4, 4, 8, 4,
/* 0x30 */ 8, 12, 8, 8, 12, 12, 12, 4, 8, 8, 8, 8, 4, 4, 8, 4,
/* 0x40 */ 4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
/* 0x50 */ 4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
/* 0x60 */ 4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
/* 0x70 */ 8, 8, 8, 8, 8, 8, 4, 8, 4, 4, 4, 4, 4, 4, 8, 4,
/* 0x80 */ 4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
/* 0x90 */ 4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
/* 0xA0 */ 4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
/* 0xB0 */ 4, 4, 4, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4, 4, 8, 4,
/* 0xC0 */ 8, 12, 12, 16, 12, 16, 8, 16, 8, 16, 12, 8, 12, 24, 8, 16,
/* 0xD0 */ 8, 12, 12, 0, 12, 16, 8, 16, 8, 16, 12, 0, 12, 0, 8, 16,
/* 0xE0 */ 12, 12, 8, 0, 0, 16, 8, 16, 16, 4, 16, 0, 0, 0, 8, 16,
/* 0xF0 */ 12, 12, 8, 4, 0, 16, 8, 16, 12, 8, 16, 4, 0, 0, 8, 16,
/* clang-format on */
};
/* Handle interrupts */
if ((gb->gb_ime || gb->gb_halt) &&
(gb->gb_reg.IF & gb->gb_reg.IE & ANY_INTR)) {
gb->gb_halt = 0;
if (gb->gb_ime) {
/* Disable interrupts */
gb->gb_ime = 0;
/* Push program counter */
__gb_write(gb, --gb->cpu_reg.sp, gb->cpu_reg.pc >> 8);
__gb_write(gb, --gb->cpu_reg.sp, gb->cpu_reg.pc & 0xFF);
/* Call interrupt handler if required. */
if (gb->gb_reg.IF & gb->gb_reg.IE & VBLANK_INTR) {
gb->cpu_reg.pc = VBLANK_INTR_ADDR;
gb->gb_reg.IF ^= VBLANK_INTR;
} else if (gb->gb_reg.IF & gb->gb_reg.IE & LCDC_INTR) {
gb->cpu_reg.pc = LCDC_INTR_ADDR;
gb->gb_reg.IF ^= LCDC_INTR;
} else if (gb->gb_reg.IF & gb->gb_reg.IE & TIMER_INTR) {
gb->cpu_reg.pc = TIMER_INTR_ADDR;
gb->gb_reg.IF ^= TIMER_INTR;
} else if (gb->gb_reg.IF & gb->gb_reg.IE & SERIAL_INTR) {
gb->cpu_reg.pc = SERIAL_INTR_ADDR;
gb->gb_reg.IF ^= SERIAL_INTR;
} else if (gb->gb_reg.IF & gb->gb_reg.IE & CONTROL_INTR) {
gb->cpu_reg.pc = CONTROL_INTR_ADDR;
gb->gb_reg.IF ^= CONTROL_INTR;
}
}
}
/* Obtain opcode */
opcode = (gb->gb_halt ? 0x00 : __gb_read(gb, gb->cpu_reg.pc++));
inst_cycles = op_cycles[opcode];
/* Execute opcode */
switch (opcode) {
case 0x00: /* NOP */
break;
case 0x01: /* LD BC, imm */
gb->cpu_reg.c = __gb_read(gb, gb->cpu_reg.pc++);
gb->cpu_reg.b = __gb_read(gb, gb->cpu_reg.pc++);
break;
case 0x02: /* LD (BC), A */
__gb_write(gb, gb->cpu_reg.bc, gb->cpu_reg.a);
break;
case 0x03: /* INC BC */
gb->cpu_reg.bc++;
break;
case 0x04: /* INC B */
gb->cpu_reg.b++;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.b == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.b & 0x0F) == 0x00);
break;
case 0x05: /* DEC B */
gb->cpu_reg.b--;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.b == 0x00);
gb->cpu_reg.f_bits.n = 1;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.b & 0x0F) == 0x0F);
break;
case 0x06: /* LD B, imm */
gb->cpu_reg.b = __gb_read(gb, gb->cpu_reg.pc++);
break;
case 0x07: /* RLCA */
gb->cpu_reg.a = (gb->cpu_reg.a << 1) | (gb->cpu_reg.a >> 7);
gb->cpu_reg.f_bits.z = 0;
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
gb->cpu_reg.f_bits.c = (gb->cpu_reg.a & 0x01);
break;
case 0x08: { /* LD (imm), SP */
uint16_t temp = __gb_read(gb, gb->cpu_reg.pc++);
temp |= __gb_read(gb, gb->cpu_reg.pc++) << 8;
__gb_write(gb, temp++, gb->cpu_reg.sp & 0xFF);
__gb_write(gb, temp, gb->cpu_reg.sp >> 8);
break;
}
case 0x09: { /* ADD HL, BC */
uint_fast32_t temp = gb->cpu_reg.hl + gb->cpu_reg.bc;
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h =
(temp ^ gb->cpu_reg.hl ^ gb->cpu_reg.bc) & 0x1000 ? 1 : 0;
gb->cpu_reg.f_bits.c = (temp & 0xFFFF0000) ? 1 : 0;
gb->cpu_reg.hl = (temp & 0x0000FFFF);
break;
}
case 0x0A: /* LD A, (BC) */
gb->cpu_reg.a = __gb_read(gb, gb->cpu_reg.bc);
break;
case 0x0B: /* DEC BC */
gb->cpu_reg.bc--;
break;
case 0x0C: /* INC C */
gb->cpu_reg.c++;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.c == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.c & 0x0F) == 0x00);
break;
case 0x0D: /* DEC C */
gb->cpu_reg.c--;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.c == 0x00);
gb->cpu_reg.f_bits.n = 1;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.c & 0x0F) == 0x0F);
break;
case 0x0E: /* LD C, imm */
gb->cpu_reg.c = __gb_read(gb, gb->cpu_reg.pc++);
break;
case 0x0F: /* RRCA */
gb->cpu_reg.f_bits.c = gb->cpu_reg.a & 0x01;
gb->cpu_reg.a = (gb->cpu_reg.a >> 1) | (gb->cpu_reg.a << 7);
gb->cpu_reg.f_bits.z = 0;
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
break;
case 0x10: /* STOP */
// gb->gb_halt = 1;
break;
case 0x11: /* LD DE, imm */
gb->cpu_reg.e = __gb_read(gb, gb->cpu_reg.pc++);
gb->cpu_reg.d = __gb_read(gb, gb->cpu_reg.pc++);
break;
case 0x12: /* LD (DE), A */
__gb_write(gb, gb->cpu_reg.de, gb->cpu_reg.a);
break;
case 0x13: /* INC DE */
gb->cpu_reg.de++;
break;
case 0x14: /* INC D */
gb->cpu_reg.d++;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.d == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.d & 0x0F) == 0x00);
break;
case 0x15: /* DEC D */
gb->cpu_reg.d--;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.d == 0x00);
gb->cpu_reg.f_bits.n = 1;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.d & 0x0F) == 0x0F);
break;
case 0x16: /* LD D, imm */
gb->cpu_reg.d = __gb_read(gb, gb->cpu_reg.pc++);
break;
case 0x17: { /* RLA */
uint8_t temp = gb->cpu_reg.a;
gb->cpu_reg.a = (gb->cpu_reg.a << 1) | gb->cpu_reg.f_bits.c;
gb->cpu_reg.f_bits.z = 0;
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
gb->cpu_reg.f_bits.c = (temp >> 7) & 0x01;
break;
}
case 0x18: { /* JR imm */
int8_t temp = (int8_t) __gb_read(gb, gb->cpu_reg.pc++);
gb->cpu_reg.pc += temp;
break;
}
case 0x19: { /* ADD HL, DE */
uint_fast32_t temp = gb->cpu_reg.hl + gb->cpu_reg.de;
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h =
(temp ^ gb->cpu_reg.hl ^ gb->cpu_reg.de) & 0x1000 ? 1 : 0;
gb->cpu_reg.f_bits.c = (temp & 0xFFFF0000) ? 1 : 0;
gb->cpu_reg.hl = (temp & 0x0000FFFF);
break;
}
case 0x1A: /* LD A, (DE) */
gb->cpu_reg.a = __gb_read(gb, gb->cpu_reg.de);
break;
case 0x1B: /* DEC DE */
gb->cpu_reg.de--;
break;
case 0x1C: /* INC E */
gb->cpu_reg.e++;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.e == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.e & 0x0F) == 0x00);
break;
case 0x1D: /* DEC E */
gb->cpu_reg.e--;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.e == 0x00);
gb->cpu_reg.f_bits.n = 1;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.e & 0x0F) == 0x0F);
break;
case 0x1E: /* LD E, imm */
gb->cpu_reg.e = __gb_read(gb, gb->cpu_reg.pc++);
break;
case 0x1F: { /* RRA */
uint8_t temp = gb->cpu_reg.a;
gb->cpu_reg.a = gb->cpu_reg.a >> 1 | (gb->cpu_reg.f_bits.c << 7);
gb->cpu_reg.f_bits.z = 0;
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
gb->cpu_reg.f_bits.c = temp & 0x1;
break;
}
case 0x20: /* JP NZ, imm */
if (!gb->cpu_reg.f_bits.z) {
int8_t temp = (int8_t) __gb_read(gb, gb->cpu_reg.pc++);
gb->cpu_reg.pc += temp;
inst_cycles += 4;
} else
gb->cpu_reg.pc++;
break;
case 0x21: /* LD HL, imm */
gb->cpu_reg.l = __gb_read(gb, gb->cpu_reg.pc++);
gb->cpu_reg.h = __gb_read(gb, gb->cpu_reg.pc++);
break;
case 0x22: /* LDI (HL), A */
__gb_write(gb, gb->cpu_reg.hl, gb->cpu_reg.a);
gb->cpu_reg.hl++;
break;
case 0x23: /* INC HL */
gb->cpu_reg.hl++;
break;
case 0x24: /* INC H */
gb->cpu_reg.h++;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.h == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.h & 0x0F) == 0x00);
break;
case 0x25: /* DEC H */
gb->cpu_reg.h--;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.h == 0x00);
gb->cpu_reg.f_bits.n = 1;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.h & 0x0F) == 0x0F);
break;
case 0x26: /* LD H, imm */
gb->cpu_reg.h = __gb_read(gb, gb->cpu_reg.pc++);
break;
case 0x27: { /* DAA */
uint16_t a = gb->cpu_reg.a;
if (gb->cpu_reg.f_bits.n) {
if (gb->cpu_reg.f_bits.h)
a = (a - 0x06) & 0xFF;
if (gb->cpu_reg.f_bits.c)
a -= 0x60;
} else {
if (gb->cpu_reg.f_bits.h || (a & 0x0F) > 9)
a += 0x06;
if (gb->cpu_reg.f_bits.c || a > 0x9F)
a += 0x60;
}
if ((a & 0x100) == 0x100)
gb->cpu_reg.f_bits.c = 1;
gb->cpu_reg.a = a;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.a == 0);
gb->cpu_reg.f_bits.h = 0;
break;
}
case 0x28: /* JP Z, imm */
if (gb->cpu_reg.f_bits.z) {
int8_t temp = (int8_t) __gb_read(gb, gb->cpu_reg.pc++);
gb->cpu_reg.pc += temp;
inst_cycles += 4;
} else
gb->cpu_reg.pc++;
break;
case 0x29: { /* ADD HL, HL */
uint_fast32_t temp = gb->cpu_reg.hl + gb->cpu_reg.hl;
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = (temp & 0x1000) ? 1 : 0;
gb->cpu_reg.f_bits.c = (temp & 0xFFFF0000) ? 1 : 0;
gb->cpu_reg.hl = (temp & 0x0000FFFF);
break;
}
case 0x2A: /* LD A, (HL+) */
gb->cpu_reg.a = __gb_read(gb, gb->cpu_reg.hl++);
break;
case 0x2B: /* DEC HL */
gb->cpu_reg.hl--;
break;
case 0x2C: /* INC L */
gb->cpu_reg.l++;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.l == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.l & 0x0F) == 0x00);
break;
case 0x2D: /* DEC L */
gb->cpu_reg.l--;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.l == 0x00);
gb->cpu_reg.f_bits.n = 1;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.l & 0x0F) == 0x0F);
break;
case 0x2E: /* LD L, imm */
gb->cpu_reg.l = __gb_read(gb, gb->cpu_reg.pc++);
break;
case 0x2F: /* CPL */
gb->cpu_reg.a = ~gb->cpu_reg.a;
gb->cpu_reg.f_bits.n = 1;
gb->cpu_reg.f_bits.h = 1;
break;
case 0x30: /* JP NC, imm */
if (!gb->cpu_reg.f_bits.c) {
int8_t temp = (int8_t) __gb_read(gb, gb->cpu_reg.pc++);
gb->cpu_reg.pc += temp;
inst_cycles += 4;
} else
gb->cpu_reg.pc++;
break;
case 0x31: /* LD SP, imm */
gb->cpu_reg.sp = __gb_read(gb, gb->cpu_reg.pc++);
gb->cpu_reg.sp |= __gb_read(gb, gb->cpu_reg.pc++) << 8;
break;
case 0x32: /* LD (HL), A */
__gb_write(gb, gb->cpu_reg.hl, gb->cpu_reg.a);
gb->cpu_reg.hl--;
break;
case 0x33: /* INC SP */
gb->cpu_reg.sp++;
break;
case 0x34: { /* INC (HL) */
uint8_t temp = __gb_read(gb, gb->cpu_reg.hl) + 1;
gb->cpu_reg.f_bits.z = (temp == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = ((temp & 0x0F) == 0x00);
__gb_write(gb, gb->cpu_reg.hl, temp);
break;
}
case 0x35: { /* DEC (HL) */
uint8_t temp = __gb_read(gb, gb->cpu_reg.hl) - 1;
gb->cpu_reg.f_bits.z = (temp == 0x00);
gb->cpu_reg.f_bits.n = 1;
gb->cpu_reg.f_bits.h = ((temp & 0x0F) == 0x0F);
__gb_write(gb, gb->cpu_reg.hl, temp);
break;
}
case 0x36: /* LD (HL), imm */
__gb_write(gb, gb->cpu_reg.hl, __gb_read(gb, gb->cpu_reg.pc++));
break;
case 0x37: /* SCF */
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
gb->cpu_reg.f_bits.c = 1;
break;
case 0x38: /* JP C, imm */
if (gb->cpu_reg.f_bits.c) {
int8_t temp = (int8_t) __gb_read(gb, gb->cpu_reg.pc++);
gb->cpu_reg.pc += temp;
inst_cycles += 4;
} else
gb->cpu_reg.pc++;
break;
case 0x39: { /* ADD HL, SP */
uint_fast32_t temp = gb->cpu_reg.hl + gb->cpu_reg.sp;
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h =
((gb->cpu_reg.hl & 0xFFF) + (gb->cpu_reg.sp & 0xFFF)) & 0x1000 ? 1
: 0;
gb->cpu_reg.f_bits.c = temp & 0x10000 ? 1 : 0;
gb->cpu_reg.hl = (uint16_t) temp;
break;
}
case 0x3A: /* LD A, (HL) */
gb->cpu_reg.a = __gb_read(gb, gb->cpu_reg.hl--);
break;
case 0x3B: /* DEC SP */
gb->cpu_reg.sp--;
break;
case 0x3C: /* INC A */
gb->cpu_reg.a++;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.a == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.a & 0x0F) == 0x00);
break;
case 0x3D: /* DEC A */
gb->cpu_reg.a--;
gb->cpu_reg.f_bits.z = (gb->cpu_reg.a == 0x00);
gb->cpu_reg.f_bits.n = 1;
gb->cpu_reg.f_bits.h = ((gb->cpu_reg.a & 0x0F) == 0x0F);
break;
case 0x3E: /* LD A, imm */
gb->cpu_reg.a = __gb_read(gb, gb->cpu_reg.pc++);
break;
case 0x3F: /* CCF */
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = 0;
gb->cpu_reg.f_bits.c = ~gb->cpu_reg.f_bits.c;
break;
case 0x40: /* LD B, B */
break;
case 0x41: /* LD B, C */
gb->cpu_reg.b = gb->cpu_reg.c;
break;
case 0x42: /* LD B, D */
gb->cpu_reg.b = gb->cpu_reg.d;
break;
case 0x43: /* LD B, E */
gb->cpu_reg.b = gb->cpu_reg.e;
break;
case 0x44: /* LD B, H */
gb->cpu_reg.b = gb->cpu_reg.h;
break;
case 0x45: /* LD B, L */
gb->cpu_reg.b = gb->cpu_reg.l;
break;
case 0x46: /* LD B, (HL) */
gb->cpu_reg.b = __gb_read(gb, gb->cpu_reg.hl);
break;
case 0x47: /* LD B, A */
gb->cpu_reg.b = gb->cpu_reg.a;
break;
case 0x48: /* LD C, B */
gb->cpu_reg.c = gb->cpu_reg.b;
break;
case 0x49: /* LD C, C */
break;
case 0x4A: /* LD C, D */
gb->cpu_reg.c = gb->cpu_reg.d;
break;
case 0x4B: /* LD C, E */
gb->cpu_reg.c = gb->cpu_reg.e;
break;
case 0x4C: /* LD C, H */
gb->cpu_reg.c = gb->cpu_reg.h;
break;
case 0x4D: /* LD C, L */
gb->cpu_reg.c = gb->cpu_reg.l;
break;
case 0x4E: /* LD C, (HL) */
gb->cpu_reg.c = __gb_read(gb, gb->cpu_reg.hl);
break;
case 0x4F: /* LD C, A */
gb->cpu_reg.c = gb->cpu_reg.a;
break;
case 0x50: /* LD D, B */
gb->cpu_reg.d = gb->cpu_reg.b;
break;
case 0x51: /* LD D, C */
gb->cpu_reg.d = gb->cpu_reg.c;
break;
case 0x52: /* LD D, D */
break;
case 0x53: /* LD D, E */
gb->cpu_reg.d = gb->cpu_reg.e;
break;
case 0x54: /* LD D, H */
gb->cpu_reg.d = gb->cpu_reg.h;
break;
case 0x55: /* LD D, L */
gb->cpu_reg.d = gb->cpu_reg.l;
break;
case 0x56: /* LD D, (HL) */
gb->cpu_reg.d = __gb_read(gb, gb->cpu_reg.hl);
break;
case 0x57: /* LD D, A */
gb->cpu_reg.d = gb->cpu_reg.a;
break;
case 0x58: /* LD E, B */
gb->cpu_reg.e = gb->cpu_reg.b;
break;
case 0x59: /* LD E, C */
gb->cpu_reg.e = gb->cpu_reg.c;
break;
case 0x5A: /* LD E, D */
gb->cpu_reg.e = gb->cpu_reg.d;
break;
case 0x5B: /* LD E, E */
break;
case 0x5C: /* LD E, H */
gb->cpu_reg.e = gb->cpu_reg.h;
break;
case 0x5D: /* LD E, L */
gb->cpu_reg.e = gb->cpu_reg.l;
break;
case 0x5E: /* LD E, (HL) */
gb->cpu_reg.e = __gb_read(gb, gb->cpu_reg.hl);
break;
case 0x5F: /* LD E, A */
gb->cpu_reg.e = gb->cpu_reg.a;
break;
case 0x60: /* LD H, B */
gb->cpu_reg.h = gb->cpu_reg.b;
break;
case 0x61: /* LD H, C */
gb->cpu_reg.h = gb->cpu_reg.c;
break;
case 0x62: /* LD H, D */
gb->cpu_reg.h = gb->cpu_reg.d;
break;
case 0x63: /* LD H, E */
gb->cpu_reg.h = gb->cpu_reg.e;
break;
case 0x64: /* LD H, H */
break;
case 0x65: /* LD H, L */
gb->cpu_reg.h = gb->cpu_reg.l;
break;
case 0x66: /* LD H, (HL) */
gb->cpu_reg.h = __gb_read(gb, gb->cpu_reg.hl);
break;
case 0x67: /* LD H, A */
gb->cpu_reg.h = gb->cpu_reg.a;
break;
case 0x68: /* LD L, B */
gb->cpu_reg.l = gb->cpu_reg.b;
break;
case 0x69: /* LD L, C */
gb->cpu_reg.l = gb->cpu_reg.c;
break;
case 0x6A: /* LD L, D */
gb->cpu_reg.l = gb->cpu_reg.d;
break;
case 0x6B: /* LD L, E */
gb->cpu_reg.l = gb->cpu_reg.e;
break;
case 0x6C: /* LD L, H */
gb->cpu_reg.l = gb->cpu_reg.h;
break;
case 0x6D: /* LD L, L */
break;
case 0x6E: /* LD L, (HL) */
gb->cpu_reg.l = __gb_read(gb, gb->cpu_reg.hl);
break;
case 0x6F: /* LD L, A */
gb->cpu_reg.l = gb->cpu_reg.a;
break;
case 0x70: /* LD (HL), B */
__gb_write(gb, gb->cpu_reg.hl, gb->cpu_reg.b);
break;
case 0x71: /* LD (HL), C */
__gb_write(gb, gb->cpu_reg.hl, gb->cpu_reg.c);
break;
case 0x72: /* LD (HL), D */
__gb_write(gb, gb->cpu_reg.hl, gb->cpu_reg.d);
break;
case 0x73: /* LD (HL), E */
__gb_write(gb, gb->cpu_reg.hl, gb->cpu_reg.e);
break;
case 0x74: /* LD (HL), H */
__gb_write(gb, gb->cpu_reg.hl, gb->cpu_reg.h);
break;
case 0x75: /* LD (HL), L */
__gb_write(gb, gb->cpu_reg.hl, gb->cpu_reg.l);
break;
case 0x76: /* HALT */
/* TODO: Emulate HALT bug? */
gb->gb_halt = 1;
break;
case 0x77: /* LD (HL), A */
__gb_write(gb, gb->cpu_reg.hl, gb->cpu_reg.a);
break;
case 0x78: /* LD A, B */
gb->cpu_reg.a = gb->cpu_reg.b;
break;
case 0x79: /* LD A, C */
gb->cpu_reg.a = gb->cpu_reg.c;
break;
case 0x7A: /* LD A, D */
gb->cpu_reg.a = gb->cpu_reg.d;
break;
case 0x7B: /* LD A, E */
gb->cpu_reg.a = gb->cpu_reg.e;
break;
case 0x7C: /* LD A, H */
gb->cpu_reg.a = gb->cpu_reg.h;
break;
case 0x7D: /* LD A, L */
gb->cpu_reg.a = gb->cpu_reg.l;
break;
case 0x7E: /* LD A, (HL) */
gb->cpu_reg.a = __gb_read(gb, gb->cpu_reg.hl);
break;
case 0x7F: /* LD A, A */
break;
case 0x80: { /* ADD A, B */
uint16_t temp = gb->cpu_reg.a + gb->cpu_reg.b;
gb->cpu_reg.f_bits.z = ((temp & 0xFF) == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h =
(gb->cpu_reg.a ^ gb->cpu_reg.b ^ temp) & 0x10 ? 1 : 0;
gb->cpu_reg.f_bits.c = (temp & 0xFF00) ? 1 : 0;
gb->cpu_reg.a = (temp & 0xFF);
break;
}
case 0x81: { /* ADD A, C */
uint16_t temp = gb->cpu_reg.a + gb->cpu_reg.c;
gb->cpu_reg.f_bits.z = ((temp & 0xFF) == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h =
(gb->cpu_reg.a ^ gb->cpu_reg.c ^ temp) & 0x10 ? 1 : 0;
gb->cpu_reg.f_bits.c = (temp & 0xFF00) ? 1 : 0;
gb->cpu_reg.a = (temp & 0xFF);
break;
}
case 0x82: { /* ADD A, D */
uint16_t temp = gb->cpu_reg.a + gb->cpu_reg.d;
gb->cpu_reg.f_bits.z = ((temp & 0xFF) == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h =
(gb->cpu_reg.a ^ gb->cpu_reg.d ^ temp) & 0x10 ? 1 : 0;
gb->cpu_reg.f_bits.c = (temp & 0xFF00) ? 1 : 0;
gb->cpu_reg.a = (temp & 0xFF);
break;
}
case 0x83: { /* ADD A, E */
uint16_t temp = gb->cpu_reg.a + gb->cpu_reg.e;
gb->cpu_reg.f_bits.z = ((temp & 0xFF) == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h =
(gb->cpu_reg.a ^ gb->cpu_reg.e ^ temp) & 0x10 ? 1 : 0;
gb->cpu_reg.f_bits.c = (temp & 0xFF00) ? 1 : 0;
gb->cpu_reg.a = (temp & 0xFF);
break;
}
case 0x84: { /* ADD A, H */
uint16_t temp = gb->cpu_reg.a + gb->cpu_reg.h;
gb->cpu_reg.f_bits.z = ((temp & 0xFF) == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h =
(gb->cpu_reg.a ^ gb->cpu_reg.h ^ temp) & 0x10 ? 1 : 0;
gb->cpu_reg.f_bits.c = (temp & 0xFF00) ? 1 : 0;
gb->cpu_reg.a = (temp & 0xFF);
break;
}
case 0x85: { /* ADD A, L */
uint16_t temp = gb->cpu_reg.a + gb->cpu_reg.l;
gb->cpu_reg.f_bits.z = ((temp & 0xFF) == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h =
(gb->cpu_reg.a ^ gb->cpu_reg.l ^ temp) & 0x10 ? 1 : 0;
gb->cpu_reg.f_bits.c = (temp & 0xFF00) ? 1 : 0;
gb->cpu_reg.a = (temp & 0xFF);
break;
}
case 0x86: { /* ADD A, (HL) */
uint8_t hl = __gb_read(gb, gb->cpu_reg.hl);
uint16_t temp = gb->cpu_reg.a + hl;
gb->cpu_reg.f_bits.z = ((temp & 0xFF) == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = (gb->cpu_reg.a ^ hl ^ temp) & 0x10 ? 1 : 0;
gb->cpu_reg.f_bits.c = (temp & 0xFF00) ? 1 : 0;
gb->cpu_reg.a = (temp & 0xFF);
break;
}
case 0x87: { /* ADD A, A */
uint16_t temp = gb->cpu_reg.a + gb->cpu_reg.a;
gb->cpu_reg.f_bits.z = ((temp & 0xFF) == 0x00);
gb->cpu_reg.f_bits.n = 0;
gb->cpu_reg.f_bits.h = temp & 0x10 ? 1 : 0;