You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
For circuits as big as the horner example, initial loading takes more than ten seconds (on my machine) leading to a blocked browser tab and a bad user experience without any progress notification.
I think it might be better to first load the top level of the circuit and handle subcircuits loading later (or even in WebWorkers) after the top level is already shown to the user (perhaps also showing some loading progress indicator). Obviously the simulation could not start before all subcircuits have been loaded.
One conceptual change that would be needed for this to work is how subcircuit instances get to know their in/outputs. But I think this should be easy to achieve with a small preprocessing step iterating over all subcircuits and adding some extra IO information to the subcircuit definition. As for each subcircuit type the in/output ports are identical, this might even result in a small performance gain if not every instance of the subcircuit has to check itself for its in/outputs while instantiating.
The text was updated successfully, but these errors were encountered:
This seems like a nice thing to have - I'm all for improved user experience. Also, if this is done right, this can work well with moving simulation logic out to Wasm, which I'd like to do someday. If simulation logic is external to the graph, then the subcircuit graph would need to be created only when the user decides to display it - so even more lazily.
For circuits as big as the horner example, initial loading takes more than ten seconds (on my machine) leading to a blocked browser tab and a bad user experience without any progress notification.
I think it might be better to first load the top level of the circuit and handle subcircuits loading later (or even in WebWorkers) after the top level is already shown to the user (perhaps also showing some loading progress indicator). Obviously the simulation could not start before all subcircuits have been loaded.
One conceptual change that would be needed for this to work is how subcircuit instances get to know their in/outputs. But I think this should be easy to achieve with a small preprocessing step iterating over all subcircuits and adding some extra IO information to the subcircuit definition. As for each subcircuit type the in/output ports are identical, this might even result in a small performance gain if not every instance of the subcircuit has to check itself for its in/outputs while instantiating.
The text was updated successfully, but these errors were encountered: