diff --git a/CHANGELOG.md b/CHANGELOG.md index b87a13d..a648e03 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,16 +7,22 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## [Unreleased] +## [0.1.0] - 2024-06-14 +### Added + - new dependency for openpyxl to read xlsx-files out of the box + +### Updated + - Updated tutorial of usage + ## [0.0.2] - 2024-05-19 ### Added - Fully automated PyPI package upload - ## [0.0.1] - 2024-05-19 - ### Added - Initial release -[unreleased]: https://github.com/upb-lea/KiClearance/compare/0.0.2...HEAD +[unreleased]: https://github.com/upb-lea/KiClearance/compare/0.1.0...HEAD +[0.1.0]: https://github.com/upb-lea/KiClearance/compare/0.0.2...0.1.0 [0.0.2]: https://github.com/upb-lea/KiClearance/compare/0.0.1...0.0.2 [0.0.1]: https://github.com/upb-lea/KiClearance/releases/tag/0.0.1 diff --git a/README.rst b/README.rst index 19cb85a..13fe233 100644 --- a/README.rst +++ b/README.rst @@ -20,9 +20,19 @@ Install KiClearance directly from pyPI: Usage --------------------------------------- -Create a table (clearance.ods/xls/csv) in your KiCad project directory with voltage clearances defined by your requirements (e.g. standards). -Use this template as a guide: `clearance.ods `__. +Create a table 'clearance.ods/xls/csv' containing clearance distances +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Create a table (name it clearance.ods/xls/csv) in your KiCad project directory with voltage clearances defined by your requirements (e.g. standards). +Download and use this template as a guide: `clearance.ods `__. + +The table contains the distances from a potential to another in ``mm``. The same net distance is optional. +The default distance is ``0.15 mm``. + +.. image:: docs/source/figures/table.png + +Define net classes in your KiCad project +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Add the net classes to each connection in the circuit diagram. .. image:: docs/source/figures/net_class_directive_labels.png @@ -32,21 +42,30 @@ Add the same net classes in the net classes of the PCB editor: .. image:: docs/source/figures/board_setup.png +Run KiClearance +~~~~~~~~~~~~~~~ + Navigate to the project folder with the KiCad project and the clearance.ods/.xls/.csv file. Open a terminal and execute : :: python -m kiclearance -Now a file yourprojectname.kicad_dru is generated, which contains the rule sets. +Now a file ``yourprojectname.kicad_dru`` is generated, which contains the rule sets. + +Open your KiCad project, the rule sets are now stored and you can start the routing. + +To see help and options, run + +:: -Open your Kicad project, the rule sets are now stored and you can start the routing. + python -m kiclearance --help Tips and tricks --------------------------------------- If two network classes are assigned to a connection by mistake, this is displayed as an error in the Electrical Rules Checker (``Inspect`` -> ``Electrical Rules Checker``). -KiCad works through the rules from bottom to top: Once an applicable rule has been found, kiCad will not search for further rules. Keep this in mind when adding your own rules. +KiCad works through the rules from bottom to top: Once an applicable rule has been found, KiCad will not search for further rules. Keep this in mind when adding more own rules except from this script here. Example --------------------------------------- @@ -59,6 +78,6 @@ Find the documentation `here ` Troubleshooting --------------------------------------- -This program has so far been tested only on linux. +This program has so far been tested only on Linux and Windows. diff --git a/docs/source/conf.py b/docs/source/conf.py index 6d1f81e..c58bc70 100644 --- a/docs/source/conf.py +++ b/docs/source/conf.py @@ -20,7 +20,7 @@ project = 'kiclearance' copyright = '2024, UPB-LEA' author = 'UPB-LEA' -release = '0.0.2' +release = '0.1.0' # -- General configuration --------------------------------------------------- # https://www.sphinx-doc.org/en/master/usage/configuration.html#general-configuration diff --git a/docs/source/figures/table.png b/docs/source/figures/table.png new file mode 100644 index 0000000..c698837 Binary files /dev/null and b/docs/source/figures/table.png differ diff --git a/docs/source/figures/table.svg b/docs/source/figures/table.svg new file mode 100644 index 0000000..c175086 --- /dev/null +++ b/docs/source/figures/table.svg @@ -0,0 +1,129 @@ + + + +Optional: Distance between same net classes. Distance between different net classes in mm diff --git a/examples/clearance_example.kicad_dru b/examples/clearance_example.kicad_dru index a8c0c1a..64a1313 100644 --- a/examples/clearance_example.kicad_dru +++ b/examples/clearance_example.kicad_dru @@ -1,7 +1,7 @@ (version 1) # Auto-Generated for voltage distances - start (rule Default_Default_inner_outer - (constraint clearance (min "0.15mm")) + (constraint clearance (min "0.35mm")) (condition "A.NetClass == 'Default' && B.NetClass == 'Default'")) (rule LV_Default_outer (layer outer) @@ -9,10 +9,10 @@ (condition "A.NetClass == 'LV' && B.NetClass == 'Default'")) (rule LV_Default_inner (layer inner) - (constraint clearance (min "4.05mm")) + (constraint clearance (min "0.81mm")) (condition "A.NetClass == 'LV' && B.NetClass == 'Default'")) (rule LV_LV_inner_outer - (constraint clearance (min "0.15mm")) + (constraint clearance (min "0.35mm")) (condition "A.NetClass == 'LV' && B.NetClass == 'LV'")) (rule HV_Default_outer (layer outer) @@ -20,7 +20,7 @@ (condition "A.NetClass == 'HV' && B.NetClass == 'Default'")) (rule HV_Default_inner (layer inner) - (constraint clearance (min "4.05mm")) + (constraint clearance (min "0.81mm")) (condition "A.NetClass == 'HV' && B.NetClass == 'Default'")) (rule HV_LV_outer (layer outer) @@ -28,9 +28,9 @@ (condition "A.NetClass == 'HV' && B.NetClass == 'LV'")) (rule HV_LV_inner (layer inner) - (constraint clearance (min "1.65mm")) + (constraint clearance (min "0.33mm")) (condition "A.NetClass == 'HV' && B.NetClass == 'LV'")) (rule HV_HV_inner_outer - (constraint clearance (min "0.15mm")) + (constraint clearance (min "0.35mm")) (condition "A.NetClass == 'HV' && B.NetClass == 'HV'")) # Auto-Generated - end diff --git a/examples/clearance_example.kicad_pcb b/examples/clearance_example.kicad_pcb index 52a129b..09d4472 100644 --- a/examples/clearance_example.kicad_pcb +++ b/examples/clearance_example.kicad_pcb @@ -2149,7 +2149,7 @@ (descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") (tags "LED") (property "Reference" "D1" - (at 2.7 0.1 360) + (at 2.7 0.1 0) (layer "B.SilkS") (uuid "1f6903c1-4170-440e-948a-37ba6d6b509f") (effects @@ -2161,7 +2161,7 @@ ) ) (property "Value" "LED" - (at 0 -1.43 360) + (at 0 -1.43 0) (layer "B.Fab") (uuid "0ddc1e33-e052-432d-bc89-aa84ddef9bca") (effects @@ -2337,7 +2337,7 @@ (uuid "b0d8b3c8-a33d-4d63-8e13-64597362c650") ) (fp_text user "${REFERENCE}" - (at 0 0 360) + (at 0 0 0) (layer "B.Fab") (uuid "e0686616-cc9e-469a-a03a-3e9e2f19a329") (effects @@ -2604,4 +2604,102 @@ (net 7) (uuid "d0b640e9-2890-4895-b6a9-bf7215d052b5") ) + (zone + (net 2) + (net_name "Net-(J1-Pin_1)") + (layer "B.Cu") + (uuid "54f12446-dd42-4adf-8387-e1b819530631") + (hatch edge 0.5) + (connect_pads + (clearance 0.5) + ) + (min_thickness 0.25) + (filled_areas_thickness no) + (fill yes + (thermal_gap 0.5) + (thermal_bridge_width 0.5) + ) + (polygon + (pts + (xy 129.7 52.4) (xy 102.8 52.3) (xy 102.8 66.3) (xy 129.7 66.3) + ) + ) + (filled_polygon + (layer "B.Cu") + (pts + (xy 129.576463 52.39954) (xy 129.643427 52.419473) (xy 129.688985 52.472447) (xy 129.7 52.523539) + (xy 129.7 52.8755) (xy 129.680315 52.942539) (xy 129.627511 52.988294) (xy 129.576 52.9995) (xy 124.148572 52.9995) + (xy 123.81446 52.9995) (xy 123.716216 53.009176) (xy 123.48196 53.032248) (xy 123.154286 53.097424) + (xy 123.154275 53.097427) (xy 122.834538 53.194418) (xy 122.525868 53.322273) (xy 122.525854 53.32228) + (xy 122.333839 53.424913) (xy 122.333839 53.424914) (xy 122.27491 53.456412) (xy 122.231204 53.479774) + (xy 122.231194 53.47978) (xy 121.953406 53.665393) (xy 121.953392 53.665403) (xy 121.69512 53.877361) + (xy 120.09861 55.473873) (xy 119.862361 55.71012) (xy 119.650403 55.968392) (xy 119.650393 55.968406) + (xy 119.464779 56.246195) (xy 119.444303 56.284503) (xy 119.444302 56.284502) (xy 119.30728 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"c30432b7-0855-4ee4-979d-3a35bde87e77") ) + (label "trial#" + (at 132.08 86.36 0) + (fields_autoplaced yes) + (effects + (font + (size 1.27 1.27) + ) + (justify left bottom) + ) + (uuid "f83a7cf7-a3a4-4848-b348-545a8def3b7f") + ) (netclass_flag "" (length 2.54) (shape round) diff --git a/kiclearance/__main__.py b/kiclearance/__main__.py index 121d6c7..3bb9a75 100644 --- a/kiclearance/__main__.py +++ b/kiclearance/__main__.py @@ -10,7 +10,7 @@ # Parse command line arguments try: - opts, args = getopt.getopt(sys.argv[1:], "hf:n:t:", ["help", "project_folder=", "project_name=", "table_file="]) + opts, args = getopt.getopt(sys.argv[1:], "hf:n:t:i:d:", ["help", "project_folder=", "project_name=", "table_file=, 'factor_inner_layers=", "min_track_distance="]) except getopt.GetoptError as err: print(err) usage() @@ -26,9 +26,13 @@ project_name = a elif o in ("-t", "--table_file_name"): table_name = a + elif o in ("-i", "factor_inner_layers"): + factor_inner_layers = float(a) + elif o in ("-d", "min_track_distance"): + min_track_distance = float(a) # Run script table_file = look_for_clearance_table_file(project_folder, table_name) project_name = look_for_kicad_project(project_folder, project_name) table_data = parse_excel_table(table_file) -write_design_rule_file(table_data, project_folder, project_name) +write_design_rule_file(table_data, project_folder, project_name, factor_inner_layers=factor_inner_layers, min_track_distance=min_track_distance) diff --git a/kiclearance/kiclearance.py b/kiclearance/kiclearance.py index fe89fe0..e67cc0e 100644 --- a/kiclearance/kiclearance.py +++ b/kiclearance/kiclearance.py @@ -7,8 +7,7 @@ import numpy as np -def write_design_rule_file(clearance_table_data, folder, kicad_project_name: str, factor_inner_layers: float = 0.5, - min_track_distance: float = 0.15): +def write_design_rule_file(clearance_table_data, folder, kicad_project_name: str, factor_inner_layers: float, min_track_distance: float): """ Write the rules to the design rule file (your_project.kicad_dru). @@ -26,6 +25,11 @@ def write_design_rule_file(clearance_table_data, folder, kicad_project_name: str :type folder: str """ + if factor_inner_layers is None: + factor_inner_layers = 0.5 + if min_track_distance is None: + min_track_distance = 0.15 + start_comment = "# Auto-Generated for voltage distances - start" end_comment = "# Auto-Generated - end" @@ -202,36 +206,12 @@ def usage(): -h, --help: Prints this information,\n\ -f, --project_folder (Optional): Path to the folder in which the project is located. Default: Folder in which this python script is located.\n\ -n, --project_name (Optional): Name of the kicad project (file prefix). Default: Script will look for a file with .kicad_pro in the set folder.\n\ - -t, --table_file (Optional): Name (and ending) of the file containing the distance values. Default name: 'clearance'." + -t, --table_file (Optional): Name (and ending) of the file containing the distance values. Default name: 'clearance'.\n\ + -fi, --factor_inner_layers (Optional): Reduced factor for the inner layers. Default: 0.5\n\ + -td, --min_track_distance (Optional): minimum track distance between two tracks on the same potential. Default: 0.15 mm." + print(text) if __name__ == "__main__": - project_folder = os.path.dirname(os.path.realpath(__file__)) - table_name = None - project_name = None - - # Parse command line arguments - try: - opts, args = getopt.getopt(sys.argv[1:], "hf:n:t:", ["help", "project_folder=", "project_name=", "table_file="]) - except getopt.GetoptError as err: - print(err) - usage() - sys.exit(2) - - for o, a in opts: - if o in ("-h", "--help"): - usage() - sys.exit() - elif o in ("-f", "--project_folder"): - project_folder = a - elif o in ("-n", "--project_name"): - project_name = a - elif o in ("-t", "--table_file_name"): - table_name = a - - # Run script - table_file = look_for_clearance_table_file(project_folder, table_name) - project_name = look_for_kicad_project(project_folder, project_name) - table_data = parse_excel_table(table_file) - write_design_rule_file(table_data, project_folder, project_name) + pass \ No newline at end of file diff --git a/pyproject.toml b/pyproject.toml index eab4f39..6252abc 100644 --- a/pyproject.toml +++ b/pyproject.toml @@ -1,6 +1,6 @@ [project] name = "kiclearance" -version = "0.0.2" +version = "0.1.0" authors = [ { name = "UPB-LEA" }, ]