From 1af5ea52e2cf6ba8c9c0998af97bad3ab32bbbba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?P=C3=81LFFY=20D=C3=A1niel?= Date: Fri, 31 Mar 2023 21:13:05 +0200 Subject: [PATCH 1/9] make wolfcrypt use generic esp apis instead of arch specifics This makes it build for all targets supported by esp-idf v4.4, without hardware acceleration. Specifying the target in user_settings.h is only required for hw accel. --- IDE/Espressif/ESP-IDF/user_settings.h | 8 ++-- wolfcrypt/benchmark/benchmark.c | 51 +++++++++++--------- wolfcrypt/src/random.c | 68 +++++++++------------------ 3 files changed, 54 insertions(+), 73 deletions(-) diff --git a/IDE/Espressif/ESP-IDF/user_settings.h b/IDE/Espressif/ESP-IDF/user_settings.h index 215b37690b..aa0dadbe52 100644 --- a/IDE/Espressif/ESP-IDF/user_settings.h +++ b/IDE/Espressif/ESP-IDF/user_settings.h @@ -21,20 +21,18 @@ #undef WOLFSSL_ESPIDF #undef WOLFSSL_ESPWROOM32 #undef WOLFSSL_ESPWROOM32SE -#undef WOLFSSL_ESPWROOM32 -#undef WOLFSSL_ESP8266 #define WOLFSSL_ESPIDF /* - * choose ONE of these Espressif chips to define: + * choose ONE of these Espressif chips to define for HW acceleration or + * leave all undefined for a non-accelerated build for other chips: * * WOLFSSL_ESPWROOM32 * WOLFSSL_ESPWROOM32SE - * WOLFSSL_ESP8266 */ -#define WOLFSSL_ESPWROOM32 +/* #define WOLFSSL_ESPWROOM32 */ /* #define DEBUG_WOLFSSL_VERBOSE */ diff --git a/wolfcrypt/benchmark/benchmark.c b/wolfcrypt/benchmark/benchmark.c index 3c8b0178b4..6515f54363 100644 --- a/wolfcrypt/benchmark/benchmark.c +++ b/wolfcrypt/benchmark/benchmark.c @@ -66,7 +66,14 @@ #include #ifdef WOLFSSL_ESPIDF - #include /* reminder Espressif RISC-V not yet implemented */ + #include + #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 3, 0) + #include + #else + #include + #define cpu_hal_get_cycle_count() xthal_get_ccount() + #endif + #include #endif @@ -964,28 +971,28 @@ static const char* bench_desc_words[][15] = { static THREAD_LS_T word64 total_cycles; /* the return value */ - static THREAD_LS_T word64 _xthal_get_ccount_ex = 0; + static THREAD_LS_T word64 _cpu_hal_get_cycle_count_ex = 0; /* the last value seen, adjusted for an overflow */ - static THREAD_LS_T word64 _xthal_get_ccount_last = 0; + static THREAD_LS_T word64 _cpu_hal_get_cycle_count_last = 0; /* TAG for ESP_LOGx() */ static const char* TAG = "wolfssl_benchmark"; #define HAVE_GET_CYCLES #define INIT_CYCLE_COUNTER - static WC_INLINE word64 get_xtensa_cycles(void); + static WC_INLINE word64 get_esp_cpu_cycles(void); - /* WARNING the hal UINT xthal_get_ccount() quietly rolls over. */ - #define BEGIN_ESP_CYCLES begin_cycles = (get_xtensa_cycles()); + /* WARNING the hal UINT cpu_hal_get_cycle_count() quietly rolls over. */ + #define BEGIN_ESP_CYCLES begin_cycles = (get_esp_cpu_cycles()); /* since it rolls over, we have something that will tolerate one */ #define END_ESP_CYCLES \ ESP_LOGV(TAG,"%llu - %llu", \ - get_xtensa_cycles(), \ + get_esp_cpu_cycles(), \ begin_cycles \ ); \ - total_cycles = (get_xtensa_cycles() - begin_cycles); + total_cycles = (get_esp_cpu_cycles() - begin_cycles); #define SHOW_ESP_CYCLES(b, n, s) \ (void)XSNPRINTF(b + XSTRLEN(b), n - XSTRLEN(b), " %s = %6.2f\n", \ @@ -997,23 +1004,23 @@ static const char* bench_desc_words[][15] = { (void)XSNPRINTF(b + XSTRLEN(b), n - XSTRLEN(b), "%.6f,\n", \ (float)total_cycles / (count*s)) - /* xthal_get_ccount_ex() is a single-overflow-tolerant extension to - ** the Espressif `unsigned xthal_get_ccount()` which is known to overflow - ** at least once during full benchmark tests. + /* cpu_hal_get_cycle_count_ex() is a single-overflow-tolerant extension to + ** the Espressif `unsigned cpu_hal_get_cycle_count()` which is known to + ** overflow at least once during full benchmark tests. */ - word64 xthal_get_ccount_ex() + word64 cpu_hal_get_cycle_count_ex() { /* reminder: unsigned long long max = 18,446,744,073,709,551,615 */ /* the currently observed clock counter value */ - word64 thisVal = xthal_get_ccount(); + word64 thisVal = cpu_hal_get_cycle_count(); /* if the current value is less than the previous value, ** we likely overflowed at least once. */ - if (thisVal < _xthal_get_ccount_last) + if (thisVal < _cpu_hal_get_cycle_count_last) { - /* Warning: we assume the return type of xthal_get_ccount() + /* Warning: we assume the return type of cpu_hal_get_cycle_count() ** will always be unsigned int to add UINT_MAX. ** ** NOTE for long duration between calls with multiple overflows: @@ -1022,21 +1029,21 @@ static const char* bench_desc_words[][15] = { ** ** At this time no single test overflows. This is currently only a ** concern for cumulative counts over multiple tests. As long - ** as well call xthal_get_ccount_ex() with no more than one + ** as well call cpu_hal_get_cycle_count_ex() with no more than one ** overflow CPU tick count, all will be well. */ - ESP_LOGV(TAG, "Alert: Detected xthal_get_ccount overflow, " + ESP_LOGV(TAG, "Alert: Detected cpu_hal_get_cyclecount overflow, " "adding %ull", UINT_MAX); thisVal += (word64)UINT_MAX; } /* adjust our actual returned value that takes into account overflow */ - _xthal_get_ccount_ex += (thisVal - _xthal_get_ccount_last); + _cpu_hal_get_cycle_count_ex += (thisVal - _cpu_hal_get_cycle_count_last); /* all of this took some time, so reset the "last seen" value */ - _xthal_get_ccount_last = xthal_get_ccount(); + _cpu_hal_get_cycle_count_last = cpu_hal_get_cycle_count(); - return _xthal_get_ccount_ex; + return _cpu_hal_get_cycle_count_ex; } /* implement other architecture cycle counters here */ @@ -8887,9 +8894,9 @@ void bench_sphincsKeySign(byte level, byte optim) #if defined(HAVE_GET_CYCLES) #if defined(WOLFSSL_ESPIDF) - static WC_INLINE word64 get_xtensa_cycles(void) + static WC_INLINE word64 get_esp_cpu_cycles(void) { - return xthal_get_ccount_ex(); + return cpu_hal_get_cycle_count_ex(); } /* implement other architectures here */ diff --git a/wolfcrypt/src/random.c b/wolfcrypt/src/random.c index b289dbc929..547274a1e5 100644 --- a/wolfcrypt/src/random.c +++ b/wolfcrypt/src/random.c @@ -3391,53 +3391,29 @@ int wc_GenerateSeed(OS_Seed* os, byte* output, word32 sz) #elif defined(WOLFSSL_ESPIDF) /* Espressif */ - #if defined(WOLFSSL_ESPWROOM32) || defined(WOLFSSL_ESPWROOM32SE) - - /* Espressif ESP32 */ - #include - #if defined(CONFIG_IDF_TARGET_ESP32S3) - #include - #endif - - int wc_GenerateSeed(OS_Seed* os, byte* output, word32 sz) - { - word32 rand; - while (sz > 0) { - word32 len = sizeof(rand); - if (sz < len) - len = sz; - /* Get one random 32-bit word from hw RNG */ - rand = esp_random( ); - XMEMCPY(output, &rand, len); - output += len; - sz -= len; - } - - return 0; - } - - #elif defined(WOLFSSL_ESP8266) - - /* Espressif ESP8266 */ - #include - - int wc_GenerateSeed(OS_Seed* os, byte* output, word32 sz) - { - word32 rand; - while (sz > 0) { - word32 len = sizeof(rand); - if (sz < len) - len = sz; - /* Get one random 32-bit word from hw RNG */ - rand = esp_random( ); - XMEMCPY(output, &rand, len); - output += len; - sz -= len; - } + #include + #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0) + #include + #else + #include + #endif - return 0; - } - #endif /* end WOLFSSL_ESPWROOM32 */ + int wc_GenerateSeed(OS_Seed* os, byte* output, word32 sz) + { + word32 rand; + while (sz > 0) { + word32 len = sizeof(rand); + if (sz < len) + len = sz; + /* Get one random 32-bit word from hw RNG */ + rand = esp_random( ); + XMEMCPY(output, &rand, len); + output += len; + sz -= len; + } + + return 0; + } #elif defined(WOLFSSL_LINUXKM) #include From a45684ce614afdaaffff80e71e2ab7da70d9cf2b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?P=C3=81LFFY=20D=C3=A1niel?= Date: Fri, 31 Mar 2023 21:36:13 +0200 Subject: [PATCH 2/9] clean up wolfssl_test for the generic esp apis --- .../ESP-IDF/examples/wolfssl_test/main/main.c | 35 ++++++++++--------- .../examples/wolfssl_test_idf/main/main.c | 35 ++++++++++--------- 2 files changed, 36 insertions(+), 34 deletions(-) diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c index 01538f72e3..84ef729860 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c @@ -152,36 +152,37 @@ void app_main(void) /* some interesting settings are target specific (ESP32, -C3, -S3, etc */ -#if defined(CONFIG_IDF_TARGET_ESP32C3) - /* not available for C3 at this time */ +#if defined(CONFIG_IDF_TARGET_ESP32) + ESP_LOGI(TAG, "CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ = %u MHz", + CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ + ); + ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); +#elif defined(CONFIG_IDF_TARGET_ESP32S2) + ESP_LOGI(TAG, "CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ = %u MHz", + CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ + ); + ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); #elif defined(CONFIG_IDF_TARGET_ESP32S3) ESP_LOGI(TAG, "CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ = %u MHz", CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ ); ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); +#elif defined(CONFIG_IDF_TARGET_ESP32H2) + ESP_LOGI(TAG, "CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ = %u MHz", + CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ + ); #else - ESP_LOGI(TAG, "CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ - ); - ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); + /* No generic implementation yet */ #endif /* all platforms: stack high water mark check */ ESP_LOGI(TAG, "Stack HWM: %d\n", uxTaskGetStackHighWaterMark(NULL)); /* check to see if we are using hardware encryption */ -#if defined(NO_ESP32WROOM32_CRYPT) - ESP_LOGI(TAG, "NO_ESP32WROOM32_CRYPT defined! HW acceleration DISABLED."); +#if defined(WOLFSSL_ESP32WROOM32_CRYPT) + ESP_LOGI(TAG, "ESP32WROOM32_CRYPT is enabled."); #else - #if defined(CONFIG_IDF_TARGET_ESP32C3) - #error "ESP32WROOM32_CRYPT not yet supported on ESP32-C3" - #elif defined(CONFIG_IDF_TARGET_ESP32S2) - #error "ESP32WROOM32_CRYPT not yet supported on ESP32-S2" - #elif defined(CONFIG_IDF_TARGET_ESP32S3) - #error "ESP32WROOM32_CRYPT not yet supported on ESP32-S3" - #else - ESP_LOGI(TAG, "ESP32WROOM32_CRYPT is enabled."); - #endif + ESP_LOGI(TAG, "WOLFSSL_ESP32WROOM32_CRYPT not defined! HW acceleration DISABLED."); #endif diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c index 01538f72e3..84ef729860 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c @@ -152,36 +152,37 @@ void app_main(void) /* some interesting settings are target specific (ESP32, -C3, -S3, etc */ -#if defined(CONFIG_IDF_TARGET_ESP32C3) - /* not available for C3 at this time */ +#if defined(CONFIG_IDF_TARGET_ESP32) + ESP_LOGI(TAG, "CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ = %u MHz", + CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ + ); + ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); +#elif defined(CONFIG_IDF_TARGET_ESP32S2) + ESP_LOGI(TAG, "CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ = %u MHz", + CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ + ); + ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); #elif defined(CONFIG_IDF_TARGET_ESP32S3) ESP_LOGI(TAG, "CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ = %u MHz", CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ ); ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); +#elif defined(CONFIG_IDF_TARGET_ESP32H2) + ESP_LOGI(TAG, "CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ = %u MHz", + CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ + ); #else - ESP_LOGI(TAG, "CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ - ); - ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); + /* No generic implementation yet */ #endif /* all platforms: stack high water mark check */ ESP_LOGI(TAG, "Stack HWM: %d\n", uxTaskGetStackHighWaterMark(NULL)); /* check to see if we are using hardware encryption */ -#if defined(NO_ESP32WROOM32_CRYPT) - ESP_LOGI(TAG, "NO_ESP32WROOM32_CRYPT defined! HW acceleration DISABLED."); +#if defined(WOLFSSL_ESP32WROOM32_CRYPT) + ESP_LOGI(TAG, "ESP32WROOM32_CRYPT is enabled."); #else - #if defined(CONFIG_IDF_TARGET_ESP32C3) - #error "ESP32WROOM32_CRYPT not yet supported on ESP32-C3" - #elif defined(CONFIG_IDF_TARGET_ESP32S2) - #error "ESP32WROOM32_CRYPT not yet supported on ESP32-S2" - #elif defined(CONFIG_IDF_TARGET_ESP32S3) - #error "ESP32WROOM32_CRYPT not yet supported on ESP32-S3" - #else - ESP_LOGI(TAG, "ESP32WROOM32_CRYPT is enabled."); - #endif + ESP_LOGI(TAG, "WOLFSSL_ESP32WROOM32_CRYPT not defined! HW acceleration DISABLED."); #endif From 09de0c0361f62afb5d5a91a518bc3d1f7e9b5b97 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?P=C3=81LFFY=20D=C3=A1niel?= Date: Fri, 31 Mar 2023 21:43:52 +0200 Subject: [PATCH 3/9] also exclude ssl_bn.c in esp-idf component CMakeLists.txts --- .../examples/wolfssl_benchmark/components/wolfssl/CMakeLists.txt | 1 + .../examples/wolfssl_client/components/wolfssl/CMakeLists.txt | 1 + .../examples/wolfssl_server/components/wolfssl/CMakeLists.txt | 1 + .../examples/wolfssl_test/components/wolfssl/CMakeLists.txt | 1 + IDE/Espressif/ESP-IDF/libs/CMakeLists.txt | 1 + 5 files changed, 5 insertions(+) diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_benchmark/components/wolfssl/CMakeLists.txt b/IDE/Espressif/ESP-IDF/examples/wolfssl_benchmark/components/wolfssl/CMakeLists.txt index 2423b802c1..884c97f155 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_benchmark/components/wolfssl/CMakeLists.txt +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_benchmark/components/wolfssl/CMakeLists.txt @@ -190,6 +190,7 @@ set(COMPONENT_SRCEXCLUDE "${WOLFSSL_ROOT}/src/conf.c" "${WOLFSSL_ROOT}/src/misc.c" "${WOLFSSL_ROOT}/src/pk.c" + "${WOLFSSL_ROOT}/src/ssl_bn.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_misc.c" # included by ssl.c "${WOLFSSL_ROOT}/src/x509.c" "${WOLFSSL_ROOT}/src/x509_str.c" diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_client/components/wolfssl/CMakeLists.txt b/IDE/Espressif/ESP-IDF/examples/wolfssl_client/components/wolfssl/CMakeLists.txt index 2423b802c1..884c97f155 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_client/components/wolfssl/CMakeLists.txt +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_client/components/wolfssl/CMakeLists.txt @@ -190,6 +190,7 @@ set(COMPONENT_SRCEXCLUDE "${WOLFSSL_ROOT}/src/conf.c" "${WOLFSSL_ROOT}/src/misc.c" "${WOLFSSL_ROOT}/src/pk.c" + "${WOLFSSL_ROOT}/src/ssl_bn.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_misc.c" # included by ssl.c "${WOLFSSL_ROOT}/src/x509.c" "${WOLFSSL_ROOT}/src/x509_str.c" diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_server/components/wolfssl/CMakeLists.txt b/IDE/Espressif/ESP-IDF/examples/wolfssl_server/components/wolfssl/CMakeLists.txt index 2423b802c1..884c97f155 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_server/components/wolfssl/CMakeLists.txt +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_server/components/wolfssl/CMakeLists.txt @@ -190,6 +190,7 @@ set(COMPONENT_SRCEXCLUDE "${WOLFSSL_ROOT}/src/conf.c" "${WOLFSSL_ROOT}/src/misc.c" "${WOLFSSL_ROOT}/src/pk.c" + "${WOLFSSL_ROOT}/src/ssl_bn.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_misc.c" # included by ssl.c "${WOLFSSL_ROOT}/src/x509.c" "${WOLFSSL_ROOT}/src/x509_str.c" diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/components/wolfssl/CMakeLists.txt b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/components/wolfssl/CMakeLists.txt index 2423b802c1..884c97f155 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/components/wolfssl/CMakeLists.txt +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/components/wolfssl/CMakeLists.txt @@ -190,6 +190,7 @@ set(COMPONENT_SRCEXCLUDE "${WOLFSSL_ROOT}/src/conf.c" "${WOLFSSL_ROOT}/src/misc.c" "${WOLFSSL_ROOT}/src/pk.c" + "${WOLFSSL_ROOT}/src/ssl_bn.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_misc.c" # included by ssl.c "${WOLFSSL_ROOT}/src/x509.c" "${WOLFSSL_ROOT}/src/x509_str.c" diff --git a/IDE/Espressif/ESP-IDF/libs/CMakeLists.txt b/IDE/Espressif/ESP-IDF/libs/CMakeLists.txt index 4f0f4e8aeb..5afd21a0df 100644 --- a/IDE/Espressif/ESP-IDF/libs/CMakeLists.txt +++ b/IDE/Espressif/ESP-IDF/libs/CMakeLists.txt @@ -71,6 +71,7 @@ set(COMPONENT_SRCEXCLUDE "./src/conf.c" "./src/misc.c" "./src/pk.c" + "./src/ssl_bn.c" # included by ssl.c "./src/ssl_misc.c" # included by ssl.c "./src/x509.c" "./src/x509_str.c" From 73edfc92beb82a90cdcdaf0959df2459f4c850a6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?P=C3=81LFFY=20D=C3=A1niel?= Date: Fri, 31 Mar 2023 22:25:15 +0200 Subject: [PATCH 4/9] also exclude ssl_asn1.c in esp-idf component CMakeLists.txts --- .../examples/wolfssl_benchmark/components/wolfssl/CMakeLists.txt | 1 + .../examples/wolfssl_client/components/wolfssl/CMakeLists.txt | 1 + .../examples/wolfssl_server/components/wolfssl/CMakeLists.txt | 1 + .../examples/wolfssl_test/components/wolfssl/CMakeLists.txt | 1 + IDE/Espressif/ESP-IDF/libs/CMakeLists.txt | 1 + 5 files changed, 5 insertions(+) diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_benchmark/components/wolfssl/CMakeLists.txt b/IDE/Espressif/ESP-IDF/examples/wolfssl_benchmark/components/wolfssl/CMakeLists.txt index 884c97f155..a916facabd 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_benchmark/components/wolfssl/CMakeLists.txt +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_benchmark/components/wolfssl/CMakeLists.txt @@ -190,6 +190,7 @@ set(COMPONENT_SRCEXCLUDE "${WOLFSSL_ROOT}/src/conf.c" "${WOLFSSL_ROOT}/src/misc.c" "${WOLFSSL_ROOT}/src/pk.c" + "${WOLFSSL_ROOT}/src/ssl_asn1.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_bn.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_misc.c" # included by ssl.c "${WOLFSSL_ROOT}/src/x509.c" diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_client/components/wolfssl/CMakeLists.txt b/IDE/Espressif/ESP-IDF/examples/wolfssl_client/components/wolfssl/CMakeLists.txt index 884c97f155..a916facabd 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_client/components/wolfssl/CMakeLists.txt +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_client/components/wolfssl/CMakeLists.txt @@ -190,6 +190,7 @@ set(COMPONENT_SRCEXCLUDE "${WOLFSSL_ROOT}/src/conf.c" "${WOLFSSL_ROOT}/src/misc.c" "${WOLFSSL_ROOT}/src/pk.c" + "${WOLFSSL_ROOT}/src/ssl_asn1.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_bn.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_misc.c" # included by ssl.c "${WOLFSSL_ROOT}/src/x509.c" diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_server/components/wolfssl/CMakeLists.txt b/IDE/Espressif/ESP-IDF/examples/wolfssl_server/components/wolfssl/CMakeLists.txt index 884c97f155..a916facabd 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_server/components/wolfssl/CMakeLists.txt +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_server/components/wolfssl/CMakeLists.txt @@ -190,6 +190,7 @@ set(COMPONENT_SRCEXCLUDE "${WOLFSSL_ROOT}/src/conf.c" "${WOLFSSL_ROOT}/src/misc.c" "${WOLFSSL_ROOT}/src/pk.c" + "${WOLFSSL_ROOT}/src/ssl_asn1.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_bn.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_misc.c" # included by ssl.c "${WOLFSSL_ROOT}/src/x509.c" diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/components/wolfssl/CMakeLists.txt b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/components/wolfssl/CMakeLists.txt index 884c97f155..a916facabd 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/components/wolfssl/CMakeLists.txt +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/components/wolfssl/CMakeLists.txt @@ -190,6 +190,7 @@ set(COMPONENT_SRCEXCLUDE "${WOLFSSL_ROOT}/src/conf.c" "${WOLFSSL_ROOT}/src/misc.c" "${WOLFSSL_ROOT}/src/pk.c" + "${WOLFSSL_ROOT}/src/ssl_asn1.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_bn.c" # included by ssl.c "${WOLFSSL_ROOT}/src/ssl_misc.c" # included by ssl.c "${WOLFSSL_ROOT}/src/x509.c" diff --git a/IDE/Espressif/ESP-IDF/libs/CMakeLists.txt b/IDE/Espressif/ESP-IDF/libs/CMakeLists.txt index 5afd21a0df..0f442dfcae 100644 --- a/IDE/Espressif/ESP-IDF/libs/CMakeLists.txt +++ b/IDE/Espressif/ESP-IDF/libs/CMakeLists.txt @@ -71,6 +71,7 @@ set(COMPONENT_SRCEXCLUDE "./src/conf.c" "./src/misc.c" "./src/pk.c" + "./src/ssl_asn1.c" # included by ssl.c "./src/ssl_bn.c" # included by ssl.c "./src/ssl_misc.c" # included by ssl.c "./src/x509.c" From 2af15f0614029fda1c98d730cfadb7b2131649e4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?P=C3=81LFFY=20D=C3=A1niel?= Date: Fri, 31 Mar 2023 22:46:36 +0200 Subject: [PATCH 5/9] fix wolfcrypt/benchmark/benchmark.c for esp-idf v5 --- wolfcrypt/benchmark/benchmark.c | 37 ++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 17 deletions(-) diff --git a/wolfcrypt/benchmark/benchmark.c b/wolfcrypt/benchmark/benchmark.c index 6515f54363..ac95752351 100644 --- a/wolfcrypt/benchmark/benchmark.c +++ b/wolfcrypt/benchmark/benchmark.c @@ -67,11 +67,14 @@ #ifdef WOLFSSL_ESPIDF #include - #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 3, 0) + #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0) + #include + #elif ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 3, 0) #include + #define esp_cpu_get_cycle_count() cpu_hal_get_cycle_count() #else #include - #define cpu_hal_get_cycle_count() xthal_get_ccount() + #define esp_cpu_get_cycle_count() xthal_get_ccount() #endif #include @@ -971,10 +974,10 @@ static const char* bench_desc_words[][15] = { static THREAD_LS_T word64 total_cycles; /* the return value */ - static THREAD_LS_T word64 _cpu_hal_get_cycle_count_ex = 0; + static THREAD_LS_T word64 _esp_cpu_get_cycle_count_ex = 0; /* the last value seen, adjusted for an overflow */ - static THREAD_LS_T word64 _cpu_hal_get_cycle_count_last = 0; + static THREAD_LS_T word64 _esp_cpu_get_cycle_count_last = 0; /* TAG for ESP_LOGx() */ static const char* TAG = "wolfssl_benchmark"; @@ -983,7 +986,7 @@ static const char* bench_desc_words[][15] = { #define INIT_CYCLE_COUNTER static WC_INLINE word64 get_esp_cpu_cycles(void); - /* WARNING the hal UINT cpu_hal_get_cycle_count() quietly rolls over. */ + /* WARNING the hal UINT esp_cpu_get_cycle_count() quietly rolls over. */ #define BEGIN_ESP_CYCLES begin_cycles = (get_esp_cpu_cycles()); /* since it rolls over, we have something that will tolerate one */ @@ -1004,23 +1007,23 @@ static const char* bench_desc_words[][15] = { (void)XSNPRINTF(b + XSTRLEN(b), n - XSTRLEN(b), "%.6f,\n", \ (float)total_cycles / (count*s)) - /* cpu_hal_get_cycle_count_ex() is a single-overflow-tolerant extension to - ** the Espressif `unsigned cpu_hal_get_cycle_count()` which is known to + /* esp_cpu_get_cycle_count_ex() is a single-overflow-tolerant extension to + ** the Espressif `unsigned esp_cpu_get_cycle_count()` which is known to ** overflow at least once during full benchmark tests. */ - word64 cpu_hal_get_cycle_count_ex() + word64 esp_cpu_get_cycle_count_ex() { /* reminder: unsigned long long max = 18,446,744,073,709,551,615 */ /* the currently observed clock counter value */ - word64 thisVal = cpu_hal_get_cycle_count(); + word64 thisVal = esp_cpu_get_cycle_count(); /* if the current value is less than the previous value, ** we likely overflowed at least once. */ - if (thisVal < _cpu_hal_get_cycle_count_last) + if (thisVal < _esp_cpu_get_cycle_count_last) { - /* Warning: we assume the return type of cpu_hal_get_cycle_count() + /* Warning: we assume the return type of esp_cpu_get_cycle_count() ** will always be unsigned int to add UINT_MAX. ** ** NOTE for long duration between calls with multiple overflows: @@ -1029,21 +1032,21 @@ static const char* bench_desc_words[][15] = { ** ** At this time no single test overflows. This is currently only a ** concern for cumulative counts over multiple tests. As long - ** as well call cpu_hal_get_cycle_count_ex() with no more than one + ** as well call esp_cpu_get_cycle_count_ex() with no more than one ** overflow CPU tick count, all will be well. */ - ESP_LOGV(TAG, "Alert: Detected cpu_hal_get_cyclecount overflow, " + ESP_LOGV(TAG, "Alert: Detected esp_cpu_get_cycle_count overflow, " "adding %ull", UINT_MAX); thisVal += (word64)UINT_MAX; } /* adjust our actual returned value that takes into account overflow */ - _cpu_hal_get_cycle_count_ex += (thisVal - _cpu_hal_get_cycle_count_last); + _esp_cpu_get_cycle_count_ex += (thisVal - _esp_cpu_get_cycle_count_last); /* all of this took some time, so reset the "last seen" value */ - _cpu_hal_get_cycle_count_last = cpu_hal_get_cycle_count(); + _esp_cpu_get_cycle_count_last = esp_cpu_get_cycle_count(); - return _cpu_hal_get_cycle_count_ex; + return _esp_cpu_get_cycle_count_ex; } /* implement other architecture cycle counters here */ @@ -8896,7 +8899,7 @@ void bench_sphincsKeySign(byte level, byte optim) #if defined(WOLFSSL_ESPIDF) static WC_INLINE word64 get_esp_cpu_cycles(void) { - return cpu_hal_get_cycle_count_ex(); + return esp_cpu_get_cycle_count_ex(); } /* implement other architectures here */ From 80b1b82da1f56a72997fae49c26065649624a8e9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?P=C3=81LFFY=20D=C3=A1niel?= Date: Mon, 3 Apr 2023 22:04:54 +0200 Subject: [PATCH 6/9] add generic frequency reporting to wolfssl_test on esp platforms --- .../ESP-IDF/examples/wolfssl_test/main/main.c | 46 +++++++++++-------- .../examples/wolfssl_test_idf/main/main.c | 46 +++++++++++-------- 2 files changed, 54 insertions(+), 38 deletions(-) diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c index 84ef729860..42e19b5d7a 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c @@ -152,27 +152,35 @@ void app_main(void) /* some interesting settings are target specific (ESP32, -C3, -S3, etc */ -#if defined(CONFIG_IDF_TARGET_ESP32) - ESP_LOGI(TAG, "CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ +#include +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0) + #define CONFIG_IDF_TARGET_NAME ESP +#else + #if defined(CONFIG_IDF_TARGET_ESP32) + #define CONFIG_IDF_TARGET_NAME ESP32 + #elif defined(CONFIG_IDF_TARGET_ESP32S2) + #define CONFIG_IDF_TARGET_NAME ESP32S2 + #elif defined(CONFIG_IDF_TARGET_ESP32S3) + #define CONFIG_IDF_TARGET_NAME ESP32S3 + #elif defined(CONFIG_IDF_TARGET_ESP32H2) + #define CONFIG_IDF_TARGET_NAME ESP32H2 + #elif defined(CONFIG_IDF_TARGET_ESP32C3) + #define CONFIG_IDF_TARGET_NAME ESP32C3 + #else + #error CONFIG_IDF_TARGET " not supported" + #endif +#endif + +#define LOG_TARGET_FREQ_INT(target) \ + ESP_LOGI(TAG, "CONFIG_" #target "_DEFAULT_CPU_FREQ_MHZ = %u MHz", \ + CONFIG_##target##_DEFAULT_CPU_FREQ_MHZ \ ); +#define LOG_TARGET_FREQ(target) LOG_TARGET_FREQ_INT(target) + + LOG_TARGET_FREQ(CONFIG_IDF_TARGET_NAME); + +#if defined(CONFIG_IDF_TARGET_ARCH_XTENSA) ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); -#elif defined(CONFIG_IDF_TARGET_ESP32S2) - ESP_LOGI(TAG, "CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ - ); - ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); -#elif defined(CONFIG_IDF_TARGET_ESP32S3) - ESP_LOGI(TAG, "CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ - ); - ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); -#elif defined(CONFIG_IDF_TARGET_ESP32H2) - ESP_LOGI(TAG, "CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ - ); -#else - /* No generic implementation yet */ #endif /* all platforms: stack high water mark check */ diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c index 84ef729860..42e19b5d7a 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c @@ -152,27 +152,35 @@ void app_main(void) /* some interesting settings are target specific (ESP32, -C3, -S3, etc */ -#if defined(CONFIG_IDF_TARGET_ESP32) - ESP_LOGI(TAG, "CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ +#include +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0) + #define CONFIG_IDF_TARGET_NAME ESP +#else + #if defined(CONFIG_IDF_TARGET_ESP32) + #define CONFIG_IDF_TARGET_NAME ESP32 + #elif defined(CONFIG_IDF_TARGET_ESP32S2) + #define CONFIG_IDF_TARGET_NAME ESP32S2 + #elif defined(CONFIG_IDF_TARGET_ESP32S3) + #define CONFIG_IDF_TARGET_NAME ESP32S3 + #elif defined(CONFIG_IDF_TARGET_ESP32H2) + #define CONFIG_IDF_TARGET_NAME ESP32H2 + #elif defined(CONFIG_IDF_TARGET_ESP32C3) + #define CONFIG_IDF_TARGET_NAME ESP32C3 + #else + #error CONFIG_IDF_TARGET " not supported" + #endif +#endif + +#define LOG_TARGET_FREQ_INT(target) \ + ESP_LOGI(TAG, "CONFIG_" #target "_DEFAULT_CPU_FREQ_MHZ = %u MHz", \ + CONFIG_##target##_DEFAULT_CPU_FREQ_MHZ \ ); +#define LOG_TARGET_FREQ(target) LOG_TARGET_FREQ_INT(target) + + LOG_TARGET_FREQ(CONFIG_IDF_TARGET_NAME); + +#if defined(CONFIG_IDF_TARGET_ARCH_XTENSA) ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); -#elif defined(CONFIG_IDF_TARGET_ESP32S2) - ESP_LOGI(TAG, "CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ - ); - ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); -#elif defined(CONFIG_IDF_TARGET_ESP32S3) - ESP_LOGI(TAG, "CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ - ); - ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); -#elif defined(CONFIG_IDF_TARGET_ESP32H2) - ESP_LOGI(TAG, "CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32H2_DEFAULT_CPU_FREQ_MHZ - ); -#else - /* No generic implementation yet */ #endif /* all platforms: stack high water mark check */ From 969ee0b044b651f276f20117a0b73e5d03040ee2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?P=C3=81LFFY=20D=C3=A1niel?= Date: Tue, 4 Apr 2023 14:13:49 +0200 Subject: [PATCH 7/9] wolfcrypt/src/random.c: spaces instead of tabs --- wolfcrypt/src/random.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/wolfcrypt/src/random.c b/wolfcrypt/src/random.c index 547274a1e5..9f7081c4c0 100644 --- a/wolfcrypt/src/random.c +++ b/wolfcrypt/src/random.c @@ -3393,26 +3393,26 @@ int wc_GenerateSeed(OS_Seed* os, byte* output, word32 sz) /* Espressif */ #include #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0) - #include + #include #else - #include + #include #endif int wc_GenerateSeed(OS_Seed* os, byte* output, word32 sz) { - word32 rand; - while (sz > 0) { - word32 len = sizeof(rand); - if (sz < len) - len = sz; - /* Get one random 32-bit word from hw RNG */ - rand = esp_random( ); - XMEMCPY(output, &rand, len); - output += len; - sz -= len; - } - - return 0; + word32 rand; + while (sz > 0) { + word32 len = sizeof(rand); + if (sz < len) + len = sz; + /* Get one random 32-bit word from hw RNG */ + rand = esp_random( ); + XMEMCPY(output, &rand, len); + output += len; + sz -= len; + } + + return 0; } #elif defined(WOLFSSL_LINUXKM) From fabb44f8e968fdaa8bafa36635ee464c178e7eba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?P=C3=81LFFY=20D=C3=A1niel?= Date: Tue, 4 Apr 2023 23:11:55 +0200 Subject: [PATCH 8/9] clean up ESP32 hw crypto related defines - remove WROOM32 from all defines except WROOM32SE-related ones, those are not WROOM32-related, they refer to the built-in crypto accelerator of the ESP32. - enable hw crypto automatically on ESP32 based on CONFIG_IDF_TARGET_ESP32 - disable switches: - NO_ESP32_CRYPT - NO_WOLFSSL_ESP32_CRYPT_RSA_PRI - NO_WOLFSSL_ESP32_CRYPT_HASH - NO_WOLFSSL_ESP32_CRYPT_AES - set enable switches based on the above in settings.h and use those only: - WOLFSSL_ESP32_CRYPT_RSA_PRI - WOLFSSL_ESP32_CRYPT_HASH - WOLFSSL_ESP32_CRYPT_AES - rename WOLFSSL_ESP32WROOM32_CRYPT_DEBUG to WOLFSSL_ESP32_CRYPT_DEBUG - some other minor cleanups --- IDE/Espressif/ESP-IDF/README_32se.md | 7 +-- .../ESP-IDF/examples/wolfssl_test/main/main.c | 6 +- .../examples/wolfssl_test_idf/main/main.c | 6 +- .../wolfssl_test_idf/main/main_wip.c.ex | 49 +++++++++------- IDE/Espressif/ESP-IDF/test/component.mk | 2 +- IDE/Espressif/ESP-IDF/user_settings.h | 25 ++++---- wolfcrypt/src/aes.c | 15 ++--- wolfcrypt/src/port/Espressif/README.md | 15 ++--- wolfcrypt/src/port/Espressif/esp32_aes.c | 5 +- wolfcrypt/src/port/Espressif/esp32_mp.c | 8 +-- wolfcrypt/src/port/Espressif/esp32_sha.c | 7 +-- wolfcrypt/src/port/Espressif/esp32_util.c | 6 +- wolfcrypt/src/sha.c | 27 +++------ wolfcrypt/src/sha256.c | 36 ++++-------- wolfcrypt/src/sha512.c | 57 +++++++------------ wolfcrypt/src/tfm.c | 24 +++----- wolfssl/openssl/sha.h | 3 +- .../wolfcrypt/port/Espressif/esp32-crypt.h | 8 +-- wolfssl/wolfcrypt/settings.h | 19 ++++--- wolfssl/wolfcrypt/sha.h | 5 +- wolfssl/wolfcrypt/sha256.h | 5 +- wolfssl/wolfcrypt/sha512.h | 5 +- 22 files changed, 141 insertions(+), 199 deletions(-) diff --git a/IDE/Espressif/ESP-IDF/README_32se.md b/IDE/Espressif/ESP-IDF/README_32se.md index cb5171fcca..3dfb13d9c1 100644 --- a/IDE/Espressif/ESP-IDF/README_32se.md +++ b/IDE/Espressif/ESP-IDF/README_32se.md @@ -15,11 +15,10 @@ Including the following examples: 2. Microchip CryptoAuthentication Library: https://github.com/MicrochipTech/cryptoauthlib ## Setup -1. Comment out `#define WOLFSSL_ESPWROOM32` in `/path/to/wolfssl/IDE/Espressif/ESP-IDF/user_settings.h`\ - Uncomment out `#define WOLFSSL_ESPWROOM32SE` in `/path/to/wolfssl/IDE/Espressif/ESP-IDF/user_settings.h` +1. Uncomment out `#define WOLFSSL_ESPWROOM32SE` in `/path/to/wolfssl/IDE/Espressif/ESP-IDF/user_settings.h` * **Note:** crypt test will fail if enabled `WOLFSSL_ESPWROOM32SE` -3. wolfSSL under ESP-IDF. Please see [README.md](https://github.com/wolfSSL/wolfssl/blob/master/IDE/Espressif/ESP-IDF/README.md) -4. CryptoAuthentication Library under ESP-IDF. Please see [README.md](https://github.com/miyazakh/cryptoauthlib_esp_idf/blob/master/README.md) +2. wolfSSL under ESP-IDF. Please see [README.md](https://github.com/wolfSSL/wolfssl/blob/master/IDE/Espressif/ESP-IDF/README.md) +3. CryptoAuthentication Library under ESP-IDF. Please see [README.md](https://github.com/miyazakh/cryptoauthlib_esp_idf/blob/master/README.md) ## Configuration 1. The `user_settings.h` can be found in `/path/to/esp-idf/components/wolfssl/include/user_settings.h` diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c index 42e19b5d7a..60b1d1f811 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c @@ -187,10 +187,10 @@ void app_main(void) ESP_LOGI(TAG, "Stack HWM: %d\n", uxTaskGetStackHighWaterMark(NULL)); /* check to see if we are using hardware encryption */ -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) - ESP_LOGI(TAG, "ESP32WROOM32_CRYPT is enabled."); +#if defined(WOLFSSL_ESP32_CRYPT) + ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT is enabled."); #else - ESP_LOGI(TAG, "WOLFSSL_ESP32WROOM32_CRYPT not defined! HW acceleration DISABLED."); + ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT not defined! HW acceleration DISABLED."); #endif diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c index 42e19b5d7a..60b1d1f811 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c @@ -187,10 +187,10 @@ void app_main(void) ESP_LOGI(TAG, "Stack HWM: %d\n", uxTaskGetStackHighWaterMark(NULL)); /* check to see if we are using hardware encryption */ -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) - ESP_LOGI(TAG, "ESP32WROOM32_CRYPT is enabled."); +#if defined(WOLFSSL_ESP32_CRYPT) + ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT is enabled."); #else - ESP_LOGI(TAG, "WOLFSSL_ESP32WROOM32_CRYPT not defined! HW acceleration DISABLED."); + ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT not defined! HW acceleration DISABLED."); #endif diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main_wip.c.ex b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main_wip.c.ex index b301e65201..1fe072d38f 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main_wip.c.ex +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main_wip.c.ex @@ -196,17 +196,34 @@ void app_main(void) /* some interesting settings are target specific (ESP32, -C3, -S3, etc */ -#if defined(CONFIG_IDF_TARGET_ESP32C3) - /* not available for C3 at this time */ -#elif defined(CONFIG_IDF_TARGET_ESP32S3) - ESP_LOGI(TAG, "CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ - ); - ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); +#include +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0) + #define CONFIG_IDF_TARGET_NAME ESP #else - ESP_LOGI(TAG, "CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ = %u MHz", - CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ + #if defined(CONFIG_IDF_TARGET_ESP32) + #define CONFIG_IDF_TARGET_NAME ESP32 + #elif defined(CONFIG_IDF_TARGET_ESP32S2) + #define CONFIG_IDF_TARGET_NAME ESP32S2 + #elif defined(CONFIG_IDF_TARGET_ESP32S3) + #define CONFIG_IDF_TARGET_NAME ESP32S3 + #elif defined(CONFIG_IDF_TARGET_ESP32H2) + #define CONFIG_IDF_TARGET_NAME ESP32H2 + #elif defined(CONFIG_IDF_TARGET_ESP32C3) + #define CONFIG_IDF_TARGET_NAME ESP32C3 + #else + #error CONFIG_IDF_TARGET " not supported" + #endif +#endif + +#define LOG_TARGET_FREQ_INT(target) \ + ESP_LOGI(TAG, "CONFIG_" #target "_DEFAULT_CPU_FREQ_MHZ = %u MHz", \ + CONFIG_##target##_DEFAULT_CPU_FREQ_MHZ \ ); +#define LOG_TARGET_FREQ(target) LOG_TARGET_FREQ_INT(target) + + LOG_TARGET_FREQ(CONFIG_IDF_TARGET_NAME); + +#if defined(CONFIG_IDF_TARGET_ARCH_XTENSA) ESP_LOGI(TAG, "Xthal_have_ccount = %u", Xthal_have_ccount); #endif @@ -214,18 +231,10 @@ void app_main(void) ESP_LOGI(TAG, "Stack HWM: %d\n", uxTaskGetStackHighWaterMark(NULL)); /* check to see if we are using hardware encryption */ -#if defined(NO_ESP32WROOM32_CRYPT) - ESP_LOGI(TAG, "NO_ESP32WROOM32_CRYPT defined! HW acceleration DISABLED."); +#if defined(WOLFSSL_ESP32_CRYPT) + ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT is enabled."); #else - #if defined(CONFIG_IDF_TARGET_ESP32C3) - #error "ESP32WROOM32_CRYPT not yet supported on ESP32-C3" - #elif defined(CONFIG_IDF_TARGET_ESP32S2) - #error "ESP32WROOM32_CRYPT not yet supported on ESP32-S2" - #elif defined(CONFIG_IDF_TARGET_ESP32S3) - #error "ESP32WROOM32_CRYPT not yet supported on ESP32-S3" - #else - ESP_LOGI(TAG, "ESP32WROOM32_CRYPT is enabled."); - #endif + ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT not defined! HW acceleration DISABLED."); #endif diff --git a/IDE/Espressif/ESP-IDF/test/component.mk b/IDE/Espressif/ESP-IDF/test/component.mk index fb008779b7..d3e01e5b07 100644 --- a/IDE/Espressif/ESP-IDF/test/component.mk +++ b/IDE/Espressif/ESP-IDF/test/component.mk @@ -5,6 +5,6 @@ #CFLAGS := -v CFLAGS += -DNO_MAIN_DRIVER CFLAGS += -DWOLFSSL_USER_SETTINGS -#CFLAGS += -DWOLFSSL_ESP32WROOM32_CRYPT_DEBUG +#CFLAGS += -DWOLFSSL_ESP32_CRYPT_DEBUG COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive diff --git a/IDE/Espressif/ESP-IDF/user_settings.h b/IDE/Espressif/ESP-IDF/user_settings.h index aa0dadbe52..eefe6c7996 100644 --- a/IDE/Espressif/ESP-IDF/user_settings.h +++ b/IDE/Espressif/ESP-IDF/user_settings.h @@ -19,20 +19,22 @@ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA */ #undef WOLFSSL_ESPIDF -#undef WOLFSSL_ESPWROOM32 #undef WOLFSSL_ESPWROOM32SE #define WOLFSSL_ESPIDF /* - * choose ONE of these Espressif chips to define for HW acceleration or - * leave all undefined for a non-accelerated build for other chips: + * Define WOLFSSL_ESPWROOM32SE to enable additional support for the external + * ATECC608A on the ESP32-WROOM32SE * - * WOLFSSL_ESPWROOM32 - * WOLFSSL_ESPWROOM32SE + * #define WOLFSSL_ESPWROOM32SE */ -/* #define WOLFSSL_ESPWROOM32 */ +/* when you want not to use HW acceleration */ +/* #define NO_ESP32_CRYPT */ +/* #define NO_WOLFSSL_ESP32_CRYPT_HASH*/ +/* #define NO_WOLFSSL_ESP32_CRYPT_AES */ +/* #define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI */ /* #define DEBUG_WOLFSSL_VERBOSE */ @@ -84,7 +86,8 @@ #endif /* rsa primitive specific definition */ -#if defined(WOLFSSL_ESPWROOM32) || defined(WOLFSSL_ESPWROOM32SE) +#if defined(CONFIG_IDF_TARGET_ESP32) && \ + !defined(NO_WOLFSSL_ESP32_CRYPT_RSA_PRI) /* Define USE_FAST_MATH and SMALL_STACK */ #define ESP32_USE_RSA_PRIMITIVE /* threshold for performance adjustment for hw primitive use */ @@ -96,7 +99,7 @@ /* debug options */ /* #define DEBUG_WOLFSSL */ -/* #define WOLFSSL_ESP32WROOM32_CRYPT_DEBUG */ +/* #define WOLFSSL_ESP32_CRYPT_DEBUG */ /* #define WOLFSSL_ATECC508A_DEBUG */ /* date/time */ @@ -105,11 +108,5 @@ /* #define NO_ASN_TIME */ /* #define XTIME time */ -/* when you want not to use HW acceleration */ -/* #define NO_ESP32WROOM32_CRYPT */ -/* #define NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH*/ -/* #define NO_WOLFSSL_ESP32WROOM32_CRYPT_AES */ -/* #define NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI */ - /* adjust wait-timeout count if you see timeout in rsa hw acceleration */ #define ESP_RSA_TIMEOUT_CNT 0x249F00 diff --git a/wolfcrypt/src/aes.c b/wolfcrypt/src/aes.c index 042331ad42..bc743b5bf8 100644 --- a/wolfcrypt/src/aes.c +++ b/wolfcrypt/src/aes.c @@ -674,8 +674,7 @@ block cipher mechanism that uses n-bit binary string parameter key with 128-bits #error nRF51 AES Hardware does not support decrypt #endif /* HAVE_AES_DECRYPT */ -#elif defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_AES) +#elif defined(WOLFSSL_ESP32_CRYPT_AES) #include "wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h" @@ -2663,8 +2662,7 @@ static WARN_UNUSED_RESULT int wc_AesDecrypt( { return wc_AesSetKey(aes, userKey, keylen, iv, dir); } -#elif defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_AES) +#elif defined(WOLFSSL_ESP32_CRYPT_AES) int wc_AesSetKey(Aes* aes, const byte* userKey, word32 keylen, const byte* iv, int dir) @@ -2950,8 +2948,7 @@ static WARN_UNUSED_RESULT int wc_AesDecrypt( rk = aes->key; XMEMCPY(rk, userKey, keylen); #if defined(LITTLE_ENDIAN_ORDER) && !defined(WOLFSSL_PIC32MZ_CRYPT) && \ - (!defined(WOLFSSL_ESP32WROOM32_CRYPT) || \ - defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_AES)) + !defined(WOLFSSL_ESP32_CRYPT_AES) ByteReverseWords(rk, rk, keylen); #endif @@ -3926,8 +3923,7 @@ int wc_AesSetIV(Aes* aes, const byte* iv) return ret; } #endif /* HAVE_AES_DECRYPT */ -#elif defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_AES) +#elif defined(WOLFSSL_ESP32_CRYPT_AES) int wc_AesCbcEncrypt(Aes* aes, byte* out, const byte* in, word32 sz) { @@ -4408,8 +4404,7 @@ int wc_AesSetIV(Aes* aes, const byte* iv) #elif defined(WOLFSSL_DEVCRYPTO_AES) /* implemented in wolfcrypt/src/port/devcrypt/devcrypto_aes.c */ - #elif defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_AES) + #elif defined(WOLFSSL_ESP32_CRYPT_AES) /* esp32 doesn't support CRT mode by hw. */ /* use aes ecnryption plus sw implementation */ #define NEED_AES_CTR_SOFT diff --git a/wolfcrypt/src/port/Espressif/README.md b/wolfcrypt/src/port/Espressif/README.md index fe98e3be65..069860b67d 100644 --- a/wolfcrypt/src/port/Espressif/README.md +++ b/wolfcrypt/src/port/Espressif/README.md @@ -1,6 +1,6 @@ # ESP32 Port -Support for the ESP32-WROOM-32 on-board crypto hardware acceleration for symmetric AES, SHA1/SHA256/SHA384/SHA512 and RSA primitive including mul, mulmod and exptmod. +Support for the ESP32 on-board crypto hardware acceleration for symmetric AES, SHA1/SHA256/SHA384/SHA512 and RSA primitive including mul, mulmod and exptmod. ## ESP32 Acceleration @@ -8,22 +8,19 @@ For detail about ESP32 HW Acceleration, you can find in [Technical Reference Man ### Building -To enable hw acceleration : - -* Uncomment out `#define WOLFSSL_ESPIDF` in `/path/to/wolfssl/wolfssl/wolfcrypt/settings.h` -* Uncomment out `#define WOLFSSL_ESPWROOM32` in `/path/to/wolfssl/wolfssl/wolfcrypt/settings.h` +HW acceleration is enabled by default on the ESP32 platform To disable portions of the hardware acceleration you can optionally define: ```c /* Disabled SHA, AES and RSA acceleration */ -#define NO_ESP32WROOM32_CRYPT +#define NO_ESP32_CRYPT /* Disabled AES acceleration */ -#define NO_WOLFSSL_ESP32WROOM32_CRYPT_AES +#define NO_WOLFSSL_ESP32_CRYPT_AES /* Disabled SHA acceleration */ -#define NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH +#define NO_WOLFSSL_ESP32_CRYPT_HASH /* Disabled RSA Primitive acceleration */ -#define NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI +#define NO_WOLFSSL_ESP32_CRYPT_RSA_PRI ``` ### Coding diff --git a/wolfcrypt/src/port/Espressif/esp32_aes.c b/wolfcrypt/src/port/Espressif/esp32_aes.c index 0603f169e5..4ebb9e641d 100644 --- a/wolfcrypt/src/port/Espressif/esp32_aes.c +++ b/wolfcrypt/src/port/Espressif/esp32_aes.c @@ -33,8 +33,7 @@ #ifndef NO_AES -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_AES) +#if defined(WOLFSSL_ESP32_CRYPT_AES) #include #include "wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h" @@ -323,5 +322,5 @@ int wc_esp32AesCbcDecrypt(Aes* aes, byte* out, const byte* in, word32 sz) return 0; } -#endif /* WOLFSSL_ESP32WROOM32_CRYPT */ +#endif /* WOLFSSL_ESP32_CRYPT_AES */ #endif /* NO_AES */ diff --git a/wolfcrypt/src/port/Espressif/esp32_mp.c b/wolfcrypt/src/port/Espressif/esp32_mp.c index b4efe8cb21..c2c4bf3c3d 100644 --- a/wolfcrypt/src/port/Espressif/esp32_mp.c +++ b/wolfcrypt/src/port/Espressif/esp32_mp.c @@ -30,8 +30,9 @@ #if !defined(NO_RSA) || defined(HAVE_ECC) -#if defined(WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) +#if defined(WOLFSSL_ESP32_CRYPT_RSA_PRI) + +#include #ifdef NO_INLINE #include @@ -613,7 +614,6 @@ int esp_mp_exptmod(MATH_INT_T* X, MATH_INT_T* Y, word32 Ys, MATH_INT_T* M, MATH_ return ret; } -#endif /* WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) && - * !NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI */ +#endif /* WOLFSSL_ESP32_CRYPT_RSA_PRI */ #endif /* !NO_RSA || HAVE_ECC */ diff --git a/wolfcrypt/src/port/Espressif/esp32_sha.c b/wolfcrypt/src/port/Espressif/esp32_sha.c index 257a715287..ac4d917b8e 100644 --- a/wolfcrypt/src/port/Espressif/esp32_sha.c +++ b/wolfcrypt/src/port/Espressif/esp32_sha.c @@ -34,11 +34,10 @@ /* this entire file content is excluded if not using HW hash acceleration */ -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#ifdef WOLFSSL_ESP32_CRYPT_HASH /* TODO this may be chip type dependent: add support for others */ -#include /* ESP32-WROOM */ +#include /* ESP32 */ #include #include @@ -736,5 +735,5 @@ int esp_sha512_digest_process(struct wc_Sha512* sha, byte blockproc) return 0; } #endif /* WOLFSSL_SHA512 || WOLFSSL_SHA384 */ -#endif /* WOLFSSL_ESP32WROOM32_CRYPT */ +#endif /* WOLFSSL_ESP32_CRYPT_HASH */ #endif /* !defined(NO_SHA) ||... */ diff --git a/wolfcrypt/src/port/Espressif/esp32_util.c b/wolfcrypt/src/port/Espressif/esp32_util.c index 6f2ef11de7..c6f52e329b 100644 --- a/wolfcrypt/src/port/Espressif/esp32_util.c +++ b/wolfcrypt/src/port/Espressif/esp32_util.c @@ -20,7 +20,7 @@ */ #include -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ +#if defined(WOLFSSL_ESP32_CRYPT) && \ (!defined(NO_AES) || !defined(NO_SHA) || !defined(NO_SHA256) ||\ defined(WOLFSSL_SHA384) || defined(WOLFSSL_SHA512)) @@ -81,7 +81,7 @@ int esp_CryptHwMutexUnLock(wolfSSL_Mutex* mutex) { #endif -#ifdef WOLFSSL_ESP32WROOM32_CRYPT_DEBUG +#ifdef WOLFSSL_ESP32_CRYPT_DEBUG #include "esp_timer.h" #include "esp_log.h" @@ -100,4 +100,4 @@ uint64_t wc_esp32elapsedTime() return esp_timer_get_time() - startTime; } -#endif /*WOLFSSL_ESP32WROOM32_CRYPT_DEBUG */ +#endif /*WOLFSSL_ESP32_CRYPT_DEBUG */ diff --git a/wolfcrypt/src/sha.c b/wolfcrypt/src/sha.c index c7d02e10af..00b388e904 100644 --- a/wolfcrypt/src/sha.c +++ b/wolfcrypt/src/sha.c @@ -290,8 +290,7 @@ !defined(WOLFSSL_QNX_CAAM) /* wolfcrypt/src/port/caam/caam_sha.c */ -#elif defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#elif defined(WOLFSSL_ESP32_CRYPT_HASH) #include "wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h" @@ -542,8 +541,7 @@ int wc_InitSha_ex(wc_Sha* sha, void* heap, int devId) sha->devCtx = NULL; #endif -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) sha->ctx.mode = ESP32_SHA_INIT; sha->ctx.isfirstblock = 1; sha->ctx.lockDepth = 0; /* keep track of how many times lock is called */ @@ -621,8 +619,7 @@ int wc_ShaUpdate(wc_Sha* sha, const byte* data, word32 len) ByteReverseWords(sha->buffer, sha->buffer, WC_SHA_BLOCK_SIZE); #endif - #if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) + #if defined(WOLFSSL_ESP32_CRYPT_HASH) if (sha->ctx.mode == ESP32_SHA_INIT) { esp_sha_try_hw_lock(&sha->ctx); } @@ -676,8 +673,7 @@ int wc_ShaUpdate(wc_Sha* sha, const byte* data, word32 len) ByteReverseWords(local32, local32, WC_SHA_BLOCK_SIZE); #endif - #if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) + #if defined(WOLFSSL_ESP32_CRYPT_HASH) if (sha->ctx.mode == ESP32_SHA_INIT){ esp_sha_try_hw_lock(&sha->ctx); } @@ -760,8 +756,7 @@ int wc_ShaFinal(wc_Sha* sha, byte* hash) ByteReverseWords(sha->buffer, sha->buffer, WC_SHA_BLOCK_SIZE); #endif - #if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) + #if defined(WOLFSSL_ESP32_CRYPT_HASH) if (sha->ctx.mode == ESP32_SHA_INIT) { esp_sha_try_hw_lock(&sha->ctx); } @@ -801,8 +796,7 @@ int wc_ShaFinal(wc_Sha* sha, byte* hash) 2 * sizeof(word32)); #endif -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) if (sha->ctx.mode == ESP32_SHA_INIT) { esp_sha_try_hw_lock(&sha->ctx); } @@ -899,8 +893,7 @@ int wc_ShaGetHash(wc_Sha* sha, byte* hash) if (sha == NULL || hash == NULL) return BAD_FUNC_ARG; -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) if(sha->ctx.mode == ESP32_SHA_INIT){ esp_sha_try_hw_lock(&sha->ctx); } @@ -914,8 +907,7 @@ int wc_ShaGetHash(wc_Sha* sha, byte* hash) if (ret == 0) { /* if HW failed, use SW */ ret = wc_ShaFinal(&tmpSha, hash); -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) sha->ctx.mode = ESP32_SHA_SW; #endif @@ -947,8 +939,7 @@ int wc_ShaCopy(wc_Sha* src, wc_Sha* dst) #if defined(WOLFSSL_SE050) && defined(WOLFSSL_SE050_HASH) ret = se050_hash_copy(&src->se050Ctx, &dst->se050Ctx); #endif -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) dst->ctx.mode = src->ctx.mode; dst->ctx.isfirstblock = src->ctx.isfirstblock; dst->ctx.sha_type = src->ctx.sha_type; diff --git a/wolfcrypt/src/sha256.c b/wolfcrypt/src/sha256.c index b6805a9802..1725772bf4 100644 --- a/wolfcrypt/src/sha256.c +++ b/wolfcrypt/src/sha256.c @@ -88,22 +88,6 @@ on the specific device platform. #include #endif - -/* determine if we are using Espressif SHA hardware acceleration */ -#undef WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) - /* define a single keyword for simplicity & readability - * - * by default the HW acceleration is on for ESP32-WROOM32 - * but individual components can be turned off. - */ - #define WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW -#else - #undef WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW -#endif - -/* fips wrapper calls, user can call direct */ #if defined(HAVE_FIPS) && \ (!defined(HAVE_FIPS_VERSION) || (HAVE_FIPS_VERSION < 2)) @@ -210,7 +194,7 @@ on the specific device platform. (!defined(WOLFSSL_IMX6_CAAM) || defined(NO_IMX6_CAAM_HASH) || \ defined(WOLFSSL_QNX_CAAM)) && \ !defined(WOLFSSL_AFALG_HASH) && !defined(WOLFSSL_DEVCRYPTO_HASH) && \ - (!defined(WOLFSSL_ESP32WROOM32_CRYPT) || defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH)) && \ + !defined(WOLFSSL_ESP32_CRYPT_HASH) && \ (!defined(WOLFSSL_RENESAS_TSIP_CRYPT) || defined(NO_WOLFSSL_RENESAS_TSIP_CRYPT_HASH)) && \ !defined(WOLFSSL_PSOC6_CRYPTO) && !defined(WOLFSSL_IMXRT_DCP) && !defined(WOLFSSL_SILABS_SE_ACCEL) && \ !defined(WOLFSSL_KCAPI_HASH) && !defined(WOLFSSL_SE050_HASH) && \ @@ -725,7 +709,7 @@ static int InitSha256(wc_Sha256* sha256) return ret; } -#elif defined(WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW) +#elif defined(WOLFSSL_ESP32_CRYPT_HASH) /* HW may fail since there's only one, so we still need SW */ #define NEED_SOFT_SHA256 @@ -1099,7 +1083,7 @@ static int InitSha256(wc_Sha256* sha256) } #endif - #if defined(WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW) + #if defined(WOLFSSL_ESP32_CRYPT_HASH) if (sha256->ctx.mode == ESP32_SHA_INIT || sha256->ctx.mode == ESP32_SHA_FAIL_NEED_UNROLL) { esp_sha_try_hw_lock(&sha256->ctx); @@ -1181,7 +1165,7 @@ static int InitSha256(wc_Sha256* sha256) } #endif - #if defined(WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW) + #if defined(WOLFSSL_ESP32_CRYPT_HASH) if (sha256->ctx.mode == ESP32_SHA_INIT){ esp_sha_try_hw_lock(&sha256->ctx); } @@ -1275,7 +1259,7 @@ static int InitSha256(wc_Sha256* sha256) } #endif - #if defined(WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW) + #if defined(WOLFSSL_ESP32_CRYPT_HASH) if (sha256->ctx.mode == ESP32_SHA_INIT) { esp_sha_try_hw_lock(&sha256->ctx); } @@ -1333,7 +1317,7 @@ static int InitSha256(wc_Sha256* sha256) } #endif - #if defined(WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW) + #if defined(WOLFSSL_ESP32_CRYPT_HASH) if (sha256->ctx.mode == ESP32_SHA_INIT) { esp_sha_try_hw_lock(&sha256->ctx); } @@ -1776,7 +1760,7 @@ void wc_Sha256Free(wc_Sha256* sha256) #endif /* Espressif embedded hardware acceleration specific: */ -#if defined(WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) if (sha256->ctx.lockDepth > 0) { /* probably due to unclean shutdown, error, or other problem. * @@ -1972,7 +1956,7 @@ int wc_Sha256GetHash(wc_Sha256* sha256, byte* hash) } #endif -#if defined(WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) /* ESP32 hardware can only handle only 1 active hardware hashing * at a time. If the mutex lock is acquired the first time then * that Sha256 instance has exclusive access to hardware. The @@ -1991,7 +1975,7 @@ int wc_Sha256GetHash(wc_Sha256* sha256, byte* hash) if (ret == 0) { ret = wc_Sha256Final(tmpSha256, hash); - #if defined(WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW) + #if defined(WOLFSSL_ESP32_CRYPT_HASH) sha256->ctx.mode = ESP32_SHA_SW; #endif @@ -2033,7 +2017,7 @@ int wc_Sha256Copy(wc_Sha256* src, wc_Sha256* dst) ret = wc_Pic32HashCopy(&src->cache, &dst->cache); #endif -#if defined(WOLFSSL_USE_ESP32WROOM32_CRYPT_HASH_HW) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) dst->ctx.mode = src->ctx.mode; dst->ctx.isfirstblock = src->ctx.isfirstblock; dst->ctx.sha_type = src->ctx.sha_type; diff --git a/wolfcrypt/src/sha512.c b/wolfcrypt/src/sha512.c index bffa98501d..27304d8fa3 100644 --- a/wolfcrypt/src/sha512.c +++ b/wolfcrypt/src/sha512.c @@ -279,8 +279,7 @@ static int InitSha512(wc_Sha512* sha512) sha512->loLen = 0; sha512->hiLen = 0; -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) sha512->ctx.sha_type = SHA2_512; /* always start firstblock = 1 when using hw engine */ @@ -327,8 +326,7 @@ static int InitSha512_224(wc_Sha512* sha512) sha512->loLen = 0; sha512->hiLen = 0; -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) sha512->ctx.sha_type = SHA2_512; /* always start firstblock = 1 when using hw engine */ @@ -375,8 +373,7 @@ static int InitSha512_256(wc_Sha512* sha512) sha512->loLen = 0; sha512->hiLen = 0; -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) sha512->ctx.sha_type = SHA2_512; /* always start firstblock = 1 when using hw engine */ @@ -820,15 +817,13 @@ static WC_INLINE int Sha512Update(wc_Sha512* sha512, const byte* data, word32 le if (!IS_INTEL_AVX1(intel_flags) && !IS_INTEL_AVX2(intel_flags)) #endif { - #if !defined(WOLFSSL_ESP32WROOM32_CRYPT) || \ - defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) + #if !defined(WOLFSSL_ESP32_CRYPT_HASH) ByteReverseWords64(sha512->buffer, sha512->buffer, WC_SHA512_BLOCK_SIZE); #endif } #endif - #if !defined(WOLFSSL_ESP32WROOM32_CRYPT) || \ - defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) + #if !defined(WOLFSSL_ESP32_CRYPT_HASH) ret = Transform_Sha512(sha512); #else if(sha512->ctx.mode == ESP32_SHA_INIT) { @@ -891,13 +886,11 @@ static WC_INLINE int Sha512Update(wc_Sha512* sha512, const byte* data, word32 le data += WC_SHA512_BLOCK_SIZE; len -= WC_SHA512_BLOCK_SIZE; - #if !defined(WOLFSSL_ESP32WROOM32_CRYPT) || \ - defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) + #if !defined(WOLFSSL_ESP32_CRYPT_HASH) ByteReverseWords64(sha512->buffer, sha512->buffer, WC_SHA512_BLOCK_SIZE); #endif - #if !defined(WOLFSSL_ESP32WROOM32_CRYPT) || \ - defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) + #if !defined(WOLFSSL_ESP32_CRYPT_HASH) ret = Transform_Sha512(sha512); #else if(sha512->ctx.mode == ESP32_SHA_INIT) { @@ -984,15 +977,13 @@ static WC_INLINE int Sha512Final(wc_Sha512* sha512) #endif { - #if !defined(WOLFSSL_ESP32WROOM32_CRYPT) || \ - defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) + #if !defined(WOLFSSL_ESP32_CRYPT_HASH) ByteReverseWords64(sha512->buffer,sha512->buffer, WC_SHA512_BLOCK_SIZE); #endif } #endif /* LITTLE_ENDIAN_ORDER */ -#if !defined(WOLFSSL_ESP32WROOM32_CRYPT) || \ - defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if !defined(WOLFSSL_ESP32_CRYPT_HASH) ret = Transform_Sha512(sha512); #else if(sha512->ctx.mode == ESP32_SHA_INIT) { @@ -1021,15 +1012,13 @@ static WC_INLINE int Sha512Final(wc_Sha512* sha512) (defined(HAVE_INTEL_AVX1) || defined(HAVE_INTEL_AVX2)) if (!IS_INTEL_AVX1(intel_flags) && !IS_INTEL_AVX2(intel_flags)) #endif - #if !defined(WOLFSSL_ESP32WROOM32_CRYPT) || \ - defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) + #if !defined(WOLFSSL_ESP32_CRYPT_HASH) ByteReverseWords64(sha512->buffer, sha512->buffer, WC_SHA512_PAD_SIZE); #endif #endif /* ! length ordering dependent on digest endian type ! */ -#if !defined(WOLFSSL_ESP32WROOM32_CRYPT) || \ - defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if !defined(WOLFSSL_ESP32_CRYPT_HASH) sha512->buffer[WC_SHA512_BLOCK_SIZE / sizeof(word64) - 2] = sha512->hiLen; sha512->buffer[WC_SHA512_BLOCK_SIZE / sizeof(word64) - 1] = sha512->loLen; #endif @@ -1041,8 +1030,7 @@ static WC_INLINE int Sha512Final(wc_Sha512* sha512) &(sha512->buffer[WC_SHA512_BLOCK_SIZE / sizeof(word64) - 2]), WC_SHA512_BLOCK_SIZE - WC_SHA512_PAD_SIZE); #endif -#if !defined(WOLFSSL_ESP32WROOM32_CRYPT) || \ - defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if !defined(WOLFSSL_ESP32_CRYPT_HASH) ret = Transform_Sha512(sha512); #else if(sha512->ctx.mode == ESP32_SHA_INIT) { @@ -1302,8 +1290,7 @@ static int InitSha384(wc_Sha384* sha384) sha384->loLen = 0; sha384->hiLen = 0; -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) sha384->ctx.sha_type = SHA2_384; /* always start firstblock = 1 when using hw engine */ sha384->ctx.isfirstblock = 1; @@ -1525,8 +1512,7 @@ static int Sha512_Family_GetHash(wc_Sha512* sha512, byte* hash, } #endif -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) if (sha512->ctx.mode == ESP32_SHA_INIT) { esp_sha_try_hw_lock(&sha512->ctx); } @@ -1539,8 +1525,7 @@ static int Sha512_Family_GetHash(wc_Sha512* sha512, byte* hash, if (ret == 0) { ret = finalfp(tmpSha512, hash); -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) sha512->ctx.mode = ESP32_SHA_SW;; #endif wc_Sha512Free(tmpSha512); @@ -1578,8 +1563,7 @@ int wc_Sha512Copy(wc_Sha512* src, wc_Sha512* dst) #if defined(WOLFSSL_ASYNC_CRYPT) && defined(WC_ASYNC_ENABLE_SHA512) ret = wolfAsync_DevCopy(&src->asyncDev, &dst->asyncDev); #endif -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) dst->ctx.mode = src->ctx.mode; dst->ctx.isfirstblock = src->ctx.isfirstblock; dst->ctx.sha_type = src->ctx.sha_type; @@ -1782,8 +1766,7 @@ int wc_Sha384GetHash(wc_Sha384* sha384, byte* hash) } #endif -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) if (sha384->ctx.mode == ESP32_SHA_INIT) { esp_sha_try_hw_lock(&sha384->ctx); } @@ -1795,8 +1778,7 @@ int wc_Sha384GetHash(wc_Sha384* sha384, byte* hash) if (ret == 0) { ret = wc_Sha384Final(tmpSha384, hash); -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) sha384->ctx.mode = ESP32_SHA_SW; #endif wc_Sha384Free(tmpSha384); @@ -1830,8 +1812,7 @@ int wc_Sha384Copy(wc_Sha384* src, wc_Sha384* dst) #if defined(WOLFSSL_ASYNC_CRYPT) && defined(WC_ASYNC_ENABLE_SHA384) ret = wolfAsync_DevCopy(&src->asyncDev, &dst->asyncDev); #endif -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) dst->ctx.mode = src->ctx.mode; dst->ctx.isfirstblock = src->ctx.isfirstblock; dst->ctx.sha_type = src->ctx.sha_type; diff --git a/wolfcrypt/src/tfm.c b/wolfcrypt/src/tfm.c index aa4b441d8a..75448475a6 100644 --- a/wolfcrypt/src/tfm.c +++ b/wolfcrypt/src/tfm.c @@ -232,8 +232,7 @@ int fp_mul(fp_int *A, fp_int *B, fp_int *C) int ret = 0; int y, yy, oldused; -#if defined(WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) +#if defined(WOLFSSL_ESP32_CRYPT_RSA_PRI) ret = esp_mp_mul(A, B, C); if(ret != -2) return ret; #endif @@ -2816,8 +2815,7 @@ static int _fp_exptmod_base_2(fp_int * X, int digits, fp_int * P, int fp_exptmod(fp_int * G, fp_int * X, fp_int * P, fp_int * Y) { -#if defined(WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) +#if defined(WOLFSSL_ESP32_CRYPT_RSA_PRI) int x = fp_count_bits (X); #endif @@ -2838,8 +2836,7 @@ int fp_exptmod(fp_int * G, fp_int * X, fp_int * P, fp_int * Y) return FP_OKAY; } -#if defined(WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) +#if defined(WOLFSSL_ESP32_CRYPT_RSA_PRI) if(x > EPS_RSA_EXPT_XBTIS) { return esp_mp_exptmod(G, X, x, P, Y); } @@ -2901,8 +2898,7 @@ int fp_exptmod(fp_int * G, fp_int * X, fp_int * P, fp_int * Y) int fp_exptmod_ex(fp_int * G, fp_int * X, int digits, fp_int * P, fp_int * Y) { -#if defined(WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) +#if defined(WOLFSSL_ESP32_CRYPT_RSA_PRI) int x = fp_count_bits (X); #endif @@ -2923,8 +2919,7 @@ int fp_exptmod_ex(fp_int * G, fp_int * X, int digits, fp_int * P, fp_int * Y) return FP_OKAY; } -#if defined(WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) +#if defined(WOLFSSL_ESP32_CRYPT_RSA_PRI) if(x > EPS_RSA_EXPT_XBTIS) { return esp_mp_exptmod(G, X, x, P, Y); } @@ -2985,8 +2980,7 @@ int fp_exptmod_ex(fp_int * G, fp_int * X, int digits, fp_int * P, fp_int * Y) int fp_exptmod_nct(fp_int * G, fp_int * X, fp_int * P, fp_int * Y) { -#if defined(WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) +#if defined(WOLFSSL_ESP32_CRYPT_RSA_PRI) int x = fp_count_bits (X); #endif @@ -3000,8 +2994,7 @@ int fp_exptmod_nct(fp_int * G, fp_int * X, fp_int * P, fp_int * Y) return FP_VAL; } -#if defined(WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) +#if defined(WOLFSSL_ESP32_CRYPT_RSA_PRI) if(x > EPS_RSA_EXPT_XBTIS) { return esp_mp_exptmod(G, X, x, P, Y); } @@ -4310,8 +4303,7 @@ int wolfcrypt_mp_mulmod (mp_int * a, mp_int * b, mp_int * c, mp_int * d) int mp_mulmod (mp_int * a, mp_int * b, mp_int * c, mp_int * d) #endif { - #if defined(WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) + #if defined(WOLFSSL_ESP32_CRYPT_RSA_PRI) int A = fp_count_bits (a); int B = fp_count_bits (b); diff --git a/wolfssl/openssl/sha.h b/wolfssl/openssl/sha.h index 6498231e4e..1dd57c9a39 100644 --- a/wolfssl/openssl/sha.h +++ b/wolfssl/openssl/sha.h @@ -41,8 +41,7 @@ #define CTX_SHA_HW_ADDER sizeof(STM32_HASH_Context) #elif defined(WOLFSSL_IMXRT1170_CAAM) #define CTX_SHA_HW_ADDER (sizeof(caam_hash_ctx_t) + sizeof(caam_handle_t)) -#elif defined(WOLFSSL_ESPWROOM32) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#elif defined(WOLFSSL_ESP32_CRYPT_HASH) #define CTX_SHA_HW_ADDER sizeof(WC_ESP32SHA) #else #define CTX_SHA_HW_ADDER 0 diff --git a/wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h b/wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h index 346ca52fdc..299b3159af 100644 --- a/wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h +++ b/wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h @@ -30,7 +30,7 @@ #include "esp_log.h" #include "esp_random.h" -#ifdef WOLFSSL_ESP32WROOM32_CRYPT_DEBUG +#ifdef WOLFSSL_ESP32_CRYPT_DEBUG #undef LOG_LOCAL_LEVEL #define LOG_LOCAL_LEVEL ESP_LOG_DEBUG #else @@ -93,16 +93,16 @@ int esp_CryptHwMutexUnLock(wolfSSL_Mutex* mutex); #endif -#ifdef WOLFSSL_ESP32WROOM32_CRYPT_DEBUG +#ifdef WOLFSSL_ESP32_CRYPT_DEBUG void wc_esp32TimerStart(); uint64_t wc_esp32elapsedTime(); -#endif /* WOLFSSL_ESP32WROOM32_CRYPT_DEBUG */ +#endif /* WOLFSSL_ESP32_CRYPT_DEBUG */ #if (!defined(NO_SHA) || !defined(NO_SHA256) || defined(WOLFSSL_SHA384) || \ defined(WOLFSSL_SHA512)) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) + defined(WOLFSSL_ESP32_CRYPT_HASH) /* RAW hash function APIs are not implemented with esp32 hardware acceleration*/ #define WOLFSSL_NO_HASH_RAW diff --git a/wolfssl/wolfcrypt/settings.h b/wolfssl/wolfcrypt/settings.h index 82a03fa4ab..f87d34bec4 100644 --- a/wolfssl/wolfcrypt/settings.h +++ b/wolfssl/wolfcrypt/settings.h @@ -223,9 +223,6 @@ /* Uncomment next line if building for using ESP-IDF */ /* #define WOLFSSL_ESPIDF */ -/* Uncomment next line if using Espressif ESP32-WROOM-32 */ -/* #define WOLFSSL_ESPWROOM32 */ - /* Uncomment next line if using Espressif ESP32-WROOM-32SE */ /* #define WOLFSSL_ESPWROOM32SE */ @@ -344,14 +341,20 @@ #define ECC_TIMING_RESISTANT #define WC_RSA_BLINDING -#if defined(WOLFSSL_ESPWROOM32) || defined(WOLFSSL_ESPWROOM32SE) - #ifndef NO_ESP32WROOM32_CRYPT - #define WOLFSSL_ESP32WROOM32_CRYPT +#if defined(CONFIG_IDF_TARGET_ESP32) + #ifndef NO_ESP32_CRYPT + #define WOLFSSL_ESP32_CRYPT #if defined(ESP32_USE_RSA_PRIMITIVE) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI) - #define WOLFSSL_ESP32WROOM32_CRYPT_RSA_PRI + !defined(NO_WOLFSSL_ESP32_CRYPT_RSA_PRI) + #define WOLFSSL_ESP32_CRYPT_RSA_PRI #define WOLFSSL_SMALL_STACK #endif + #ifndef NO_WOLFSSL_ESP32_CRYPT_HASH + #define WOLFSSL_ESP32_CRYPT_HASH + #endif + #ifndef NO_WOLFSSL_ESP32_CRYPT_AES + #define WOLFSSL_ESP32_CRYPT_AES + #endif #endif #endif #endif /* WOLFSSL_ESPIDF */ diff --git a/wolfssl/wolfcrypt/sha.h b/wolfssl/wolfcrypt/sha.h index a6362660f1..f9fd73a79d 100644 --- a/wolfssl/wolfcrypt/sha.h +++ b/wolfssl/wolfcrypt/sha.h @@ -78,7 +78,7 @@ #ifdef WOLFSSL_ASYNC_CRYPT #include #endif -#ifdef WOLFSSL_ESP32WROOM32_CRYPT +#ifdef WOLFSSL_ESP32_CRYPT_HASH #include #endif #if defined(WOLFSSL_SILABS_SE_ACCEL) @@ -173,8 +173,7 @@ struct wc_Sha { word32 len; #endif #endif -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#ifdef WOLFSSL_ESP32_CRYPT_HASH WC_ESP32SHA ctx; #endif #ifdef WOLFSSL_HASH_FLAGS diff --git a/wolfssl/wolfcrypt/sha256.h b/wolfssl/wolfcrypt/sha256.h index ccdee8540a..8f0b499d35 100644 --- a/wolfssl/wolfcrypt/sha256.h +++ b/wolfssl/wolfcrypt/sha256.h @@ -97,7 +97,7 @@ #if defined(WOLFSSL_DEVCRYPTO) && defined(WOLFSSL_DEVCRYPTO_HASH) #include #endif -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) +#if defined(WOLFSSL_ESP32_CRYPT_HASH) #include "wolfssl/wolfcrypt/port/Espressif/esp32-crypt.h" #endif #if defined(WOLFSSL_CRYPTOCELL) @@ -213,8 +213,7 @@ struct wc_Sha256 { word32 used; word32 len; #endif -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#ifdef WOLFSSL_ESP32_CRYPT_HASH WC_ESP32SHA ctx; #endif #ifdef WOLFSSL_MAXQ10XX_CRYPTO diff --git a/wolfssl/wolfcrypt/sha512.h b/wolfssl/wolfcrypt/sha512.h index 4011c7df52..b061172305 100644 --- a/wolfssl/wolfcrypt/sha512.h +++ b/wolfssl/wolfcrypt/sha512.h @@ -75,7 +75,7 @@ #ifdef WOLFSSL_ASYNC_CRYPT #include #endif -#ifdef WOLFSSL_ESP32WROOM32_CRYPT +#ifdef WOLFSSL_ESP32_CRYPT_HASH #include #endif #if defined(WOLFSSL_SILABS_SE_ACCEL) @@ -172,8 +172,7 @@ struct wc_Sha512 { #ifdef WOLFSSL_SMALL_STACK_CACHE word64* W; #endif -#if defined(WOLFSSL_ESP32WROOM32_CRYPT) && \ - !defined(NO_WOLFSSL_ESP32WROOM32_CRYPT_HASH) +#ifdef WOLFSSL_ESP32_CRYPT_HASH WC_ESP32SHA ctx; #endif #if defined(WOLFSSL_SILABS_SE_ACCEL) From e1c042b13a4ef04350ec68655723faecb9aecb31 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?P=C3=81LFFY=20D=C3=A1niel?= Date: Wed, 5 Apr 2023 00:41:19 +0200 Subject: [PATCH 9/9] esp wolfssl_test: add separate reporting for hw accelerated aes, hash, rsa --- .../ESP-IDF/examples/wolfssl_test/main/main.c | 11 ++++++----- .../ESP-IDF/examples/wolfssl_test_idf/main/main.c | 11 ++++++----- .../examples/wolfssl_test_idf/main/main_wip.c.ex | 11 ++++++----- wolfssl/wolfcrypt/settings.h | 13 +++++++++++++ 4 files changed, 31 insertions(+), 15 deletions(-) diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c index 60b1d1f811..c2b9e8ade1 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test/main/main.c @@ -187,11 +187,12 @@ void app_main(void) ESP_LOGI(TAG, "Stack HWM: %d\n", uxTaskGetStackHighWaterMark(NULL)); /* check to see if we are using hardware encryption */ -#if defined(WOLFSSL_ESP32_CRYPT) - ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT is enabled."); -#else - ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT not defined! HW acceleration DISABLED."); -#endif + ESP_LOGI(TAG, "WOLFSSL_ESP_CRYPT_RSA_PRI is %s.", + WOLFSSL_ESP_CRYPT_RSA_PRI ? "enabled" : "disabled"); + ESP_LOGI(TAG, "WOLFSSL_ESP_CRYPT_HASH is %s.", + WOLFSSL_ESP_CRYPT_HASH ? "enabled" : "disabled"); + ESP_LOGI(TAG, "WOLFSSL_ESP_CRYPT_AES is %s.", + WOLFSSL_ESP_CRYPT_AES ? "enabled" : "disabled"); diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c index 60b1d1f811..c2b9e8ade1 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main.c @@ -187,11 +187,12 @@ void app_main(void) ESP_LOGI(TAG, "Stack HWM: %d\n", uxTaskGetStackHighWaterMark(NULL)); /* check to see if we are using hardware encryption */ -#if defined(WOLFSSL_ESP32_CRYPT) - ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT is enabled."); -#else - ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT not defined! HW acceleration DISABLED."); -#endif + ESP_LOGI(TAG, "WOLFSSL_ESP_CRYPT_RSA_PRI is %s.", + WOLFSSL_ESP_CRYPT_RSA_PRI ? "enabled" : "disabled"); + ESP_LOGI(TAG, "WOLFSSL_ESP_CRYPT_HASH is %s.", + WOLFSSL_ESP_CRYPT_HASH ? "enabled" : "disabled"); + ESP_LOGI(TAG, "WOLFSSL_ESP_CRYPT_AES is %s.", + WOLFSSL_ESP_CRYPT_AES ? "enabled" : "disabled"); diff --git a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main_wip.c.ex b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main_wip.c.ex index 1fe072d38f..3e6d9fd1b2 100644 --- a/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main_wip.c.ex +++ b/IDE/Espressif/ESP-IDF/examples/wolfssl_test_idf/main/main_wip.c.ex @@ -231,11 +231,12 @@ void app_main(void) ESP_LOGI(TAG, "Stack HWM: %d\n", uxTaskGetStackHighWaterMark(NULL)); /* check to see if we are using hardware encryption */ -#if defined(WOLFSSL_ESP32_CRYPT) - ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT is enabled."); -#else - ESP_LOGI(TAG, "WOLFSSL_ESP32_CRYPT not defined! HW acceleration DISABLED."); -#endif + ESP_LOGI(TAG, "WOLFSSL_ESP_CRYPT_RSA_PRI is %s.", + WOLFSSL_ESP_CRYPT_RSA_PRI ? "enabled" : "disabled"); + ESP_LOGI(TAG, "WOLFSSL_ESP_CRYPT_HASH is %s.", + WOLFSSL_ESP_CRYPT_HASH ? "enabled" : "disabled"); + ESP_LOGI(TAG, "WOLFSSL_ESP_CRYPT_AES is %s.", + WOLFSSL_ESP_CRYPT_AES ? "enabled" : "disabled"); diff --git a/wolfssl/wolfcrypt/settings.h b/wolfssl/wolfcrypt/settings.h index f87d34bec4..f8ae53269c 100644 --- a/wolfssl/wolfcrypt/settings.h +++ b/wolfssl/wolfcrypt/settings.h @@ -347,16 +347,29 @@ #if defined(ESP32_USE_RSA_PRIMITIVE) && \ !defined(NO_WOLFSSL_ESP32_CRYPT_RSA_PRI) #define WOLFSSL_ESP32_CRYPT_RSA_PRI + #define WOLFSSL_ESP_CRYPT_RSA_PRI 1 #define WOLFSSL_SMALL_STACK #endif #ifndef NO_WOLFSSL_ESP32_CRYPT_HASH #define WOLFSSL_ESP32_CRYPT_HASH + #define WOLFSSL_ESP_CRYPT_HASH 1 #endif #ifndef NO_WOLFSSL_ESP32_CRYPT_AES #define WOLFSSL_ESP32_CRYPT_AES + #define WOLFSSL_ESP_CRYPT_AES 1 #endif #endif #endif + + #ifndef WOLFSSL_ESP_CRYPT_RSA_PRI + #define WOLFSSL_ESP_CRYPT_RSA_PRI 0 + #endif + #ifndef WOLFSSL_ESP_CRYPT_HASH + #define WOLFSSL_ESP_CRYPT_HASH 0 + #endif + #ifndef WOLFSSL_ESP_CRYPT_AES + #define WOLFSSL_ESP_CRYPT_AES 0 + #endif #endif /* WOLFSSL_ESPIDF */ #if defined(WOLFCRYPT_ONLY)