From 2183dd1bf3ca2648961be47cc11499edce1d018f Mon Sep 17 00:00:00 2001 From: xfangfang <2553041586@qq.com> Date: Thu, 11 Jan 2024 23:56:26 +0800 Subject: [PATCH] Release version v1.3.0 --- CMakeLists.txt | 10 +- README.md | 7 +- library/borealis | 2 +- scripts/README.md | 4 +- scripts/build_switch.sh | 4 +- scripts/build_switch_deko3d.sh | 4 +- .../linux/cn.xfangfang.wiliwili.appdata.xml | 2 +- scripts/switch/ffmpeg/PKGBUILD | 16 +- scripts/switch/ffmpeg/ffmpeg.patch | 3840 +++++++++-------- scripts/switch/ffmpeg/ffmpeg_bad_frame.patch | 12 - scripts/switch/mpv/PKGBUILD | 2 +- scripts/switch/mpv_deko3d/PKGBUILD | 11 +- 12 files changed, 2092 insertions(+), 1822 deletions(-) delete mode 100644 scripts/switch/ffmpeg/ffmpeg_bad_frame.patch diff --git a/CMakeLists.txt b/CMakeLists.txt index 0d740f45..aa627f40 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -81,14 +81,14 @@ add_definitions(-DFONS_HASH_LUT_SIZE=4096) # Project Info project(wiliwili) set(VERSION_MAJOR "1") -set(VERSION_MINOR "2") -set(VERSION_REVISION "2") +set(VERSION_MINOR "3") +set(VERSION_REVISION "0") set(VERSION_BUILD "0") set(PROJECT_AUTHOR "xfangfang") set(PACKAGE_NAME cn.xfangfang.wiliwili) set(VITA_TITLEID "WILIWILI0") set(PSN_TITLE_ID "WILI00000") -set(VITA_VERSION "01.22") +set(VITA_VERSION "01.30") set(PROJECT_ICON ${CMAKE_CURRENT_SOURCE_DIR}/resources/icon/icon.jpg) set(PROJECT_RESOURCES ${CMAKE_CURRENT_SOURCE_DIR}/resources) set(APP_VERSION "${VERSION_MAJOR}.${VERSION_MINOR}.${VERSION_REVISION}") @@ -102,7 +102,9 @@ if (PLATFORM_DESKTOP) find_package(MPV REQUIRED) message(STATUS "Found libmpv: ${MPV_VERSION} ${MPV_INCLUDE_DIR} ${MPV_LIBRARY}") list(APPEND APP_PLATFORM_INCLUDE ${MPV_INCLUDE_DIR}) - list(APPEND APP_PLATFORM_LIB ${MPV_LIBRARY}) + if (NOT MPV_BUNDLE_DLL) + list(APPEND APP_PLATFORM_LIB ${MPV_LIBRARY}) + endif () find_package(WebP) if (WebP_FOUND AND NOT DISABLE_WEBP) diff --git a/README.md b/README.md index f9fdf7bd..26d87ee7 100644 --- a/README.md +++ b/README.md @@ -309,8 +309,8 @@ sudo dkp-pacman -S switch-glfw switch-libwebp switch-cmake switch-curl devkitA64 base_url="https://github.com/xfangfang/wiliwili/releases/download/v0.1.0" sudo dkp-pacman -U \ $base_url/switch-libass-0.17.1-1-any.pkg.tar.zst \ - $base_url/switch-ffmpeg-6.1-4-any.pkg.tar.zst \ - $base_url/switch-libmpv-0.36.0-1-any.pkg.tar.zst + $base_url/switch-ffmpeg-6.1-5-any.pkg.tar.zst \ + $base_url/switch-libmpv-0.36.0-2-any.pkg.tar.zst # 4. build cmake -B cmake-build-switch -DPLATFORM_SWITCH=ON @@ -322,7 +322,7 @@ make -C cmake-build-switch wiliwili.nro -j$(nproc) ### 交叉编译 PSV 可执行文件 参考 `.github/workflows/build.yaml` 使用 docker 来编译。 -本地安装 [vitasdk](https://vitasdk.org/) 环境编译时，请不要忘记将需要的四个 suprx 文件放入 `scripts/psv/module` 目录下。 详情请参考：[borealis 示例](https://github.com/xfangfang/borealis#building-the-demo-for-psv) 和 [wiliwili_vita 编译指南](https://gist.github.com/xfangfang/305da139721ad4e96d7a9d9a1a550a9d) +编译时，请不要忘记将需要的四个 suprx 文件放入 `scripts/psv/module` 目录下。 详情请参考：[borealis 示例](https://github.com/xfangfang/borealis#building-the-demo-for-psv) 和 [wiliwili_vita 编译指南](https://gist.github.com/xfangfang/305da139721ad4e96d7a9d9a1a550a9d)
@@ -394,6 +394,7 @@ The development of wiliwili cannot do without the support of the following open - https://github.com/sammycage/lunasvg - https://github.com/cesanta/mongoose - https://chromium.googlesource.com/webm/libwebp + - https://github.com/fancycode/MemoryModule # Special thanks diff --git a/library/borealis b/library/borealis index 0e40857d..9f885c21 160000 --- a/library/borealis +++ b/library/borealis @@ -1 +1 @@ -Subproject commit 0e40857dc693d8de18829a7fbce56cd08ddec280 +Subproject commit 9f885c213b42c7ecdaf5a8a98bb2e63ab97039fa diff --git a/scripts/README.md b/scripts/README.md index fa8498f8..eb9227ae 100644 --- a/scripts/README.md +++ b/scripts/README.md @@ -31,8 +31,8 @@ done base_url="https://github.com/xfangfang/wiliwili/releases/download/v0.1.0" sudo dkp-pacman -U \ $base_url/switch-libass-0.17.1-1-any.pkg.tar.zst \ - $base_url/switch-ffmpeg-6.1-4-any.pkg.tar.zst \ - $base_url/switch-libmpv-0.36.0-1-any.pkg.tar.zst + $base_url/switch-ffmpeg-6.1-5-any.pkg.tar.zst \ + $base_url/switch-libmpv-0.36.0-2-any.pkg.tar.zst ``` # Acknowledgement diff --git a/scripts/build_switch.sh b/scripts/build_switch.sh index 3efd18ea..9e338f9e 100755 --- a/scripts/build_switch.sh +++ b/scripts/build_switch.sh @@ -12,8 +12,8 @@ BASE_URL="https://github.com/xfangfang/wiliwili/releases/download/v0.1.0/" PKGS=( "switch-libass-0.17.1-1-any.pkg.tar.zst" "switch-dav1d-1.2.1-1-any.pkg.tar.zst" - "switch-ffmpeg-6.1-4-any.pkg.tar.zst" - "switch-libmpv-0.36.0-1-any.pkg.tar.zst" + "switch-ffmpeg-6.1-5-any.pkg.tar.zst" + "switch-libmpv-0.36.0-2-any.pkg.tar.zst" "switch-nspmini-48d4fc2-1-any.pkg.tar.xz" ) for PKG in "${PKGS[@]}"; do diff --git a/scripts/build_switch_deko3d.sh b/scripts/build_switch_deko3d.sh index 00196183..74dba574 100755 --- a/scripts/build_switch_deko3d.sh +++ b/scripts/build_switch_deko3d.sh @@ -14,8 +14,8 @@ PKGS=( "libuam-f8c9eef01ffe06334d530393d636d69e2b52744b-1-any.pkg.tar.zst" "switch-dav1d-1.2.1-1-any.pkg.tar.zst" "switch-libass-0.17.1-1-any.pkg.tar.zst" - "switch-ffmpeg-6.1-4-any.pkg.tar.zst" - "switch-libmpv_deko3d-0.35.1-4-any.pkg.tar.zst" + "switch-ffmpeg-6.1-5-any.pkg.tar.zst" + "switch-libmpv_deko3d-0.36.0-1-any.pkg.tar.zst" "switch-nspmini-48d4fc2-1-any.pkg.tar.xz" ) for PKG in "${PKGS[@]}"; do diff --git a/scripts/linux/cn.xfangfang.wiliwili.appdata.xml b/scripts/linux/cn.xfangfang.wiliwili.appdata.xml index 48ce81d8..858d6c91 100644 --- a/scripts/linux/cn.xfangfang.wiliwili.appdata.xml +++ b/scripts/linux/cn.xfangfang.wiliwili.appdata.xml @@ -46,7 +46,7 @@ - +

Please See Official Changelog at github.com/xfangfang/wiliwili/releases diff --git a/scripts/switch/ffmpeg/PKGBUILD b/scripts/switch/ffmpeg/PKGBUILD index c13cb9c8..893efdac 100644 --- a/scripts/switch/ffmpeg/PKGBUILD +++ b/scripts/switch/ffmpeg/PKGBUILD @@ -7,7 +7,7 @@ pkgname=switch-ffmpeg pkgver=6.1 commit=ff3429991ec1bac1d1b71215402e3d195162e125 -pkgrel=4 +pkgrel=5 pkgdesc='ffmpeg port (for Nintendo Switch homebrew development)' arch=('any') url='https://ffmpeg.org/' @@ -27,20 +27,20 @@ groups=('switch-portlibs') prepare() { cd FFmpeg-$commit - rm -rf libavutil/hwcontext_tx1.c - rm -rf libavutil/hwcontext_tx1.h + rm -rf libavutil/hwcontext_nvtegra.c + rm -rf libavutil/hwcontext_nvtegra.h rm -rf libavutil/nvdec_drv.h rm -rf libavutil/nvhost_ioctl.h rm -rf libavutil/nvjpg_drv.h rm -rf libavutil/nvmap_ioctl.h - rm -rf libavutil/tx1.c - rm -rf libavutil/tx1.h - rm -rf libavutil/tx1_host1x.h + rm -rf libavutil/nvtegra.c + rm -rf libavutil/nvtegra.h + rm -rf libavutil/nvtegra_host1x.h rm -rf libavutil/vic_drv.h rm -rf libavutil/clb0b6.h rm -rf libavutil/clc5b0.h rm -rf libavutil/cle7d0.h - rm -rf libavcodec/tx1_* + rm -rf libavcodec/nvtegra_* patch -Np1 -i "$srcdir/ffmpeg.patch" patch -Np1 -i "$srcdir/network.patch" @@ -63,7 +63,7 @@ build() { --enable-swscale --enable-swresample --enable-network \ --disable-protocols --enable-protocol=file,http,tcp,udp,rtmp,hls,https,tls,ftp,rtp,crypto,httpproxy \ --enable-zlib --enable-bzlib --enable-libass --enable-libfreetype --enable-libfribidi --enable-libdav1d \ - --enable-gpl --enable-tx1 \ + --enable-gpl --enable-nvtegra \ --enable-version3 --enable-mbedtls make -j$(nproc) diff --git a/scripts/switch/ffmpeg/ffmpeg.patch b/scripts/switch/ffmpeg/ffmpeg.patch index 5a53d106..299f989d 100644 --- a/scripts/switch/ffmpeg/ffmpeg.patch +++ b/scripts/switch/ffmpeg/ffmpeg.patch @@ -1,12 +1,12 @@ diff --git a/configure b/configure -index f494da204c..c2461c8a3c 100755 +index f494da204c..ac2da3a74c 100755 --- a/configure +++ b/configure @@ -351,6 +351,7 @@ External library support: --disable-vdpau disable Nvidia Video Decode and Presentation API for Unix code [autodetect] --disable-videotoolbox disable VideoToolbox code [autodetect] --disable-vulkan disable Vulkan code [autodetect] -+ --enable-tx1 enable tx1 nvdec video decoding ++ --enable-nvtegra enable nvtegra video decoding Toolchain options: --arch=ARCH select architecture [$arch] @@ -14,7 +14,7 @@ index f494da204c..c2461c8a3c 100755 mmal omx opencl -+ tx1 ++ nvtegra " DOCUMENT_LIST=" @@ -22,7 +22,7 @@ index f494da204c..c2461c8a3c 100755 videotoolbox_hwaccel_deps="videotoolbox pthreads" videotoolbox_hwaccel_extralibs="-framework QuartzCore" vulkan_deps_any="libdl LoadLibrary" -+tx1_deps="gpl" ++nvtegra_deps="gpl" av1_d3d11va_hwaccel_deps="d3d11va DXVA_PicParams_AV1" av1_d3d11va_hwaccel_select="av1_decoder" @@ -30,8 +30,8 @@ index f494da204c..c2461c8a3c 100755 h264_videotoolbox_hwaccel_select="h264_decoder" h264_vulkan_hwaccel_deps="vulkan" h264_vulkan_hwaccel_select="h264_decoder" -+h264_tx1_hwaccel_deps="tx1" -+h264_tx1_hwaccel_select="h264_decoder" ++h264_nvtegra_hwaccel_deps="nvtegra" ++h264_nvtegra_hwaccel_select="h264_decoder" hevc_d3d11va_hwaccel_deps="d3d11va DXVA_PicParams_HEVC" hevc_d3d11va_hwaccel_select="hevc_decoder" hevc_d3d11va2_hwaccel_deps="d3d11va DXVA_PicParams_HEVC" @@ -39,22 +39,22 @@ index f494da204c..c2461c8a3c 100755 hevc_videotoolbox_hwaccel_select="hevc_decoder" hevc_vulkan_hwaccel_deps="vulkan" hevc_vulkan_hwaccel_select="hevc_decoder" -+hevc_tx1_hwaccel_deps="tx1" -+hevc_tx1_hwaccel_select="hevc_decoder" ++hevc_nvtegra_hwaccel_deps="nvtegra" ++hevc_nvtegra_hwaccel_select="hevc_decoder" mjpeg_nvdec_hwaccel_deps="nvdec" mjpeg_nvdec_hwaccel_select="mjpeg_decoder" mjpeg_vaapi_hwaccel_deps="vaapi" mjpeg_vaapi_hwaccel_select="mjpeg_decoder" -+mjpeg_tx1_hwaccel_deps="tx1" -+mjpeg_tx1_hwaccel_select="mjpeg_decoder" ++mjpeg_nvtegra_hwaccel_deps="nvtegra" ++mjpeg_nvtegra_hwaccel_select="mjpeg_decoder" mpeg1_nvdec_hwaccel_deps="nvdec" mpeg1_nvdec_hwaccel_select="mpeg1video_decoder" mpeg1_vdpau_hwaccel_deps="vdpau" mpeg1_vdpau_hwaccel_select="mpeg1video_decoder" mpeg1_videotoolbox_hwaccel_deps="videotoolbox" mpeg1_videotoolbox_hwaccel_select="mpeg1video_decoder" -+mpeg1_tx1_hwaccel_deps="tx1" -+mpeg1_tx1_hwaccel_select="mpeg1video_decoder" ++mpeg1_nvtegra_hwaccel_deps="nvtegra" ++mpeg1_nvtegra_hwaccel_select="mpeg1video_decoder" mpeg2_d3d11va_hwaccel_deps="d3d11va" mpeg2_d3d11va_hwaccel_select="mpeg2video_decoder" mpeg2_d3d11va2_hwaccel_deps="d3d11va" @@ -62,8 +62,8 @@ index f494da204c..c2461c8a3c 100755 mpeg2_vdpau_hwaccel_select="mpeg2video_decoder" mpeg2_videotoolbox_hwaccel_deps="videotoolbox" mpeg2_videotoolbox_hwaccel_select="mpeg2video_decoder" -+mpeg2_tx1_hwaccel_deps="tx1" -+mpeg2_tx1_hwaccel_select="mpeg2video_decoder" ++mpeg2_nvtegra_hwaccel_deps="nvtegra" ++mpeg2_nvtegra_hwaccel_select="mpeg2video_decoder" mpeg4_nvdec_hwaccel_deps="nvdec" mpeg4_nvdec_hwaccel_select="mpeg4_decoder" mpeg4_vaapi_hwaccel_deps="vaapi" @@ -71,8 +71,8 @@ index f494da204c..c2461c8a3c 100755 mpeg4_videotoolbox_hwaccel_select="mpeg4_decoder" prores_videotoolbox_hwaccel_deps="videotoolbox" prores_videotoolbox_hwaccel_select="prores_decoder" -+mpeg4_tx1_hwaccel_deps="tx1" -+mpeg4_tx1_hwaccel_select="mpeg4_decoder" ++mpeg4_nvtegra_hwaccel_deps="nvtegra" ++mpeg4_nvtegra_hwaccel_select="mpeg4_decoder" vc1_d3d11va_hwaccel_deps="d3d11va" vc1_d3d11va_hwaccel_select="vc1_decoder" vc1_d3d11va2_hwaccel_deps="d3d11va" @@ -80,14 +80,14 @@ index f494da204c..c2461c8a3c 100755 vc1_vaapi_hwaccel_select="vc1_decoder" vc1_vdpau_hwaccel_deps="vdpau" vc1_vdpau_hwaccel_select="vc1_decoder" -+vc1_tx1_hwaccel_deps="tx1" -+vc1_tx1_hwaccel_select="vc1_decoder" ++vc1_nvtegra_hwaccel_deps="nvtegra" ++vc1_nvtegra_hwaccel_select="vc1_decoder" vp8_nvdec_hwaccel_deps="nvdec" vp8_nvdec_hwaccel_select="vp8_decoder" vp8_vaapi_hwaccel_deps="vaapi" vp8_vaapi_hwaccel_select="vp8_decoder" -+vp8_tx1_hwaccel_deps="tx1" -+vp8_tx1_hwaccel_select="vp8_decoder" ++vp8_nvtegra_hwaccel_deps="nvtegra" ++vp8_nvtegra_hwaccel_select="vp8_decoder" vp9_d3d11va_hwaccel_deps="d3d11va DXVA_PicParams_VP9" vp9_d3d11va_hwaccel_select="vp9_decoder" vp9_d3d11va2_hwaccel_deps="d3d11va DXVA_PicParams_VP9" @@ -95,15 +95,15 @@ index f494da204c..c2461c8a3c 100755 vp9_vdpau_hwaccel_select="vp9_decoder" vp9_videotoolbox_hwaccel_deps="videotoolbox" vp9_videotoolbox_hwaccel_select="vp9_decoder" -+vp9_tx1_hwaccel_deps="tx1" -+vp9_tx1_hwaccel_select="vp9_decoder" ++vp9_nvtegra_hwaccel_deps="nvtegra" ++vp9_nvtegra_hwaccel_select="vp9_decoder" wmv3_d3d11va_hwaccel_select="vc1_d3d11va_hwaccel" wmv3_d3d11va2_hwaccel_select="vc1_d3d11va2_hwaccel" wmv3_dxva2_hwaccel_select="vc1_dxva2_hwaccel" wmv3_nvdec_hwaccel_select="vc1_nvdec_hwaccel" wmv3_vaapi_hwaccel_select="vc1_vaapi_hwaccel" wmv3_vdpau_hwaccel_select="vc1_vdpau_hwaccel" -+wmv3_tx1_hwaccel_select="vc1_tx1_hwaccel" ++wmv3_nvtegra_hwaccel_select="vc1_nvtegra_hwaccel" # hardware-accelerated codecs mediafoundation_deps="mftransform_h MFCreateAlignedMemoryBuffer" @@ -113,20 +113,20 @@ index f494da204c..c2461c8a3c 100755 ;; + horizon) + enable section_data_rel_ro -+ network_extralibs="-lnx" ++ add_extralibs -lnx + ;; none) ;; *) diff --git a/libavcodec/Makefile b/libavcodec/Makefile -index 580a8d6b54..945f9b0282 100644 +index 580a8d6b54..c7a23585e1 100644 --- a/libavcodec/Makefile +++ b/libavcodec/Makefile @@ -987,6 +987,7 @@ OBJS-$(CONFIG_VAAPI) += vaapi_decode.o OBJS-$(CONFIG_VIDEOTOOLBOX) += videotoolbox.o OBJS-$(CONFIG_VDPAU) += vdpau.o OBJS-$(CONFIG_VULKAN) += vulkan.o vulkan_video.o -+OBJS-$(CONFIG_TX1) += tx1_decode.o ++OBJS-$(CONFIG_NVTEGRA) += nvtegra_decode.o OBJS-$(CONFIG_AV1_D3D11VA_HWACCEL) += dxva2_av1.o OBJS-$(CONFIG_AV1_DXVA2_HWACCEL) += dxva2_av1.o @@ -134,7 +134,7 @@ index 580a8d6b54..945f9b0282 100644 OBJS-$(CONFIG_H264_VDPAU_HWACCEL) += vdpau_h264.o OBJS-$(CONFIG_H264_VIDEOTOOLBOX_HWACCEL) += videotoolbox.o OBJS-$(CONFIG_H264_VULKAN_HWACCEL) += vulkan_decode.o vulkan_h264.o -+OBJS-$(CONFIG_H264_TX1_HWACCEL) += tx1_h264.o ++OBJS-$(CONFIG_H264_NVTEGRA_HWACCEL) += nvtegra_h264.o OBJS-$(CONFIG_HEVC_D3D11VA_HWACCEL) += dxva2_hevc.o OBJS-$(CONFIG_HEVC_DXVA2_HWACCEL) += dxva2_hevc.o OBJS-$(CONFIG_HEVC_NVDEC_HWACCEL) += nvdec_hevc.o @@ -142,14 +142,14 @@ index 580a8d6b54..945f9b0282 100644 OBJS-$(CONFIG_HEVC_VAAPI_HWACCEL) += vaapi_hevc.o h265_profile_level.o OBJS-$(CONFIG_HEVC_VDPAU_HWACCEL) += vdpau_hevc.o h265_profile_level.o OBJS-$(CONFIG_HEVC_VULKAN_HWACCEL) += vulkan_decode.o vulkan_hevc.o -+OBJS-$(CONFIG_HEVC_TX1_HWACCEL) += tx1_hevc.o ++OBJS-$(CONFIG_HEVC_NVTEGRA_HWACCEL) += nvtegra_hevc.o OBJS-$(CONFIG_MJPEG_NVDEC_HWACCEL) += nvdec_mjpeg.o OBJS-$(CONFIG_MJPEG_VAAPI_HWACCEL) += vaapi_mjpeg.o -+OBJS-$(CONFIG_MJPEG_TX1_HWACCEL) += tx1_mjpeg.o ++OBJS-$(CONFIG_MJPEG_NVTEGRA_HWACCEL) += nvtegra_mjpeg.o OBJS-$(CONFIG_MPEG1_NVDEC_HWACCEL) += nvdec_mpeg12.o OBJS-$(CONFIG_MPEG1_VDPAU_HWACCEL) += vdpau_mpeg12.o OBJS-$(CONFIG_MPEG1_VIDEOTOOLBOX_HWACCEL) += videotoolbox.o -+OBJS-$(CONFIG_MPEG1_TX1_HWACCEL) += tx1_mpeg12.o ++OBJS-$(CONFIG_MPEG1_NVTEGRA_HWACCEL) += nvtegra_mpeg12.o OBJS-$(CONFIG_MPEG2_D3D11VA_HWACCEL) += dxva2_mpeg2.o OBJS-$(CONFIG_MPEG2_DXVA2_HWACCEL) += dxva2_mpeg2.o OBJS-$(CONFIG_MPEG2_NVDEC_HWACCEL) += nvdec_mpeg12.o @@ -157,29 +157,29 @@ index 580a8d6b54..945f9b0282 100644 OBJS-$(CONFIG_MPEG2_VAAPI_HWACCEL) += vaapi_mpeg2.o OBJS-$(CONFIG_MPEG2_VDPAU_HWACCEL) += vdpau_mpeg12.o OBJS-$(CONFIG_MPEG2_VIDEOTOOLBOX_HWACCEL) += videotoolbox.o -+OBJS-$(CONFIG_MPEG2_TX1_HWACCEL) += tx1_mpeg12.o ++OBJS-$(CONFIG_MPEG2_NVTEGRA_HWACCEL) += nvtegra_mpeg12.o OBJS-$(CONFIG_MPEG4_NVDEC_HWACCEL) += nvdec_mpeg4.o OBJS-$(CONFIG_MPEG4_VAAPI_HWACCEL) += vaapi_mpeg4.o OBJS-$(CONFIG_MPEG4_VDPAU_HWACCEL) += vdpau_mpeg4.o OBJS-$(CONFIG_MPEG4_VIDEOTOOLBOX_HWACCEL) += videotoolbox.o -+OBJS-$(CONFIG_MPEG4_TX1_HWACCEL) += tx1_mpeg4.o ++OBJS-$(CONFIG_MPEG4_NVTEGRA_HWACCEL) += nvtegra_mpeg4.o OBJS-$(CONFIG_VC1_D3D11VA_HWACCEL) += dxva2_vc1.o OBJS-$(CONFIG_VC1_DXVA2_HWACCEL) += dxva2_vc1.o OBJS-$(CONFIG_VC1_NVDEC_HWACCEL) += nvdec_vc1.o OBJS-$(CONFIG_VC1_QSV_HWACCEL) += qsvdec.o OBJS-$(CONFIG_VC1_VAAPI_HWACCEL) += vaapi_vc1.o OBJS-$(CONFIG_VC1_VDPAU_HWACCEL) += vdpau_vc1.o -+OBJS-$(CONFIG_VC1_TX1_HWACCEL) += tx1_vc1.o ++OBJS-$(CONFIG_VC1_NVTEGRA_HWACCEL) += nvtegra_vc1.o OBJS-$(CONFIG_VP8_NVDEC_HWACCEL) += nvdec_vp8.o OBJS-$(CONFIG_VP8_VAAPI_HWACCEL) += vaapi_vp8.o -+OBJS-$(CONFIG_VP8_TX1_HWACCEL) += tx1_vp8.o ++OBJS-$(CONFIG_VP8_NVTEGRA_HWACCEL) += nvtegra_vp8.o OBJS-$(CONFIG_VP9_D3D11VA_HWACCEL) += dxva2_vp9.o OBJS-$(CONFIG_VP9_DXVA2_HWACCEL) += dxva2_vp9.o OBJS-$(CONFIG_VP9_NVDEC_HWACCEL) += nvdec_vp9.o OBJS-$(CONFIG_VP9_VAAPI_HWACCEL) += vaapi_vp9.o OBJS-$(CONFIG_VP9_VDPAU_HWACCEL) += vdpau_vp9.o OBJS-$(CONFIG_VP9_VIDEOTOOLBOX_HWACCEL) += videotoolbox_vp9.o -+OBJS-$(CONFIG_VP9_TX1_HWACCEL) += tx1_vp9.o ++OBJS-$(CONFIG_VP9_NVTEGRA_HWACCEL) += nvtegra_vp9.o OBJS-$(CONFIG_VP8_QSV_HWACCEL) += qsvdec.o # Objects duplicated from other libraries for shared builds @@ -187,12 +187,12 @@ index 580a8d6b54..945f9b0282 100644 SKIPHEADERS-$(CONFIG_VULKAN) += vulkan.h vulkan_video.h vulkan_decode.h vulkan_video_codec_av1std_decode.h SKIPHEADERS-$(CONFIG_V4L2_M2M) += v4l2_buffers.h v4l2_context.h v4l2_m2m.h SKIPHEADERS-$(CONFIG_ZLIB) += zlib_wrapper.h -+SKIPHEADERS-$(CONFIG_TX1) += tx1_decode.h ++SKIPHEADERS-$(CONFIG_NVTEGRA) += nvtegra_decode.h TESTPROGS = avcodec \ avpacket \ diff --git a/libavcodec/h263dec.c b/libavcodec/h263dec.c -index eb1d87a2fe..eaa930449e 100644 +index eb1d87a2fe..0e06d9c79b 100644 --- a/libavcodec/h263dec.c +++ b/libavcodec/h263dec.c @@ -671,6 +671,9 @@ const enum AVPixelFormat ff_h263_hwaccel_pixfmt_list_420[] = { @@ -200,8 +200,8 @@ index eb1d87a2fe..eaa930449e 100644 #if CONFIG_H263_VIDEOTOOLBOX_HWACCEL || CONFIG_MPEG4_VIDEOTOOLBOX_HWACCEL AV_PIX_FMT_VIDEOTOOLBOX, +#endif -+#if CONFIG_MPEG4_TX1_HWACCEL -+ AV_PIX_FMT_TX1, ++#if CONFIG_MPEG4_NVTEGRA_HWACCEL ++ AV_PIX_FMT_NVTEGRA, #endif AV_PIX_FMT_YUV420P, AV_PIX_FMT_NONE @@ -209,14 +209,14 @@ index eb1d87a2fe..eaa930449e 100644 #if CONFIG_MPEG4_VDPAU_HWACCEL HWACCEL_VDPAU(mpeg4), #endif -+#if CONFIG_MPEG4_TX1_HWACCEL -+ HWACCEL_TX1(mpeg4), ++#if CONFIG_MPEG4_NVTEGRA_HWACCEL ++ HWACCEL_NVTEGRA(mpeg4), +#endif #if CONFIG_H263_VIDEOTOOLBOX_HWACCEL HWACCEL_VIDEOTOOLBOX(h263), #endif diff --git a/libavcodec/h264_slice.c b/libavcodec/h264_slice.c -index 5c17edf9a4..2a9172b8b6 100644 +index 5c17edf9a4..9eb13a9daa 100644 --- a/libavcodec/h264_slice.c +++ b/libavcodec/h264_slice.c @@ -789,7 +789,8 @@ static enum AVPixelFormat get_pixel_format(H264Context *h, int force_callback) @@ -225,7 +225,7 @@ index 5c17edf9a4..2a9172b8b6 100644 CONFIG_H264_VDPAU_HWACCEL + \ - CONFIG_H264_VULKAN_HWACCEL) + CONFIG_H264_VULKAN_HWACCEL + \ -+ CONFIG_H264_TX1_HWACCEL) ++ CONFIG_H264_NVTEGRA_HWACCEL) enum AVPixelFormat pix_fmts[HWACCEL_MAX + 2], *fmt = pix_fmts; switch (h->ps.sps->bit_depth_luma) { @@ -234,13 +234,13 @@ index 5c17edf9a4..2a9172b8b6 100644 #if CONFIG_H264_VAAPI_HWACCEL *fmt++ = AV_PIX_FMT_VAAPI; +#endif -+#if CONFIG_H264_TX1_HWACCEL -+ *fmt++ = AV_PIX_FMT_TX1; ++#if CONFIG_H264_NVTEGRA_HWACCEL ++ *fmt++ = AV_PIX_FMT_NVTEGRA; #endif if (h->avctx->color_range == AVCOL_RANGE_JPEG) *fmt++ = AV_PIX_FMT_YUVJ420P; diff --git a/libavcodec/h264dec.c b/libavcodec/h264dec.c -index f346c65b20..fafc7f425e 100644 +index f346c65b20..1e15f58afe 100644 --- a/libavcodec/h264dec.c +++ b/libavcodec/h264dec.c @@ -1135,6 +1135,9 @@ const FFCodec ff_h264_decoder = { @@ -248,13 +248,13 @@ index f346c65b20..fafc7f425e 100644 #if CONFIG_H264_VULKAN_HWACCEL HWACCEL_VULKAN(h264), +#endif -+#if CONFIG_H264_TX1_HWACCEL -+ HWACCEL_TX1(h264), ++#if CONFIG_H264_NVTEGRA_HWACCEL ++ HWACCEL_NVTEGRA(h264), #endif NULL }, diff --git a/libavcodec/hevcdec.c b/libavcodec/hevcdec.c -index b267f6ebcf..5f4e9263c4 100644 +index b267f6ebcf..f031123f73 100644 --- a/libavcodec/hevcdec.c +++ b/libavcodec/hevcdec.c @@ -404,7 +404,8 @@ static enum AVPixelFormat get_format(HEVCContext *s, const HEVCSPS *sps) @@ -263,7 +263,7 @@ index b267f6ebcf..5f4e9263c4 100644 CONFIG_HEVC_VDPAU_HWACCEL + \ - CONFIG_HEVC_VULKAN_HWACCEL) + CONFIG_HEVC_VULKAN_HWACCEL + \ -+ CONFIG_HEVC_TX1_HWACCEL) ++ CONFIG_HEVC_NVTEGRA_HWACCEL) enum AVPixelFormat pix_fmts[HWACCEL_MAX + 2], *fmt = pix_fmts; switch (sps->pix_fmt) { @@ -272,8 +272,8 @@ index b267f6ebcf..5f4e9263c4 100644 #if CONFIG_HEVC_VULKAN_HWACCEL *fmt++ = AV_PIX_FMT_VULKAN; +#endif -+#if CONFIG_HEVC_TX1_HWACCEL -+ *fmt++ = AV_PIX_FMT_TX1; ++#if CONFIG_HEVC_NVTEGRA_HWACCEL ++ *fmt++ = AV_PIX_FMT_NVTEGRA; #endif break; case AV_PIX_FMT_YUV420P10: @@ -282,8 +282,8 @@ index b267f6ebcf..5f4e9263c4 100644 #if CONFIG_HEVC_NVDEC_HWACCEL *fmt++ = AV_PIX_FMT_CUDA; +#endif -+#if CONFIG_HEVC_TX1_HWACCEL -+ *fmt++ = AV_PIX_FMT_TX1; ++#if CONFIG_HEVC_NVTEGRA_HWACCEL ++ *fmt++ = AV_PIX_FMT_NVTEGRA; #endif break; case AV_PIX_FMT_YUV444P: @@ -325,8 +325,8 @@ index b267f6ebcf..5f4e9263c4 100644 #if CONFIG_HEVC_VULKAN_HWACCEL HWACCEL_VULKAN(hevc), +#endif -+#if CONFIG_HEVC_TX1_HWACCEL -+ HWACCEL_TX1(hevc), ++#if CONFIG_HEVC_NVTEGRA_HWACCEL ++ HWACCEL_NVTEGRA(hevc), #endif NULL }, @@ -344,14 +344,14 @@ index 6ef7d4f60f..5d9dd1a9ea 100644 typedef struct CodingUnit { diff --git a/libavcodec/hwaccels.h b/libavcodec/hwaccels.h -index c4630718cf..bf5e923e65 100644 +index c4630718cf..3c07254811 100644 --- a/libavcodec/hwaccels.h +++ b/libavcodec/hwaccels.h @@ -35,6 +35,7 @@ extern const struct FFHWAccel ff_h264_nvdec_hwaccel; extern const struct FFHWAccel ff_h264_vaapi_hwaccel; extern const struct FFHWAccel ff_h264_vdpau_hwaccel; extern const struct FFHWAccel ff_h264_videotoolbox_hwaccel; -+extern const struct FFHWAccel ff_h264_tx1_hwaccel; ++extern const struct FFHWAccel ff_h264_nvtegra_hwaccel; extern const struct FFHWAccel ff_h264_vulkan_hwaccel; extern const struct FFHWAccel ff_hevc_d3d11va_hwaccel; extern const struct FFHWAccel ff_hevc_d3d11va2_hwaccel; @@ -359,15 +359,15 @@ index c4630718cf..bf5e923e65 100644 extern const struct FFHWAccel ff_hevc_vaapi_hwaccel; extern const struct FFHWAccel ff_hevc_vdpau_hwaccel; extern const struct FFHWAccel ff_hevc_videotoolbox_hwaccel; -+extern const struct FFHWAccel ff_hevc_tx1_hwaccel; ++extern const struct FFHWAccel ff_hevc_nvtegra_hwaccel; extern const struct FFHWAccel ff_hevc_vulkan_hwaccel; extern const struct FFHWAccel ff_mjpeg_nvdec_hwaccel; extern const struct FFHWAccel ff_mjpeg_vaapi_hwaccel; -+extern const struct FFHWAccel ff_mjpeg_tx1_hwaccel; ++extern const struct FFHWAccel ff_mjpeg_nvtegra_hwaccel; extern const struct FFHWAccel ff_mpeg1_nvdec_hwaccel; extern const struct FFHWAccel ff_mpeg1_vdpau_hwaccel; extern const struct FFHWAccel ff_mpeg1_videotoolbox_hwaccel; -+extern const struct FFHWAccel ff_mpeg1_tx1_hwaccel; ++extern const struct FFHWAccel ff_mpeg1_nvtegra_hwaccel; extern const struct FFHWAccel ff_mpeg2_d3d11va_hwaccel; extern const struct FFHWAccel ff_mpeg2_d3d11va2_hwaccel; extern const struct FFHWAccel ff_mpeg2_dxva2_hwaccel; @@ -375,23 +375,23 @@ index c4630718cf..bf5e923e65 100644 extern const struct FFHWAccel ff_mpeg2_vaapi_hwaccel; extern const struct FFHWAccel ff_mpeg2_vdpau_hwaccel; extern const struct FFHWAccel ff_mpeg2_videotoolbox_hwaccel; -+extern const struct FFHWAccel ff_mpeg2_tx1_hwaccel; ++extern const struct FFHWAccel ff_mpeg2_nvtegra_hwaccel; extern const struct FFHWAccel ff_mpeg4_nvdec_hwaccel; extern const struct FFHWAccel ff_mpeg4_vaapi_hwaccel; extern const struct FFHWAccel ff_mpeg4_vdpau_hwaccel; extern const struct FFHWAccel ff_mpeg4_videotoolbox_hwaccel; extern const struct FFHWAccel ff_prores_videotoolbox_hwaccel; -+extern const struct FFHWAccel ff_mpeg4_tx1_hwaccel; ++extern const struct FFHWAccel ff_mpeg4_nvtegra_hwaccel; extern const struct FFHWAccel ff_vc1_d3d11va_hwaccel; extern const struct FFHWAccel ff_vc1_d3d11va2_hwaccel; extern const struct FFHWAccel ff_vc1_dxva2_hwaccel; extern const struct FFHWAccel ff_vc1_nvdec_hwaccel; extern const struct FFHWAccel ff_vc1_vaapi_hwaccel; extern const struct FFHWAccel ff_vc1_vdpau_hwaccel; -+extern const struct FFHWAccel ff_vc1_tx1_hwaccel; ++extern const struct FFHWAccel ff_vc1_nvtegra_hwaccel; extern const struct FFHWAccel ff_vp8_nvdec_hwaccel; extern const struct FFHWAccel ff_vp8_vaapi_hwaccel; -+extern const struct FFHWAccel ff_vp8_tx1_hwaccel; ++extern const struct FFHWAccel ff_vp8_nvtegra_hwaccel; extern const struct FFHWAccel ff_vp9_d3d11va_hwaccel; extern const struct FFHWAccel ff_vp9_d3d11va2_hwaccel; extern const struct FFHWAccel ff_vp9_dxva2_hwaccel; @@ -399,31 +399,31 @@ index c4630718cf..bf5e923e65 100644 extern const struct FFHWAccel ff_vp9_vaapi_hwaccel; extern const struct FFHWAccel ff_vp9_vdpau_hwaccel; extern const struct FFHWAccel ff_vp9_videotoolbox_hwaccel; -+extern const struct FFHWAccel ff_vp9_tx1_hwaccel; ++extern const struct FFHWAccel ff_vp9_nvtegra_hwaccel; extern const struct FFHWAccel ff_wmv3_d3d11va_hwaccel; extern const struct FFHWAccel ff_wmv3_d3d11va2_hwaccel; extern const struct FFHWAccel ff_wmv3_dxva2_hwaccel; extern const struct FFHWAccel ff_wmv3_nvdec_hwaccel; extern const struct FFHWAccel ff_wmv3_vaapi_hwaccel; extern const struct FFHWAccel ff_wmv3_vdpau_hwaccel; -+extern const struct FFHWAccel ff_wmv3_tx1_hwaccel; ++extern const struct FFHWAccel ff_wmv3_nvtegra_hwaccel; #endif /* AVCODEC_HWACCELS_H */ diff --git a/libavcodec/hwconfig.h b/libavcodec/hwconfig.h -index e164722a94..cee6f09a1a 100644 +index e164722a94..9bade29560 100644 --- a/libavcodec/hwconfig.h +++ b/libavcodec/hwconfig.h @@ -77,6 +77,8 @@ void ff_hwaccel_uninit(AVCodecContext *avctx); HW_CONFIG_HWACCEL(1, 1, 1, VULKAN, VULKAN, ff_ ## codec ## _vulkan_hwaccel) #define HWACCEL_D3D11VA(codec) \ HW_CONFIG_HWACCEL(0, 0, 1, D3D11VA_VLD, NONE, ff_ ## codec ## _d3d11va_hwaccel) -+#define HWACCEL_TX1(codec) \ -+ HW_CONFIG_HWACCEL(1, 1, 0, TX1, TX1, ff_ ## codec ## _tx1_hwaccel) ++#define HWACCEL_NVTEGRA(codec) \ ++ HW_CONFIG_HWACCEL(1, 1, 0, NVTEGRA, NVTEGRA, ff_ ## codec ## _nvtegra_hwaccel) #define HW_CONFIG_ENCODER(device, frames, ad_hoc, format, device_type_) \ &(const AVCodecHWConfigInternal) { \ diff --git a/libavcodec/mjpegdec.c b/libavcodec/mjpegdec.c -index 8676155ecf..322064445c 100644 +index 8676155ecf..f99f96b9a7 100644 --- a/libavcodec/mjpegdec.c +++ b/libavcodec/mjpegdec.c @@ -733,6 +733,9 @@ int ff_mjpeg_decode_sof(MJpegDecodeContext *s) @@ -431,8 +431,8 @@ index 8676155ecf..322064445c 100644 #if CONFIG_MJPEG_VAAPI_HWACCEL AV_PIX_FMT_VAAPI, +#endif -+#if CONFIG_MJPEG_TX1_HWACCEL -+ AV_PIX_FMT_TX1, ++#if CONFIG_MJPEG_NVTEGRA_HWACCEL ++ AV_PIX_FMT_NVTEGRA, #endif s->avctx->pix_fmt, AV_PIX_FMT_NONE, @@ -441,13 +441,13 @@ index 8676155ecf..322064445c 100644 #if CONFIG_MJPEG_VAAPI_HWACCEL HWACCEL_VAAPI(mjpeg), +#endif -+#if CONFIG_MJPEG_TX1_HWACCEL -+ HWACCEL_TX1(mjpeg), ++#if CONFIG_MJPEG_NVTEGRA_HWACCEL ++ HWACCEL_NVTEGRA(mjpeg), #endif NULL }, diff --git a/libavcodec/mpeg12dec.c b/libavcodec/mpeg12dec.c -index 5dac83ebcd..644aa7f390 100644 +index 5dac83ebcd..ec50843e79 100644 --- a/libavcodec/mpeg12dec.c +++ b/libavcodec/mpeg12dec.c @@ -1096,6 +1096,9 @@ static const enum AVPixelFormat mpeg1_hwaccel_pixfmt_list_420[] = { @@ -455,8 +455,8 @@ index 5dac83ebcd..644aa7f390 100644 #if CONFIG_MPEG1_VDPAU_HWACCEL AV_PIX_FMT_VDPAU, +#endif -+#if CONFIG_MPEG1_TX1_HWACCEL -+ AV_PIX_FMT_TX1, ++#if CONFIG_MPEG1_NVTEGRA_HWACCEL ++ AV_PIX_FMT_NVTEGRA, #endif AV_PIX_FMT_YUV420P, AV_PIX_FMT_NONE @@ -465,8 +465,8 @@ index 5dac83ebcd..644aa7f390 100644 #if CONFIG_MPEG2_VIDEOTOOLBOX_HWACCEL AV_PIX_FMT_VIDEOTOOLBOX, +#endif -+#if CONFIG_MPEG2_TX1_HWACCEL -+ AV_PIX_FMT_TX1, ++#if CONFIG_MPEG2_NVTEGRA_HWACCEL ++ AV_PIX_FMT_NVTEGRA, #endif AV_PIX_FMT_YUV420P, AV_PIX_FMT_NONE @@ -475,8 +475,8 @@ index 5dac83ebcd..644aa7f390 100644 #if CONFIG_MPEG1_VIDEOTOOLBOX_HWACCEL HWACCEL_VIDEOTOOLBOX(mpeg1), +#endif -+#if CONFIG_MPEG1_TX1_HWACCEL -+ HWACCEL_TX1(mpeg1), ++#if CONFIG_MPEG1_NVTEGRA_HWACCEL ++ HWACCEL_NVTEGRA(mpeg1), #endif NULL }, @@ -485,13 +485,13 @@ index 5dac83ebcd..644aa7f390 100644 #if CONFIG_MPEG2_VIDEOTOOLBOX_HWACCEL HWACCEL_VIDEOTOOLBOX(mpeg2), +#endif -+#if CONFIG_MPEG2_TX1_HWACCEL -+ HWACCEL_TX1(mpeg2), ++#if CONFIG_MPEG2_NVTEGRA_HWACCEL ++ HWACCEL_NVTEGRA(mpeg2), #endif NULL }, diff --git a/libavcodec/mpeg4videodec.c b/libavcodec/mpeg4videodec.c -index 97aec68981..0ab31058ed 100644 +index 97aec68981..fe65ecb7df 100644 --- a/libavcodec/mpeg4videodec.c +++ b/libavcodec/mpeg4videodec.c @@ -3887,6 +3887,9 @@ const FFCodec ff_mpeg4_decoder = { @@ -499,16 +499,16 @@ index 97aec68981..0ab31058ed 100644 #if CONFIG_MPEG4_VIDEOTOOLBOX_HWACCEL HWACCEL_VIDEOTOOLBOX(mpeg4), +#endif -+#if CONFIG_MPEG4_TX1_HWACCEL -+ HWACCEL_TX1(mpeg4), ++#if CONFIG_MPEG4_NVTEGRA_HWACCEL ++ HWACCEL_NVTEGRA(mpeg4), #endif NULL }, -diff --git a/libavcodec/tx1_decode.c b/libavcodec/tx1_decode.c +diff --git a/libavcodec/nvtegra_decode.c b/libavcodec/nvtegra_decode.c new file mode 100644 -index 0000000000..2aa356ef98 +index 0000000000..74a9ba83d9 --- /dev/null -+++ b/libavcodec/tx1_decode.c ++++ b/libavcodec/nvtegra_decode.c @@ -0,0 +1,414 @@ +/* + * Copyright (c) 2023 averne @@ -531,8 +531,8 @@ index 0000000000..2aa356ef98 + */ + +#include "libavutil/hwcontext.h" -+#include "libavutil/hwcontext_tx1.h" -+#include "libavutil/tx1_host1x.h" ++#include "libavutil/hwcontext_nvtegra.h" ++#include "libavutil/nvtegra_host1x.h" +#include "libavutil/pixdesc.h" +#include "libavutil/pixfmt.h" +#include "libavutil/intreadwrite.h" @@ -540,24 +540,24 @@ index 0000000000..2aa356ef98 +#include "avcodec.h" +#include "internal.h" +#include "decode.h" -+#include "tx1_decode.h" ++#include "nvtegra_decode.h" + -+static void tx1_input_map_free(void *opaque, uint8_t *data) { -+ AVTX1Map *map = (AVTX1Map *)data; ++static void nvtegra_input_map_free(void *opaque, uint8_t *data) { ++ AVNVTegraMap *map = (AVNVTegraMap *)data; + + if (!data) + return; + -+ ff_tx1_map_destroy(map); ++ ff_nvtegra_map_destroy(map); + + av_freep(&map); +} + -+static AVBufferRef *tx1_input_map_alloc(void *opaque, size_t size) { -+ TX1DecodeContext *ctx = opaque; ++static AVBufferRef *nvtegra_input_map_alloc(void *opaque, size_t size) { ++ NVTegraDecodeContext *ctx = opaque; + -+ AVBufferRef *buffer; -+ AVTX1Map *map; ++ AVBufferRef *buffer; ++ AVNVTegraMap *map; + int err; + + map = av_mallocz(sizeof(*map)); @@ -568,12 +568,12 @@ index 0000000000..2aa356ef98 + map->owner = ctx->channel->channel.fd; +#endif + -+ err = ff_tx1_map_create(map, ctx->input_map_size, -+ 0x100, NVMAP_CACHE_OP_INV); ++ err = ff_nvtegra_map_create(map, ctx->input_map_size, ++ 0x100, NVMAP_CACHE_OP_INV); + if (err < 0) + return NULL; + -+ buffer = av_buffer_create((uint8_t *)map, sizeof(map), tx1_input_map_free, ctx, 0); ++ buffer = av_buffer_create((uint8_t *)map, sizeof(*map), nvtegra_input_map_free, ctx, 0); + if (!buffer) + goto fail; + @@ -583,19 +583,19 @@ index 0000000000..2aa356ef98 + +fail: + av_log(ctx, AV_LOG_ERROR, "Failed to create buffer\n"); -+ ff_tx1_map_destroy(map); ++ ff_nvtegra_map_destroy(map); + av_freep(map); + return NULL; +} + -+int ff_tx1_decode_init(AVCodecContext *avctx, TX1DecodeContext *ctx) { -+ AVHWFramesContext *frames_ctx; -+ AVHWDeviceContext *hw_device_ctx; -+ AVTX1DeviceContext *device_hwctx; ++int ff_nvtegra_decode_init(AVCodecContext *avctx, NVTegraDecodeContext *ctx) { ++ AVHWFramesContext *frames_ctx; ++ AVHWDeviceContext *hw_device_ctx; ++ AVNVTegraDeviceContext *device_hwctx; + + int err; + -+ err = ff_decode_get_hw_frames_ctx(avctx, AV_HWDEVICE_TYPE_TX1); ++ err = ff_decode_get_hw_frames_ctx(avctx, AV_HWDEVICE_TYPE_NVTEGRA); + if (err < 0) + goto fail; + @@ -612,8 +612,8 @@ index 0000000000..2aa356ef98 + goto fail; + } + -+ ctx->decoder_pool = av_buffer_pool_init2(sizeof(AVTX1Map), ctx, -+ tx1_input_map_alloc, NULL); ++ ctx->decoder_pool = av_buffer_pool_init2(sizeof(AVNVTegraMap), ctx, ++ nvtegra_input_map_alloc, NULL); + if (!ctx->decoder_pool) { + err = AVERROR(ENOMEM); + goto fail; @@ -621,23 +621,23 @@ index 0000000000..2aa356ef98 + + ctx->channel = !ctx->is_nvjpg ? &device_hwctx->nvdec_channel : &device_hwctx->nvjpg_channel; + -+ err = ff_tx1_cmdbuf_init(&ctx->cmdbuf); ++ err = ff_nvtegra_cmdbuf_init(&ctx->cmdbuf); + if (err < 0) + goto fail; + -+ err = ff_tx1_dfs_init(hw_device_ctx, ctx->channel, avctx->coded_width, avctx->coded_height, -+ av_q2d(avctx->framerate)); ++ err = ff_nvtegra_dfs_init(hw_device_ctx, ctx->channel, avctx->coded_width, avctx->coded_height, ++ av_q2d(avctx->framerate)); + if (err < 0) + goto fail; + + return 0; + +fail: -+ ff_tx1_decode_uninit(avctx, ctx); ++ ff_nvtegra_decode_uninit(avctx, ctx); + return err; +} + -+int ff_tx1_decode_uninit(AVCodecContext *avctx, TX1DecodeContext *ctx) { ++int ff_nvtegra_decode_uninit(AVCodecContext *avctx, NVTegraDecodeContext *ctx) { + AVHWFramesContext *frames_ctx = (AVHWFramesContext *)avctx->hw_frames_ctx->data; + AVHWDeviceContext *hw_device_ctx = (AVHWDeviceContext *)frames_ctx->device_ref->data; + @@ -645,32 +645,32 @@ index 0000000000..2aa356ef98 + + av_buffer_unref(&ctx->hw_device_ref); + -+ ff_tx1_cmdbuf_deinit(&ctx->cmdbuf); ++ ff_nvtegra_cmdbuf_deinit(&ctx->cmdbuf); + -+ ff_tx1_dfs_uninit(hw_device_ctx, ctx->channel); ++ ff_nvtegra_dfs_uninit(hw_device_ctx, ctx->channel); + + return 0; +} + -+static void tx1_fdd_priv_free(void *priv) { -+ TX1Frame *tf = priv; -+ TX1DecodeContext *ctx = tf->ctx; ++static void nvtegra_fdd_priv_free(void *priv) { ++ NVTegraFrame *tf = priv; ++ NVTegraDecodeContext *ctx = tf->ctx; + + if (!tf) + return; + + if (tf->in_flight) -+ ff_tx1_syncpt_wait(ctx->channel, tf->fence, -1); ++ ff_nvtegra_syncpt_wait(ctx->channel, tf->fence, -1); + + av_buffer_unref(&tf->input_map_ref); + av_freep(&tf); +} + -+int ff_tx1_wait_decode(void *logctx, AVFrame *frame) { ++int ff_nvtegra_wait_decode(void *logctx, AVFrame *frame) { + FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ TX1DecodeContext *ctx = tf->ctx; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ NVTegraDecodeContext *ctx = tf->ctx; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + AVHWDeviceContext *hw_device_ctx = (AVHWDeviceContext *)ctx->hw_device_ref->data; + + nvdec_status_s *nvdec_status; @@ -682,9 +682,9 @@ index 0000000000..2aa356ef98 + if (!tf->in_flight) + return 0; + -+ mem = ff_tx1_map_get_addr(input_map); ++ mem = ff_nvtegra_map_get_addr(input_map); + -+ err = ff_tx1_syncpt_wait(ctx->channel, tf->fence, -1); ++ err = ff_nvtegra_syncpt_wait(ctx->channel, tf->fence, -1); + if (err < 0) + return err; + @@ -705,17 +705,17 @@ index 0000000000..2aa356ef98 + } + + /* Decode time in µs: decode_cycles * 1000000 / ctx->channel->clock */ -+ err = ff_tx1_dfs_update(hw_device_ctx, ctx->channel, tf->bitstream_len, decode_cycles); ++ err = ff_nvtegra_dfs_update(hw_device_ctx, ctx->channel, tf->bitstream_len, decode_cycles); + if (err < 0) + return err; + + return 0; +} + -+int ff_tx1_start_frame(AVCodecContext *avctx, AVFrame *frame, TX1DecodeContext *ctx) { ++int ff_nvtegra_start_frame(AVCodecContext *avctx, AVFrame *frame, NVTegraDecodeContext *ctx) { + FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; + -+ TX1Frame *tf = NULL; ++ NVTegraFrame *tf = NULL; + int err; + + ctx->bitstream_len = ctx->num_slices = 0; @@ -724,9 +724,9 @@ index 0000000000..2aa356ef98 + /* + * For interlaced video, both fields use the same fdd, + * however by proceeding we might overwrite the input buffer -+ * during the decoding, so wait for the previous operation to complete ++ * during the decoding, so wait for the previous operation to complete. + */ -+ err = ff_tx1_wait_decode(avctx, frame); ++ err = ff_nvtegra_wait_decode(avctx, frame); + if (err < 0) + return err; + } else { @@ -735,8 +735,8 @@ index 0000000000..2aa356ef98 + return AVERROR(ENOMEM); + + fdd->hwaccel_priv = tf; -+ fdd->hwaccel_priv_free = tx1_fdd_priv_free; -+ fdd->post_process = ff_tx1_wait_decode; ++ fdd->hwaccel_priv_free = nvtegra_fdd_priv_free; ++ fdd->post_process = ff_nvtegra_wait_decode; + + tf->ctx = ctx; + @@ -750,43 +750,43 @@ index 0000000000..2aa356ef98 + tf = fdd->hwaccel_priv; + tf->in_flight = false; + -+ err = ff_tx1_cmdbuf_add_memory(&ctx->cmdbuf, (AVTX1Map *)tf->input_map_ref->data, -+ ctx->cmdbuf_off, ctx->max_cmdbuf_size); ++ err = ff_nvtegra_cmdbuf_add_memory(&ctx->cmdbuf, (AVNVTegraMap *)tf->input_map_ref->data, ++ ctx->cmdbuf_off, ctx->max_cmdbuf_size); + if (err < 0) + return err; + -+ err = ff_tx1_cmdbuf_clear(&ctx->cmdbuf); ++ err = ff_nvtegra_cmdbuf_clear(&ctx->cmdbuf); + if (err < 0) + return err; + + return 0; + +fail: -+ tx1_fdd_priv_free(tf); ++ nvtegra_fdd_priv_free(tf); + return err; +} + -+int ff_tx1_decode_slice(AVCodecContext *avctx, AVFrame *frame, const uint8_t *buf, uint32_t buf_size, -+ bool add_startcode) ++int ff_nvtegra_decode_slice(AVCodecContext *avctx, AVFrame *frame, ++ const uint8_t *buf, uint32_t buf_size, bool add_startcode) +{ -+ TX1DecodeContext *ctx = avctx->internal->hwaccel_priv_data; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ NVTegraDecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + + bool need_bitstream_move; + uint32_t old_bitstream_off, startcode_size; + uint8_t *mem; + int err; + -+ mem = ff_tx1_map_get_addr(input_map); ++ mem = ff_nvtegra_map_get_addr(input_map); + + startcode_size = add_startcode ? 3 : 0; + + /* Reserve 16 bytes for the termination sequence */ + if (ctx->bitstream_len + buf_size + startcode_size >= ctx->max_bitstream_size - 16) { + ctx->input_map_size += ctx->max_bitstream_size + buf_size; -+ ctx->input_map_size = FFALIGN(ctx->input_map_size, 0x1000); ++ ctx->input_map_size = FFALIGN(ctx->input_map_size, 0x1000); + + ctx->max_bitstream_size = ctx->input_map_size - ctx->bitstream_off; + @@ -796,7 +796,7 @@ index 0000000000..2aa356ef98 + /* Reserve 4 bytes for the bitstream size */ + if (ctx->max_num_slices && ctx->num_slices >= ctx->max_num_slices - 1) { + ctx->input_map_size += ctx->max_num_slices * sizeof(uint32_t); -+ ctx->input_map_size = FFALIGN(ctx->input_map_size, 0x1000); ++ ctx->input_map_size = FFALIGN(ctx->input_map_size, 0x1000); + + ctx->max_num_slices *= 2; + @@ -806,15 +806,15 @@ index 0000000000..2aa356ef98 + need_bitstream_move = true; + } + -+ if (ctx->input_map_size != ff_tx1_map_get_size(input_map)) { -+ err = ff_tx1_map_realloc(input_map, ctx->input_map_size, 0x100, NVMAP_CACHE_OP_INV); ++ if (ctx->input_map_size != ff_nvtegra_map_get_size(input_map)) { ++ err = ff_nvtegra_map_realloc(input_map, ctx->input_map_size, 0x100, NVMAP_CACHE_OP_INV); + if (err < 0) + return err; + -+ mem = ff_tx1_map_get_addr(input_map); ++ mem = ff_nvtegra_map_get_addr(input_map); + -+ err = ff_tx1_cmdbuf_add_memory(&ctx->cmdbuf, input_map, -+ ctx->cmdbuf_off, ctx->max_cmdbuf_size); ++ err = ff_nvtegra_cmdbuf_add_memory(&ctx->cmdbuf, input_map, ++ ctx->cmdbuf_off, ctx->max_cmdbuf_size); + if (err < 0) + return err; + @@ -840,17 +840,17 @@ index 0000000000..2aa356ef98 + return 0; +} + -+int ff_tx1_end_frame(AVCodecContext *avctx, AVFrame *frame, TX1DecodeContext *ctx, -+ const uint8_t *end_sequence, int end_sequence_size) ++int ff_nvtegra_end_frame(AVCodecContext *avctx, AVFrame *frame, NVTegraDecodeContext *ctx, ++ const uint8_t *end_sequence, int end_sequence_size) +{ -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + + uint8_t *mem; + int err; + -+ mem = ff_tx1_map_get_addr(input_map); ++ mem = ff_nvtegra_map_get_addr(input_map); + + /* Last slice data range */ + if (ctx->max_num_slices) @@ -861,29 +861,29 @@ index 0000000000..2aa356ef98 + memcpy(mem + ctx->bitstream_off + ctx->bitstream_len, end_sequence, end_sequence_size); + + /* Insert syncpt increment to signal the end of the decoding */ -+ err = ff_tx1_cmdbuf_begin(&ctx->cmdbuf, !ctx->is_nvjpg ? HOST1X_CLASS_NVDEC : HOST1X_CLASS_NVJPG); ++ err = ff_nvtegra_cmdbuf_begin(&ctx->cmdbuf, !ctx->is_nvjpg ? HOST1X_CLASS_NVDEC : HOST1X_CLASS_NVJPG); + if (err < 0) + return err; + -+ err = ff_tx1_cmdbuf_push_word(&ctx->cmdbuf, host1x_opcode_nonincr(NV_THI_INCR_SYNCPT, 1)); ++ err = ff_nvtegra_cmdbuf_push_word(&ctx->cmdbuf, host1x_opcode_nonincr(NV_THI_INCR_SYNCPT, 1)); + if (err < 0) + return err; + -+ err = ff_tx1_cmdbuf_push_word(&ctx->cmdbuf, -+ FF_TX1_VALUE(NV_THI_INCR_SYNCPT, INDX, ctx->channel->syncpt) | -+ FF_TX1_ENUM (NV_THI_INCR_SYNCPT, COND, OP_DONE)); ++ err = ff_nvtegra_cmdbuf_push_word(&ctx->cmdbuf, ++ FF_NVTEGRA_VALUE(NV_THI_INCR_SYNCPT, INDX, ctx->channel->syncpt) | ++ FF_NVTEGRA_ENUM (NV_THI_INCR_SYNCPT, COND, OP_DONE)); + if (err < 0) + return err; + -+ err = ff_tx1_cmdbuf_end(&ctx->cmdbuf); ++ err = ff_nvtegra_cmdbuf_end(&ctx->cmdbuf); + if (err < 0) + return err; + -+ err = ff_tx1_cmdbuf_add_syncpt_incr(&ctx->cmdbuf, ctx->channel->syncpt, 1, 0); ++ err = ff_nvtegra_cmdbuf_add_syncpt_incr(&ctx->cmdbuf, ctx->channel->syncpt, 1, 0); + if (err < 0) + return err; + -+ err = ff_tx1_channel_submit(ctx->channel, &ctx->cmdbuf, &tf->fence); ++ err = ff_nvtegra_channel_submit(ctx->channel, &ctx->cmdbuf, &tf->fence); + if (err < 0) + return err; + @@ -897,11 +897,11 @@ index 0000000000..2aa356ef98 + return 0; +} + -+int ff_tx1_frame_params(AVCodecContext *avctx, AVBufferRef *hw_frames_ctx) { ++int ff_nvtegra_frame_params(AVCodecContext *avctx, AVBufferRef *hw_frames_ctx) { + AVHWFramesContext *frames_ctx = (AVHWFramesContext *)hw_frames_ctx->data; + const AVPixFmtDescriptor *sw_desc; + -+ frames_ctx->format = AV_PIX_FMT_TX1; ++ frames_ctx->format = AV_PIX_FMT_NVTEGRA; + frames_ctx->width = FFALIGN(avctx->coded_width, 2); /* NVDEC only supports even sizes */ + frames_ctx->height = FFALIGN(avctx->coded_height, 2); + @@ -924,11 +924,11 @@ index 0000000000..2aa356ef98 + + return 0; +} -diff --git a/libavcodec/tx1_decode.h b/libavcodec/tx1_decode.h +diff --git a/libavcodec/nvtegra_decode.h b/libavcodec/nvtegra_decode.h new file mode 100644 -index 0000000000..596806f194 +index 0000000000..4f435b350b --- /dev/null -+++ b/libavcodec/tx1_decode.h ++++ b/libavcodec/nvtegra_decode.h @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2023 averne @@ -950,29 +950,29 @@ index 0000000000..596806f194 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + -+#ifndef AVCODEC_TX1_H -+#define AVCODEC_TX1_H ++#ifndef AVCODEC_NVTEGRA_H ++#define AVCODEC_NVTEGRA_H + +#include + +#include "avcodec.h" -+#include "libavutil/hwcontext_tx1.h" ++#include "libavutil/hwcontext_nvtegra.h" + +#include "libavutil/nvdec_drv.h" +#include "libavutil/nvjpg_drv.h" +#include "libavutil/clc5b0.h" +#include "libavutil/cle7d0.h" + -+typedef struct TX1DecodeContext { ++typedef struct NVTegraDecodeContext { + uint64_t frame_idx; + + AVBufferRef *hw_device_ref; + AVBufferPool *decoder_pool; + + bool is_nvjpg; -+ AVTX1Channel *channel; ++ AVNVTegraChannel *channel; + -+ AVTX1Cmdbuf cmdbuf; ++ AVNVTegraCmdbuf cmdbuf; + + uint32_t pic_setup_off, status_off, cmdbuf_off, + bitstream_off, slice_offsets_off; @@ -983,17 +983,17 @@ index 0000000000..596806f194 + uint32_t bitstream_len; + + bool new_input_buffer; -+} TX1DecodeContext; ++} NVTegraDecodeContext; + -+typedef struct TX1Frame { -+ TX1DecodeContext *ctx; ++typedef struct NVTegraFrame { ++ NVTegraDecodeContext *ctx; + AVBufferRef *input_map_ref; + uint32_t fence; + uint32_t bitstream_len; + bool in_flight; -+} TX1Frame; ++} NVTegraFrame; + -+static inline size_t ff_tx1_decode_pick_bitstream_buffer_size(AVCodecContext *avctx) { ++static inline size_t ff_nvtegra_decode_pick_bitstream_buffer_size(AVCodecContext *avctx) { + /* + * Official software uses a static map of a predetermined size, usually around 0x600000 (6MiB). + * Our implementation supports dynamically resizing the input map, so be less conservative. @@ -1006,28 +1006,28 @@ index 0000000000..596806f194 + return 0x10000; /* 64KiB */ +} + -+static inline AVFrame *ff_tx1_safe_get_ref(AVFrame *ref, AVFrame *fallback) { ++static inline AVFrame *ff_nvtegra_safe_get_ref(AVFrame *ref, AVFrame *fallback) { + return (ref && ref->private_ref) ? ref : fallback; +} + -+int ff_tx1_decode_init(AVCodecContext *avctx, TX1DecodeContext *ctx); -+int ff_tx1_decode_uninit(AVCodecContext *avctx, TX1DecodeContext *ctx); -+int ff_tx1_start_frame(AVCodecContext *avctx, AVFrame *frame, TX1DecodeContext *ctx); -+int ff_tx1_decode_slice(AVCodecContext *avctx, AVFrame *frame, const uint8_t *buf, uint32_t buf_size, -+ bool add_startcode); -+int ff_tx1_end_frame(AVCodecContext *avctx, AVFrame *frame, TX1DecodeContext *ctx, -+ const uint8_t *end_sequence, int end_sequence_size); ++int ff_nvtegra_decode_init(AVCodecContext *avctx, NVTegraDecodeContext *ctx); ++int ff_nvtegra_decode_uninit(AVCodecContext *avctx, NVTegraDecodeContext *ctx); ++int ff_nvtegra_start_frame(AVCodecContext *avctx, AVFrame *frame, NVTegraDecodeContext *ctx); ++int ff_nvtegra_decode_slice(AVCodecContext *avctx, AVFrame *frame, ++ const uint8_t *buf, uint32_t buf_size, bool add_startcode); ++int ff_nvtegra_end_frame(AVCodecContext *avctx, AVFrame *frame, NVTegraDecodeContext *ctx, ++ const uint8_t *end_sequence, int end_sequence_size); + -+int ff_tx1_wait_decode(void *logctx, AVFrame *frame); ++int ff_nvtegra_wait_decode(void *logctx, AVFrame *frame); + -+int ff_tx1_frame_params(AVCodecContext *avctx, AVBufferRef *hw_frames_ctx); ++int ff_nvtegra_frame_params(AVCodecContext *avctx, AVBufferRef *hw_frames_ctx); + -+#endif /* AVCODEC_TX1_H */ -diff --git a/libavcodec/tx1_h264.c b/libavcodec/tx1_h264.c ++#endif /* AVCODEC_NVTEGRA_H */ +diff --git a/libavcodec/nvtegra_h264.c b/libavcodec/nvtegra_h264.c new file mode 100644 -index 0000000000..ae7bd77347 +index 0000000000..69596b1c55 --- /dev/null -+++ b/libavcodec/tx1_h264.c ++++ b/libavcodec/nvtegra_h264.c @@ -0,0 +1,511 @@ +/* + * Copyright (c) 2023 averne @@ -1060,20 +1060,20 @@ index 0000000000..ae7bd77347 +#include "hwconfig.h" +#include "h264dec.h" +#include "decode.h" -+#include "tx1_decode.h" ++#include "nvtegra_decode.h" + +#include "libavutil/pixdesc.h" -+#include "libavutil/tx1_host1x.h" ++#include "libavutil/nvtegra_host1x.h" + -+typedef struct TX1H264DecodeContext { -+ TX1DecodeContext core; ++typedef struct NVTegraH264DecodeContext { ++ NVTegraDecodeContext core; + -+ AVTX1Map common_map; ++ AVNVTegraMap common_map; + uint32_t coloc_off, mbhist_off, history_off; + uint32_t mbhist_size, history_size; + -+ struct TX1H264RefFrame { -+ AVTX1Map *map; ++ struct NVTegraH264RefFrame { ++ AVNVTegraMap *map; + uint32_t chroma_off; + int16_t frame_num; + int16_t pic_id; @@ -1083,7 +1083,7 @@ index 0000000000..ae7bd77347 + pic_id_map[16+1], scratch_ref, cur_frame; + + uint64_t refs_mask, ordered_dpb_mask, pic_id_mask; -+} TX1H264DecodeContext; ++} NVTegraH264DecodeContext; + +/* Size (width, height) of a macroblock */ +#define MB_SIZE 16 @@ -1092,31 +1092,31 @@ index 0000000000..ae7bd77347 + 0x00, 0x00, 0x01, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0b, 0x00, 0x00, 0x00, 0x00, +}; + -+static int tx1_h264_decode_uninit(AVCodecContext *avctx) { -+ TX1H264DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_h264_decode_uninit(AVCodecContext *avctx) { ++ NVTegraH264DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Deinitializing TX1 H264 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Deinitializing NVTEGRA H264 decoder\n"); + -+ err = ff_tx1_map_destroy(&ctx->common_map); ++ err = ff_nvtegra_map_destroy(&ctx->common_map); + if (err < 0) + return err; + -+ err = ff_tx1_decode_uninit(avctx, &ctx->core); ++ err = ff_nvtegra_decode_uninit(avctx, &ctx->core); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_h264_decode_init(AVCodecContext *avctx) { -+ H264Context *h = avctx->priv_data; -+ const SPS *sps = h->ps.sps; -+ TX1H264DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_h264_decode_init(AVCodecContext *avctx) { ++ H264Context *h = avctx->priv_data; ++ const SPS *sps = h->ps.sps; ++ NVTegraH264DecodeContext *ctx = avctx->internal->hwaccel_priv_data; +#ifdef __SWITCH__ -+ AVHWDeviceContext *hw_device_ctx; -+ AVTX1DeviceContext *device_hwctx; ++ AVHWDeviceContext *hw_device_ctx; ++ AVNVTegraDeviceContext *device_hwctx; +#endif + + uint32_t aligned_width, aligned_height, @@ -1124,7 +1124,7 @@ index 0000000000..ae7bd77347 + coloc_size, mbhist_size, history_size, common_map_size; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Initializing TX1 H264 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Initializing NVTEGRA H264 decoder\n"); + + aligned_width = FFALIGN(avctx->coded_width, MB_SIZE); + aligned_height = FFALIGN(avctx->coded_height, MB_SIZE); @@ -1136,21 +1136,21 @@ index 0000000000..ae7bd77347 + /* Ignored: histogram map, size 0x400 */ + ctx->core.pic_setup_off = 0; + ctx->core.status_off = FFALIGN(ctx->core.pic_setup_off + sizeof(nvdec_h264_pic_s), -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.cmdbuf_off = FFALIGN(ctx->core.status_off + sizeof(nvdec_status_s), -+ FF_TX1_MAP_ALIGN); -+ ctx->core.slice_offsets_off = FFALIGN(ctx->core.cmdbuf_off + 3*FF_TX1_MAP_ALIGN, -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.slice_offsets_off = FFALIGN(ctx->core.cmdbuf_off + 3*FF_NVTEGRA_MAP_ALIGN, ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.bitstream_off = FFALIGN(ctx->core.slice_offsets_off + num_slices * sizeof(uint32_t), -+ FF_TX1_MAP_ALIGN); -+ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_tx1_decode_pick_bitstream_buffer_size(avctx), ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_nvtegra_decode_pick_bitstream_buffer_size(avctx), + 0x1000); + + ctx->core.max_cmdbuf_size = ctx->core.slice_offsets_off - ctx->core.cmdbuf_off; + ctx->core.max_num_slices = (ctx->core.bitstream_off - ctx->core.slice_offsets_off) / sizeof(uint32_t); + ctx->core.max_bitstream_size = ctx->core.input_map_size - ctx->core.bitstream_off; + -+ err = ff_tx1_decode_init(avctx, &ctx->core); ++ err = ff_nvtegra_decode_init(avctx, &ctx->core); + if (err < 0) + goto fail; + @@ -1160,8 +1160,8 @@ index 0000000000..ae7bd77347 + history_size = FFALIGN(width_in_mbs * 0x200 + 0x1100, 0x200); + + ctx->coloc_off = 0; -+ ctx->mbhist_off = FFALIGN(ctx->coloc_off + coloc_size, FF_TX1_MAP_ALIGN); -+ ctx->history_off = FFALIGN(ctx->mbhist_off + mbhist_size, FF_TX1_MAP_ALIGN); ++ ctx->mbhist_off = FFALIGN(ctx->coloc_off + coloc_size, FF_NVTEGRA_MAP_ALIGN); ++ ctx->history_off = FFALIGN(ctx->mbhist_off + mbhist_size, FF_NVTEGRA_MAP_ALIGN); + common_map_size = FFALIGN(ctx->history_off + history_size, 0x1000); + +#ifdef __SWITCH__ @@ -1171,7 +1171,7 @@ index 0000000000..ae7bd77347 + ctx->common_map.owner = device_hwctx->nvdec_channel.channel.fd; +#endif + -+ err = ff_tx1_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); ++ err = ff_nvtegra_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); + if (err < 0) + goto fail; + @@ -1184,7 +1184,7 @@ index 0000000000..ae7bd77347 + return 0; + +fail: -+ tx1_h264_decode_uninit(avctx); ++ nvtegra_h264_decode_uninit(avctx); + return err; +} + @@ -1225,8 +1225,8 @@ index 0000000000..ae7bd77347 + return slot; +} + -+static void tx1_h264_prepare_frame_setup(nvdec_h264_pic_s *setup, H264Context *h, -+ TX1H264DecodeContext *ctx) ++static void nvtegra_h264_prepare_frame_setup(nvdec_h264_pic_s *setup, H264Context *h, ++ NVTegraH264DecodeContext *ctx) +{ + const PPS *pps = h->ps.pps; + const SPS *sps = h->ps.sps; @@ -1313,7 +1313,7 @@ index 0000000000..ae7bd77347 + continue; + + for (j = 0; j < dpb_size; ++j) { -+ if (ff_tx1_frame_get_fbuf_map(refs[j]->f) == ctx->refs[i].map) ++ if (ff_nvtegra_frame_get_fbuf_map(refs[j]->f) == ctx->refs[i].map) + break; + } + @@ -1353,15 +1353,15 @@ index 0000000000..ae7bd77347 + } + + /* In the case of interlaced video, the new frame can be the same as the last */ -+ if (ctx->refs[ctx->cur_frame].map != ff_tx1_frame_get_fbuf_map(h->cur_pic_ptr->f)) { ++ if (ctx->refs[ctx->cur_frame].map != ff_nvtegra_frame_get_fbuf_map(h->cur_pic_ptr->f)) { + /* Allocate a pic id for the current frame */ + i = find_slot(&ctx->pic_id_mask); + + /* Insert it in our ref list */ + ctx->cur_frame = find_slot(&ctx->refs_mask); + ctx->pic_id_map[i] = ctx->cur_frame; -+ ctx->refs[ctx->cur_frame] = (struct TX1H264RefFrame){ -+ .map = ff_tx1_frame_get_fbuf_map(h->cur_pic_ptr->f), ++ ctx->refs[ctx->cur_frame] = (struct NVTegraH264RefFrame){ ++ .map = ff_nvtegra_frame_get_fbuf_map(h->cur_pic_ptr->f), + .chroma_off = h->cur_pic_ptr->f->data[1] - h->cur_pic_ptr->f->data[0], + .frame_num = h->cur_pic_ptr->frame_num, + .pic_id = i, @@ -1393,49 +1393,49 @@ index 0000000000..ae7bd77347 + memcpy(setup->WeightScale8x8[1], pps->scaling_matrix8[3], sizeof(setup->WeightScale8x8[1])); +} + -+static int tx1_h264_prepare_cmdbuf(AVTX1Cmdbuf *cmdbuf, H264Context *h, -+ AVFrame *cur_frame, TX1H264DecodeContext *ctx) ++static int nvtegra_h264_prepare_cmdbuf(AVNVTegraCmdbuf *cmdbuf, H264Context *h, ++ AVFrame *cur_frame, NVTegraH264DecodeContext *ctx) +{ -+ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + + int err, i; + -+ err = ff_tx1_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); ++ err = ff_nvtegra_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); + if (err < 0) + return err; + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, -+ FF_TX1_ENUM(NVC5B0_SET_APPLICATION_ID, ID, H264)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, -+ FF_TX1_ENUM (NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, H264) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, -+ FF_TX1_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, -+ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, -+ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_SLICE_OFFSETS_BUF_OFFSET, -+ input_map, ctx->core.slice_offsets_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, -+ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_COLOC_DATA_OFFSET, -+ &ctx->common_map, ctx->coloc_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_H264_SET_MBHIST_BUF_OFFSET, -+ &ctx->common_map, ctx->mbhist_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_HISTORY_OFFSET, -+ &ctx->common_map, ctx->history_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+#define PUSH_FRAME(ref, offset) ({ \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ -+ ref.map, 0, NVHOST_RELOC_TYPE_DEFAULT); \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ -+ ref.map, ref.chroma_off, NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, ++ FF_NVTEGRA_ENUM(NVC5B0_SET_APPLICATION_ID, ID, H264)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, ++ FF_NVTEGRA_ENUM (NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, H264) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, ++ FF_NVTEGRA_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, ++ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, ++ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_SLICE_OFFSETS_BUF_OFFSET, ++ input_map, ctx->core.slice_offsets_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, ++ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_COLOC_DATA_OFFSET, ++ &ctx->common_map, ctx->coloc_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_H264_SET_MBHIST_BUF_OFFSET, ++ &ctx->common_map, ctx->mbhist_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_HISTORY_OFFSET, ++ &ctx->common_map, ctx->history_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++#define PUSH_FRAME(ref, offset) ({ \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ ++ ref.map, 0, NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ ++ ref.map, ref.chroma_off, NVHOST_RELOC_TYPE_DEFAULT); \ +}) + + for (i = 0; i < 16 + 1; ++i) { @@ -1447,105 +1447,105 @@ index 0000000000..ae7bd77347 + PUSH_FRAME(ctx->refs[ctx->scratch_ref], i); + } + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, -+ FF_TX1_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, ++ FF_NVTEGRA_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); + -+ err = ff_tx1_cmdbuf_end(cmdbuf); ++ err = ff_nvtegra_cmdbuf_end(cmdbuf); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_h264_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { -+ H264Context *h = avctx->priv_data; -+ AVFrame *frame = h->cur_pic_ptr->f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1H264DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_h264_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { ++ H264Context *h = avctx->priv_data; ++ AVFrame *frame = h->cur_pic_ptr->f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraH264DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + -+ TX1Frame *tf; -+ AVTX1Map *input_map; ++ NVTegraFrame *tf; ++ AVNVTegraMap *input_map; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Starting H264-TX1 frame with pixel format %s\n", ++ av_log(avctx, AV_LOG_DEBUG, "Starting H264-NVTEGRA frame with pixel format %s\n", + av_get_pix_fmt_name(avctx->sw_pix_fmt)); + -+ err = ff_tx1_start_frame(avctx, frame, &ctx->core); ++ err = ff_nvtegra_start_frame(avctx, frame, &ctx->core); + if (err < 0) + return err; + + tf = fdd->hwaccel_priv; -+ input_map = (AVTX1Map *)tf->input_map_ref->data; -+ mem = ff_tx1_map_get_addr(input_map); ++ input_map = (AVNVTegraMap *)tf->input_map_ref->data; ++ mem = ff_nvtegra_map_get_addr(input_map); + -+ tx1_h264_prepare_frame_setup((nvdec_h264_pic_s *)(mem + ctx->core.pic_setup_off), h, ctx); ++ nvtegra_h264_prepare_frame_setup((nvdec_h264_pic_s *)(mem + ctx->core.pic_setup_off), h, ctx); + + return 0; +} + -+static int tx1_h264_end_frame(AVCodecContext *avctx) { -+ H264Context *h = avctx->priv_data; -+ TX1H264DecodeContext *ctx = avctx->internal->hwaccel_priv_data; -+ AVFrame *frame = h->cur_pic_ptr->f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; ++static int nvtegra_h264_end_frame(AVCodecContext *avctx) { ++ H264Context *h = avctx->priv_data; ++ NVTegraH264DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ AVFrame *frame = h->cur_pic_ptr->f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; + + nvdec_h264_pic_s *setup; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Ending H264-TX1 frame with %u slices -> %u bytes\n", ++ av_log(avctx, AV_LOG_DEBUG, "Ending H264-NVTEGRA frame with %u slices -> %u bytes\n", + ctx->core.num_slices, ctx->core.bitstream_len); + + if (!tf || !ctx->core.num_slices) + return 0; + -+ mem = ff_tx1_map_get_addr((AVTX1Map *)tf->input_map_ref->data); ++ mem = ff_nvtegra_map_get_addr((AVNVTegraMap *)tf->input_map_ref->data); + + setup = (nvdec_h264_pic_s *)(mem + ctx->core.pic_setup_off); + setup->stream_len = ctx->core.bitstream_len + sizeof(bitstream_end_sequence); + setup->slice_count = ctx->core.num_slices; + -+ err = tx1_h264_prepare_cmdbuf(&ctx->core.cmdbuf, h, frame, ctx); ++ err = nvtegra_h264_prepare_cmdbuf(&ctx->core.cmdbuf, h, frame, ctx); + if (err < 0) + return err; + -+ return ff_tx1_end_frame(avctx, frame, &ctx->core, bitstream_end_sequence, -+ sizeof(bitstream_end_sequence)); ++ return ff_nvtegra_end_frame(avctx, frame, &ctx->core, bitstream_end_sequence, ++ sizeof(bitstream_end_sequence)); +} + -+static int tx1_h264_decode_slice(AVCodecContext *avctx, const uint8_t *buf, -+ uint32_t buf_size) ++static int nvtegra_h264_decode_slice(AVCodecContext *avctx, const uint8_t *buf, ++ uint32_t buf_size) +{ + H264Context *h = avctx->priv_data; + AVFrame *frame = h->cur_pic_ptr->f; + -+ return ff_tx1_decode_slice(avctx, frame, buf, buf_size, true); -+} -+ -+#if CONFIG_H264_TX1_HWACCEL -+const FFHWAccel ff_h264_tx1_hwaccel = { -+ .p.name = "h264_tx1", -+ .p.type = AVMEDIA_TYPE_VIDEO, -+ .p.id = AV_CODEC_ID_H264, -+ .p.pix_fmt = AV_PIX_FMT_TX1, -+ .start_frame = &tx1_h264_start_frame, -+ .end_frame = &tx1_h264_end_frame, -+ .decode_slice = &tx1_h264_decode_slice, -+ .init = &tx1_h264_decode_init, -+ .uninit = &tx1_h264_decode_uninit, -+ .frame_params = &ff_tx1_frame_params, -+ .priv_data_size = sizeof(TX1H264DecodeContext), -+ .caps_internal = HWACCEL_CAP_ASYNC_SAFE | HWACCEL_CAP_THREAD_SAFE, ++ return ff_nvtegra_decode_slice(avctx, frame, buf, buf_size, true); ++} ++ ++#if CONFIG_H264_NVTEGRA_HWACCEL ++const FFHWAccel ff_h264_nvtegra_hwaccel = { ++ .p.name = "h264_nvtegra", ++ .p.type = AVMEDIA_TYPE_VIDEO, ++ .p.id = AV_CODEC_ID_H264, ++ .p.pix_fmt = AV_PIX_FMT_NVTEGRA, ++ .start_frame = &nvtegra_h264_start_frame, ++ .end_frame = &nvtegra_h264_end_frame, ++ .decode_slice = &nvtegra_h264_decode_slice, ++ .init = &nvtegra_h264_decode_init, ++ .uninit = &nvtegra_h264_decode_uninit, ++ .frame_params = &ff_nvtegra_frame_params, ++ .priv_data_size = sizeof(NVTegraH264DecodeContext), ++ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; +#endif -diff --git a/libavcodec/tx1_hevc.c b/libavcodec/tx1_hevc.c +diff --git a/libavcodec/nvtegra_hevc.c b/libavcodec/nvtegra_hevc.c new file mode 100644 -index 0000000000..b46582a8cc +index 0000000000..3c6ee67acc --- /dev/null -+++ b/libavcodec/tx1_hevc.c -@@ -0,0 +1,631 @@ ++++ b/libavcodec/nvtegra_hevc.c +@@ -0,0 +1,632 @@ +/* + * Copyright (c) 2023 averne + * @@ -1575,15 +1575,15 @@ index 0000000000..b46582a8cc +#include "hevcdec.h" +#include "hevc_data.h" +#include "decode.h" -+#include "tx1_decode.h" ++#include "nvtegra_decode.h" + +#include "libavutil/pixdesc.h" -+#include "libavutil/tx1_host1x.h" ++#include "libavutil/nvtegra_host1x.h" + -+typedef struct TX1HEVCDecodeContext { -+ TX1DecodeContext core; ++typedef struct NVTegraHEVCDecodeContext { ++ NVTegraDecodeContext core; + -+ AVTX1Map common_map; ++ AVNVTegraMap common_map; + uint32_t tile_sizes_off, scaling_list_off, + coloc_off, filter_off; + @@ -1593,7 +1593,7 @@ index 0000000000..b46582a8cc + AVFrame *ordered_dpb[16+1]; + AVFrame *scratch_ref, *last_frame; + int last_iframe_slot; -+} TX1HEVCDecodeContext; ++} NVTegraHEVCDecodeContext; + +/* Size (width, height) of a macroblock */ +#define MB_SIZE 16 @@ -1605,55 +1605,55 @@ index 0000000000..b46582a8cc +#define SAO_SIZE 3840 +#define BSD_SIZE 60 + -+static int tx1_hevc_decode_uninit(AVCodecContext *avctx) { -+ TX1HEVCDecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_hevc_decode_uninit(AVCodecContext *avctx) { ++ NVTegraHEVCDecodeContext *ctx = avctx->internal->hwaccel_priv_data; + + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Deinitializing TX1 HEVC decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Deinitializing NVTEGRA HEVC decoder\n"); + -+ err = ff_tx1_map_destroy(&ctx->common_map); ++ err = ff_nvtegra_map_destroy(&ctx->common_map); + if (err < 0) + return err; + -+ err = ff_tx1_decode_uninit(avctx, &ctx->core); ++ err = ff_nvtegra_decode_uninit(avctx, &ctx->core); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_hevc_decode_init(AVCodecContext *avctx) { -+ TX1HEVCDecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_hevc_decode_init(AVCodecContext *avctx) { ++ NVTegraHEVCDecodeContext *ctx = avctx->internal->hwaccel_priv_data; +#ifdef __SWITCH__ -+ AVHWDeviceContext *hw_device_ctx; -+ AVTX1DeviceContext *device_hwctx; ++ AVHWDeviceContext *hw_device_ctx; ++ AVNVTegraDeviceContext *device_hwctx; +#endif + + uint32_t aligned_width, aligned_height, + coloc_size, filter_buffer_size, common_map_size; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Initializing TX1 HEVC decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Initializing NVTEGRA HEVC decoder\n"); + + ctx->core.pic_setup_off = 0; + ctx->core.status_off = FFALIGN(ctx->core.pic_setup_off + sizeof(nvdec_vp8_pic_s), -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.cmdbuf_off = FFALIGN(ctx->core.status_off + sizeof(nvdec_status_s), -+ FF_TX1_MAP_ALIGN); -+ ctx->tile_sizes_off = FFALIGN(ctx->core.cmdbuf_off + 3*FF_TX1_MAP_ALIGN, -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->tile_sizes_off = FFALIGN(ctx->core.cmdbuf_off + 3*FF_NVTEGRA_MAP_ALIGN, ++ FF_NVTEGRA_MAP_ALIGN); + ctx->scaling_list_off = FFALIGN(ctx->tile_sizes_off + 0x900, -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.bitstream_off = FFALIGN(ctx->scaling_list_off + 0x400, -+ FF_TX1_MAP_ALIGN); -+ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_tx1_decode_pick_bitstream_buffer_size(avctx), ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_nvtegra_decode_pick_bitstream_buffer_size(avctx), + 0x1000); + + ctx->core.max_cmdbuf_size = ctx->tile_sizes_off - ctx->core.cmdbuf_off; + ctx->core.max_bitstream_size = ctx->core.input_map_size - ctx->core.bitstream_off; + -+ err = ff_tx1_decode_init(avctx, &ctx->core); ++ err = ff_nvtegra_decode_init(avctx, &ctx->core); + if (err < 0) + goto fail; + @@ -1663,7 +1663,7 @@ index 0000000000..b46582a8cc + filter_buffer_size = (FILTER_SIZE + SAO_SIZE + BSD_SIZE) * aligned_height; + + ctx->coloc_off = 0; -+ ctx->filter_off = FFALIGN(ctx->coloc_off + coloc_size, FF_TX1_MAP_ALIGN); ++ ctx->filter_off = FFALIGN(ctx->coloc_off + coloc_size, FF_NVTEGRA_MAP_ALIGN); + common_map_size = FFALIGN(ctx->filter_off + filter_buffer_size, 0x1000); + +#ifdef __SWITCH__ @@ -1673,7 +1673,7 @@ index 0000000000..b46582a8cc + ctx->common_map.owner = device_hwctx->nvdec_channel.channel.fd; +#endif + -+ err = ff_tx1_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); ++ err = ff_nvtegra_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); + if (err < 0) + goto fail; + @@ -1686,11 +1686,11 @@ index 0000000000..b46582a8cc + return 0; + +fail: -+ tx1_hevc_decode_uninit(avctx); ++ nvtegra_hevc_decode_uninit(avctx); + return err; +} + -+static void tx1_hevc_set_scaling_list(nvdec_hevc_scaling_list_s *list, HEVCContext *s) { ++static void nvtegra_hevc_set_scaling_list(nvdec_hevc_scaling_list_s *list, HEVCContext *s) { + const ScalingList *sl = s->ps.pps->scaling_list_data_present_flag ? + &s->ps.pps->scaling_list : &s->ps.sps->scaling_list; + @@ -1711,7 +1711,7 @@ index 0000000000..b46582a8cc + memcpy(list->ScalingList32x32[1], sl->sl[3][3], 64); +} + -+static void tx1_hevc_set_tile_sizes(uint16_t *sizes, HEVCContext *s) { ++static void nvtegra_hevc_set_tile_sizes(uint16_t *sizes, HEVCContext *s) { + const HEVCPPS *pps = s->ps.pps; + const HEVCSPS *sps = s->ps.sps; + @@ -1745,12 +1745,12 @@ index 0000000000..b46582a8cc + } +} + -+static void tx1_hevc_prepare_frame_setup(nvdec_hevc_pic_s *setup, AVCodecContext *avctx, -+ AVFrame *frame, TX1HEVCDecodeContext *ctx) ++static void nvtegra_hevc_prepare_frame_setup(nvdec_hevc_pic_s *setup, AVCodecContext *avctx, ++ AVFrame *frame, NVTegraHEVCDecodeContext *ctx) +{ + FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + AVHWFramesContext *frames_ctx = (AVHWFramesContext *)avctx->hw_frames_ctx->data; + HEVCContext *s = avctx->priv_data; + SliceHeader *sh = &s->sh; @@ -1763,7 +1763,7 @@ index 0000000000..b46582a8cc + uint8_t rps_stcurrbef[8], rps_stcurraft[8], rps_ltcurr[8]; + uint8_t dpb_to_ordered_map[FF_ARRAY_ELEMS(s->DPB)]; + -+ mem = ff_tx1_map_get_addr(input_map); ++ mem = ff_nvtegra_map_get_addr(input_map); + + /* Enable 10-bit output if asked for regardless of colorspace */ + /* TODO: Dithered down 8-bit decoding (needs DISPLAY_BUF stuff) */ @@ -1871,7 +1871,8 @@ index 0000000000..b46582a8cc + .pattern_id = ((output_mode == 0) || (output_mode == 1)) ? 2 : ctx->pattern_id, /* Disable/enable dithering */ + .sw_hdr_skip_length = sh->nvidia_skip_length, + -+ /* Ignored in official code ++ /* ++ * Ignored in official code + .separate_colour_plane_flag = sps->separate_colour_plane_flag, + .log2_max_pic_order_cnt_lsb_minus4 = sps->log2_max_poc_lsb - 4, + .num_short_term_ref_pic_sets = sps->nb_st_rps, @@ -1887,8 +1888,8 @@ index 0000000000..b46582a8cc + if (ctx->ordered_dpb[i]) { + for (j = 0; j < FF_ARRAY_ELEMS(s->DPB); ++j) { + if (ctx->ordered_dpb[i]->buf[0] && s->DPB[j].frame->buf[0] && -+ ff_tx1_frame_get_fbuf_map(ctx->ordered_dpb[i]) == -+ ff_tx1_frame_get_fbuf_map(s->DPB[j].frame)) ++ ff_nvtegra_frame_get_fbuf_map(ctx->ordered_dpb[i]) == ++ ff_nvtegra_frame_get_fbuf_map(s->DPB[j].frame)) + break; + } + @@ -1932,8 +1933,8 @@ index 0000000000..b46582a8cc + ctx->scratch_ref = NULL; + for (i = 0; i < FF_ARRAY_ELEMS(ctx->ordered_dpb); ++i) { + if (ctx->ordered_dpb[i] && -+ ff_tx1_frame_get_fbuf_map(ctx->ordered_dpb[i]) != -+ ff_tx1_frame_get_fbuf_map(s->frame)) { ++ ff_nvtegra_frame_get_fbuf_map(ctx->ordered_dpb[i]) != ++ ff_nvtegra_frame_get_fbuf_map(s->frame)) { + ctx->scratch_ref = ctx->ordered_dpb[i]; + ref_diff_poc = setup->RefDiffPicOrderCnts[i]; + break; @@ -1990,62 +1991,62 @@ index 0000000000..b46582a8cc + ctx->pattern_id ^= 1; + + if (sps->scaling_list_enable_flag) -+ tx1_hevc_set_scaling_list((nvdec_hevc_scaling_list_s *)(mem + ctx->scaling_list_off), s); ++ nvtegra_hevc_set_scaling_list((nvdec_hevc_scaling_list_s *)(mem + ctx->scaling_list_off), s); + + tile_sizes = (uint16_t *)(mem + ctx->tile_sizes_off); + if (pps->tiles_enabled_flag) { -+ tx1_hevc_set_tile_sizes(tile_sizes, s); ++ nvtegra_hevc_set_tile_sizes(tile_sizes, s); + } else { + tile_sizes[0] = pps->column_width[0]; + tile_sizes[1] = pps->row_height [0]; + } +} + -+static int tx1_hevc_prepare_cmdbuf(AVTX1Cmdbuf *cmdbuf, HEVCContext *s, -+ TX1HEVCDecodeContext *ctx, AVFrame *cur_frame) ++static int nvtegra_hevc_prepare_cmdbuf(AVNVTegraCmdbuf *cmdbuf, HEVCContext *s, ++ NVTegraHEVCDecodeContext *ctx, AVFrame *cur_frame) +{ -+ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + + int i; + int err; + -+ err = ff_tx1_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); ++ err = ff_nvtegra_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); + if (err < 0) + return err; + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, -+ FF_TX1_ENUM(NVC5B0_SET_APPLICATION_ID, ID, HEVC)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, -+ FF_TX1_ENUM (NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, HEVC) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, -+ FF_TX1_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, -+ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, -+ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, -+ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_HEVC_SET_SCALING_LIST_OFFSET, -+ input_map, ctx->scaling_list_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_HEVC_SET_TILE_SIZES_OFFSET, -+ input_map, ctx->tile_sizes_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_HEVC_SET_FILTER_BUFFER_OFFSET, -+ &ctx->common_map, ctx->filter_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_COLOC_DATA_OFFSET, -+ &ctx->common_map, ctx->coloc_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+#define PUSH_FRAME(fr, offset) ({ \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ -+ NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, ++ FF_NVTEGRA_ENUM(NVC5B0_SET_APPLICATION_ID, ID, HEVC)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, ++ FF_NVTEGRA_ENUM (NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, HEVC) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, ++ FF_NVTEGRA_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, ++ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, ++ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, ++ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_HEVC_SET_SCALING_LIST_OFFSET, ++ input_map, ctx->scaling_list_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_HEVC_SET_TILE_SIZES_OFFSET, ++ input_map, ctx->tile_sizes_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_HEVC_SET_FILTER_BUFFER_OFFSET, ++ &ctx->common_map, ctx->filter_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_COLOC_DATA_OFFSET, ++ &ctx->common_map, ctx->coloc_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++#define PUSH_FRAME(fr, offset) ({ \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ ++ NVHOST_RELOC_TYPE_DEFAULT); \ +}) + + for (i = 0; i < FF_ARRAY_ELEMS(ctx->ordered_dpb); ++i) { @@ -2059,97 +2060,97 @@ index 0000000000..b46582a8cc + /* + * TODO: Dithered down 8-bit decoding + * if (ctx->last_frame) { -+ * FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_DISPLAY_BUF_LUMA_OFFSET, -+ * ff_tx1_frame_get_fbuf_map(ctx->last_frame), 0, NVHOST_RELOC_TYPE_DEFAULT); -+ * FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_DISPLAY_BUF_CHROMA_OFFSET, -+ * ff_tx1_frame_get_fbuf_map(ctx->last_frame), ++ * FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_DISPLAY_BUF_LUMA_OFFSET, ++ * ff_nvtegra_frame_get_fbuf_map(ctx->last_frame), 0, NVHOST_RELOC_TYPE_DEFAULT); ++ * FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_DISPLAY_BUF_CHROMA_OFFSET, ++ * ff_nvtegra_frame_get_fbuf_map(ctx->last_frame), + * ctx->last_frame->data[1] - ctx->last_frame->data[0], + * NVHOST_RELOC_TYPE_DEFAULT); + * } + */ + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, -+ FF_TX1_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, ++ FF_NVTEGRA_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); + -+ err = ff_tx1_cmdbuf_end(cmdbuf); ++ err = ff_nvtegra_cmdbuf_end(cmdbuf); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_hevc_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { -+ HEVCContext *s = avctx->priv_data; -+ AVFrame *frame = s->frame; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1HEVCDecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_hevc_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { ++ HEVCContext *s = avctx->priv_data; ++ AVFrame *frame = s->frame; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraHEVCDecodeContext *ctx = avctx->internal->hwaccel_priv_data; + -+ TX1Frame *tf; -+ AVTX1Map *input_map; ++ NVTegraFrame *tf; ++ AVNVTegraMap *input_map; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Starting HEVC-TX1 frame with pixel format %s\n", ++ av_log(avctx, AV_LOG_DEBUG, "Starting HEVC-NVTEGRA frame with pixel format %s\n", + av_get_pix_fmt_name(avctx->sw_pix_fmt)); + -+ err = ff_tx1_start_frame(avctx, frame, &ctx->core); ++ err = ff_nvtegra_start_frame(avctx, frame, &ctx->core); + if (err < 0) + return err; + + tf = fdd->hwaccel_priv; -+ input_map = (AVTX1Map *)tf->input_map_ref->data; -+ mem = ff_tx1_map_get_addr(input_map); ++ input_map = (AVNVTegraMap *)tf->input_map_ref->data; ++ mem = ff_nvtegra_map_get_addr(input_map); + -+ tx1_hevc_prepare_frame_setup((nvdec_hevc_pic_s *)(mem + ctx->core.pic_setup_off), -+ avctx, frame, ctx); ++ nvtegra_hevc_prepare_frame_setup((nvdec_hevc_pic_s *)(mem + ctx->core.pic_setup_off), ++ avctx, frame, ctx); + + ctx->last_frame = frame; + + return 0; +} + -+static int tx1_hevc_end_frame(AVCodecContext *avctx) { -+ HEVCContext *s = avctx->priv_data; -+ TX1HEVCDecodeContext *ctx = avctx->internal->hwaccel_priv_data; -+ AVFrame *frame = s->ref->frame; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; ++static int nvtegra_hevc_end_frame(AVCodecContext *avctx) { ++ HEVCContext *s = avctx->priv_data; ++ NVTegraHEVCDecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ AVFrame *frame = s->ref->frame; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; + + nvdec_hevc_pic_s *setup; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Ending HEVC-TX1 frame with %u slices -> %u bytes\n", ++ av_log(avctx, AV_LOG_DEBUG, "Ending HEVC-NVTEGRA frame with %u slices -> %u bytes\n", + ctx->core.num_slices, ctx->core.bitstream_len); + + if (!tf || !ctx->core.num_slices) + return 0; + -+ mem = ff_tx1_map_get_addr((AVTX1Map *)tf->input_map_ref->data); ++ mem = ff_nvtegra_map_get_addr((AVNVTegraMap *)tf->input_map_ref->data); + + setup = (nvdec_hevc_pic_s *)(mem + ctx->core.pic_setup_off); + setup->bitstream_size = ctx->core.bitstream_len; + -+ err = tx1_hevc_prepare_cmdbuf(&ctx->core.cmdbuf, s, ctx, frame); ++ err = nvtegra_hevc_prepare_cmdbuf(&ctx->core.cmdbuf, s, ctx, frame); + if (err < 0) + return err; + -+ return ff_tx1_end_frame(avctx, frame, &ctx->core, NULL, 0); ++ return ff_nvtegra_end_frame(avctx, frame, &ctx->core, NULL, 0); +} + -+static int tx1_hevc_decode_slice(AVCodecContext *avctx, const uint8_t *buf, -+ uint32_t buf_size) ++static int nvtegra_hevc_decode_slice(AVCodecContext *avctx, const uint8_t *buf, ++ uint32_t buf_size) +{ -+ HEVCContext *s = avctx->priv_data; -+ AVFrame *frame = s->ref->frame; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; -+ TX1HEVCDecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ HEVCContext *s = avctx->priv_data; ++ AVFrame *frame = s->ref->frame; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; ++ NVTegraHEVCDecodeContext *ctx = avctx->internal->hwaccel_priv_data; + + uint8_t *mem; + -+ mem = ff_tx1_map_get_addr(input_map); ++ mem = ff_nvtegra_map_get_addr(input_map); + + /* + * Official code adds a 4-byte 00000001 startcode, @@ -2158,31 +2159,31 @@ index 0000000000..b46582a8cc + AV_WB8(mem + ctx->core.bitstream_off + ctx->core.bitstream_len, 0); + ctx->core.bitstream_len += 1; + -+ return ff_tx1_decode_slice(avctx, frame, buf, buf_size, AV_RB24(buf) != 1); -+} -+ -+#if CONFIG_HEVC_TX1_HWACCEL -+const FFHWAccel ff_hevc_tx1_hwaccel = { -+ .p.name = "hevc_tx1", -+ .p.type = AVMEDIA_TYPE_VIDEO, -+ .p.id = AV_CODEC_ID_HEVC, -+ .p.pix_fmt = AV_PIX_FMT_TX1, -+ .start_frame = &tx1_hevc_start_frame, -+ .end_frame = &tx1_hevc_end_frame, -+ .decode_slice = &tx1_hevc_decode_slice, -+ .init = &tx1_hevc_decode_init, -+ .uninit = &tx1_hevc_decode_uninit, -+ .frame_params = &ff_tx1_frame_params, -+ .priv_data_size = sizeof(TX1HEVCDecodeContext), -+ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, ++ return ff_nvtegra_decode_slice(avctx, frame, buf, buf_size, AV_RB24(buf) != 1); ++} ++ ++#if CONFIG_HEVC_NVTEGRA_HWACCEL ++const FFHWAccel ff_hevc_nvtegra_hwaccel = { ++ .p.name = "hevc_nvtegra", ++ .p.type = AVMEDIA_TYPE_VIDEO, ++ .p.id = AV_CODEC_ID_HEVC, ++ .p.pix_fmt = AV_PIX_FMT_NVTEGRA, ++ .start_frame = &nvtegra_hevc_start_frame, ++ .end_frame = &nvtegra_hevc_end_frame, ++ .decode_slice = &nvtegra_hevc_decode_slice, ++ .init = &nvtegra_hevc_decode_init, ++ .uninit = &nvtegra_hevc_decode_uninit, ++ .frame_params = &ff_nvtegra_frame_params, ++ .priv_data_size = sizeof(NVTegraHEVCDecodeContext), ++ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; +#endif -diff --git a/libavcodec/tx1_mjpeg.c b/libavcodec/tx1_mjpeg.c +diff --git a/libavcodec/nvtegra_mjpeg.c b/libavcodec/nvtegra_mjpeg.c new file mode 100644 -index 0000000000..4005873cee +index 0000000000..c61dbc71e0 --- /dev/null -+++ b/libavcodec/tx1_mjpeg.c -@@ -0,0 +1,320 @@ ++++ b/libavcodec/nvtegra_mjpeg.c +@@ -0,0 +1,336 @@ +/* + * Copyright (c) 2023 averne + * @@ -2211,44 +2212,60 @@ index 0000000000..4005873cee +#include "hwconfig.h" +#include "mjpegdec.h" +#include "decode.h" -+#include "tx1_decode.h" ++#include "nvtegra_decode.h" + +#include "libavutil/pixdesc.h" -+#include "libavutil/tx1_host1x.h" ++#include "libavutil/nvtegra_host1x.h" + -+typedef struct TX1MJPEGDecodeContext { -+ TX1DecodeContext core; -+} TX1MJPEGDecodeContext; ++typedef struct NVTegraMJPEGDecodeContext { ++ NVTegraDecodeContext core; ++} NVTegraMJPEGDecodeContext; + -+static int tx1_mjpeg_decode_uninit(AVCodecContext *avctx) { -+ TX1MJPEGDecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_mjpeg_decode_uninit(AVCodecContext *avctx) { ++ NVTegraMJPEGDecodeContext *ctx = avctx->internal->hwaccel_priv_data; + + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Deinitializing TX1 MJPEG decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Deinitializing NVTEGRA MJPEG decoder\n"); + -+ err = ff_tx1_decode_uninit(avctx, &ctx->core); ++ err = ff_nvtegra_decode_uninit(avctx, &ctx->core); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_mjpeg_decode_init(AVCodecContext *avctx) { -+ TX1MJPEGDecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_mjpeg_decode_init(AVCodecContext *avctx) { ++ MJpegDecodeContext *s = avctx->priv_data; ++ NVTegraMJPEGDecodeContext *ctx = avctx->internal->hwaccel_priv_data; + -+ int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Initializing TX1 MJPEG decoder\n"); ++ enum AVPixelFormat fmt; ++ int luma, err; ++ ++ av_log(avctx, AV_LOG_DEBUG, "Initializing NVTEGRA MJPEG decoder\n"); ++ ++ /* Reject encodes with known hardware issues */ ++ if (avctx->profile != AV_PROFILE_MJPEG_HUFFMAN_BASELINE_DCT) { ++ av_log(avctx, AV_LOG_ERROR, "Non-baseline encoded jpegs are not supported by NVJPG\n"); ++ return AVERROR(EINVAL); ++ } ++ ++ fmt = s->avctx->pix_fmt, luma = s->comp_index[0]; ++ if ((fmt == AV_PIX_FMT_YUV444P || fmt == AV_PIX_FMT_YUVJ444P) ++ && (s->h_count[luma] != 1 || s->v_count[luma] != 1)) { ++ av_log(avctx, AV_LOG_ERROR, "Subsampled YUV444 is not supported by NVJPG\n"); ++ return AVERROR(EINVAL); ++ } + + ctx->core.pic_setup_off = 0; + ctx->core.status_off = FFALIGN(ctx->core.pic_setup_off + sizeof(nvjpg_dec_drv_pic_setup_s), -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.cmdbuf_off = FFALIGN(ctx->core.status_off + sizeof(nvjpg_dec_status), -+ FF_TX1_MAP_ALIGN); -+ ctx->core.bitstream_off = FFALIGN(ctx->core.cmdbuf_off + FF_TX1_MAP_ALIGN, -+ FF_TX1_MAP_ALIGN); -+ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_tx1_decode_pick_bitstream_buffer_size(avctx), ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.bitstream_off = FFALIGN(ctx->core.cmdbuf_off + FF_NVTEGRA_MAP_ALIGN, ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_nvtegra_decode_pick_bitstream_buffer_size(avctx), + 0x1000); + + ctx->core.max_cmdbuf_size = ctx->core.slice_offsets_off - ctx->core.cmdbuf_off; @@ -2256,19 +2273,19 @@ index 0000000000..4005873cee + + ctx->core.is_nvjpg = true; + -+ err = ff_tx1_decode_init(avctx, &ctx->core); ++ err = ff_nvtegra_decode_init(avctx, &ctx->core); + if (err < 0) + goto fail; + + return 0; + +fail: -+ tx1_mjpeg_decode_uninit(avctx); ++ nvtegra_mjpeg_decode_uninit(avctx); + return err; +} + -+static void tx1_mjpeg_prepare_frame_setup(nvjpg_dec_drv_pic_setup_s *setup, MJpegDecodeContext *s, -+ TX1MJPEGDecodeContext *ctx) ++static void nvtegra_mjpeg_prepare_frame_setup(nvjpg_dec_drv_pic_setup_s *setup, MJpegDecodeContext *s, ++ NVTegraMJPEGDecodeContext *ctx) +{ + int input_chroma_mode, output_chroma_mode, memory_mode; + int i, j; @@ -2335,16 +2352,16 @@ index 0000000000..4005873cee + setup->huffTab[1][i].codeNum[j] = s->raw_huffman_lengths[1][i][j]; + } + -+ memcpy(setup->huffTab[0][i].symbol, s->raw_huffman_values[0][i], 162); -+ memcpy(setup->huffTab[1][i].symbol, s->raw_huffman_values[1][i], 162); ++ memcpy(setup->huffTab[0][i].symbol, s->raw_huffman_values[0][i], sizeof(setup->huffTab[0][i].symbol)); ++ memcpy(setup->huffTab[1][i].symbol, s->raw_huffman_values[1][i], sizeof(setup->huffTab[1][i].symbol)); + } + + for (i = 0; i < s->nb_components; ++i) { -+ j = s->component_id[i] - 1; -+ setup->blkPar[j].ac = s->ac_index[i]; -+ setup->blkPar[j].dc = s->dc_index[i]; -+ setup->blkPar[j].hblock = s->h_count[i]; -+ setup->blkPar[j].vblock = s->v_count[i]; ++ j = s->comp_index[i]; ++ setup->blkPar[j].ac = s->ac_index [i]; ++ setup->blkPar[j].dc = s->dc_index [i]; ++ setup->blkPar[j].hblock = s->h_count [i]; ++ setup->blkPar[j].vblock = s->v_count [i]; + setup->blkPar[j].quant = s->quant_index[i]; + } + @@ -2354,132 +2371,132 @@ index 0000000000..4005873cee + } +} + -+static int tx1_mjpeg_prepare_cmdbuf(AVTX1Cmdbuf *cmdbuf, MJpegDecodeContext *s, TX1MJPEGDecodeContext *ctx, -+ AVFrame *current_frame) ++static int nvtegra_mjpeg_prepare_cmdbuf(AVNVTegraCmdbuf *cmdbuf, MJpegDecodeContext *s, ++ NVTegraMJPEGDecodeContext *ctx, AVFrame *current_frame) +{ -+ FrameDecodeData *fdd = (FrameDecodeData *)current_frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ FrameDecodeData *fdd = (FrameDecodeData *)current_frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + + int err; + -+ err = ff_tx1_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVJPG); ++ err = ff_nvtegra_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVJPG); + if (err < 0) + return err; + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVE7D0_SET_APPLICATION_ID, -+ FF_TX1_ENUM(NVE7D0_SET_APPLICATION_ID, ID, NVJPG_DECODER)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVE7D0_SET_CONTROL_PARAMS, -+ FF_TX1_VALUE(NVE7D0_SET_CONTROL_PARAMS, DUMP_CYCLE_COUNT, 1) | -+ FF_TX1_VALUE(NVE7D0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVE7D0_SET_PICTURE_INDEX, -+ FF_TX1_VALUE(NVE7D0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVE7D0_SET_IN_DRV_PIC_SETUP, -+ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVE7D0_SET_BITSTREAM, -+ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVE7D0_SET_OUT_STATUS, -+ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVE7D0_SET_CUR_PIC, ff_tx1_frame_get_fbuf_map(current_frame), -+ 0, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVE7D0_SET_CUR_PIC_CHROMA_U, ff_tx1_frame_get_fbuf_map(current_frame), -+ current_frame->data[1] - current_frame->data[0], NVHOST_RELOC_TYPE_DEFAULT); -+ -+ FF_TX1_PUSH_VALUE(cmdbuf, NVE7D0_EXECUTE, -+ FF_TX1_ENUM(NVE7D0_EXECUTE, AWAKEN, ENABLE)); -+ -+ err = ff_tx1_cmdbuf_end(cmdbuf); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVE7D0_SET_APPLICATION_ID, ++ FF_NVTEGRA_ENUM(NVE7D0_SET_APPLICATION_ID, ID, NVJPG_DECODER)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVE7D0_SET_CONTROL_PARAMS, ++ FF_NVTEGRA_VALUE(NVE7D0_SET_CONTROL_PARAMS, DUMP_CYCLE_COUNT, 1) | ++ FF_NVTEGRA_VALUE(NVE7D0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVE7D0_SET_PICTURE_INDEX, ++ FF_NVTEGRA_VALUE(NVE7D0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVE7D0_SET_IN_DRV_PIC_SETUP, ++ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVE7D0_SET_BITSTREAM, ++ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVE7D0_SET_OUT_STATUS, ++ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVE7D0_SET_CUR_PIC, ff_nvtegra_frame_get_fbuf_map(current_frame), ++ 0, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVE7D0_SET_CUR_PIC_CHROMA_U, ff_nvtegra_frame_get_fbuf_map(current_frame), ++ current_frame->data[1] - current_frame->data[0], NVHOST_RELOC_TYPE_DEFAULT); ++ ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVE7D0_EXECUTE, ++ FF_NVTEGRA_ENUM(NVE7D0_EXECUTE, AWAKEN, ENABLE)); ++ ++ err = ff_nvtegra_cmdbuf_end(cmdbuf); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_mjpeg_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { -+ MJpegDecodeContext *s = avctx->priv_data; -+ AVFrame *frame = s->picture; -+ TX1MJPEGDecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_mjpeg_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { ++ MJpegDecodeContext *s = avctx->priv_data; ++ AVFrame *frame = s->picture; ++ NVTegraMJPEGDecodeContext *ctx = avctx->internal->hwaccel_priv_data; + + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Starting MJPEG-TX1 frame with pixel format %s\n", ++ av_log(avctx, AV_LOG_DEBUG, "Starting MJPEG-NVTEGRA frame with pixel format %s\n", + av_get_pix_fmt_name(avctx->sw_pix_fmt)); + -+ err = ff_tx1_start_frame(avctx, frame, &ctx->core); ++ err = ff_nvtegra_start_frame(avctx, frame, &ctx->core); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_mjpeg_end_frame(AVCodecContext *avctx) { -+ MJpegDecodeContext *s = avctx->priv_data; -+ TX1MJPEGDecodeContext *ctx = avctx->internal->hwaccel_priv_data; -+ AVFrame *frame = s->picture; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; ++static int nvtegra_mjpeg_end_frame(AVCodecContext *avctx) { ++ MJpegDecodeContext *s = avctx->priv_data; ++ NVTegraMJPEGDecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ AVFrame *frame = s->picture; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; + + nvjpg_dec_drv_pic_setup_s *setup; + uint8_t *mem; -+ AVTX1Map *output_map; ++ AVNVTegraMap *output_map; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Ending MJPEG-TX1 frame with %u slices -> %u bytes\n", ++ av_log(avctx, AV_LOG_DEBUG, "Ending MJPEG-NVTEGRA frame with %u slices -> %u bytes\n", + ctx->core.num_slices, ctx->core.bitstream_len); + + if (!tf || !ctx->core.num_slices) + return 0; + -+ mem = ff_tx1_map_get_addr((AVTX1Map *)tf->input_map_ref->data); ++ mem = ff_nvtegra_map_get_addr((AVNVTegraMap *)tf->input_map_ref->data); + + setup = (nvjpg_dec_drv_pic_setup_s *)(mem + ctx->core.pic_setup_off); + setup->bitstream_offset = 0; + setup->bitstream_size = ctx->core.bitstream_len; + -+ err = tx1_mjpeg_prepare_cmdbuf(&ctx->core.cmdbuf, s, ctx, frame); ++ err = nvtegra_mjpeg_prepare_cmdbuf(&ctx->core.cmdbuf, s, ctx, frame); + if (err < 0) + return err; + -+ output_map = ff_tx1_frame_get_fbuf_map(frame); ++ output_map = ff_nvtegra_frame_get_fbuf_map(frame); + output_map->is_linear = true; + -+ return ff_tx1_end_frame(avctx, frame, &ctx->core, NULL, 0); ++ return ff_nvtegra_end_frame(avctx, frame, &ctx->core, NULL, 0); +} + -+static int tx1_mjpeg_decode_slice(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { -+ MJpegDecodeContext *s = avctx->priv_data; -+ TX1MJPEGDecodeContext *ctx = avctx->internal->hwaccel_priv_data; -+ AVFrame *frame = s->picture; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++static int nvtegra_mjpeg_decode_slice(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { ++ MJpegDecodeContext *s = avctx->priv_data; ++ NVTegraMJPEGDecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ AVFrame *frame = s->picture; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; + -+ TX1Frame *tf; -+ AVTX1Map *input_map; ++ NVTegraFrame *tf; ++ AVNVTegraMap *input_map; + uint8_t *mem; + + tf = fdd->hwaccel_priv; -+ input_map = (AVTX1Map *)tf->input_map_ref->data; -+ mem = ff_tx1_map_get_addr(input_map); ++ input_map = (AVNVTegraMap *)tf->input_map_ref->data; ++ mem = ff_nvtegra_map_get_addr(input_map); + -+ /* In tx1_mjpeg_start_frame the JFIF headers haven't been entirely parsed yet */ -+ tx1_mjpeg_prepare_frame_setup((nvjpg_dec_drv_pic_setup_s *)(mem + ctx->core.pic_setup_off), s, ctx); ++ /* In nvtegra_mjpeg_start_frame the JFIF headers haven't been entirely parsed yet */ ++ nvtegra_mjpeg_prepare_frame_setup((nvjpg_dec_drv_pic_setup_s *)(mem + ctx->core.pic_setup_off), s, ctx); + -+ return ff_tx1_decode_slice(avctx, frame, buf, buf_size, false); ++ return ff_nvtegra_decode_slice(avctx, frame, buf, buf_size, false); +} + -+static int tx1_mjpeg_frame_params(AVCodecContext *avctx, AVBufferRef *hw_frames_ctx) { ++static int nvtegra_mjpeg_frame_params(AVCodecContext *avctx, AVBufferRef *hw_frames_ctx) { + AVHWFramesContext *frames_ctx = (AVHWFramesContext *)hw_frames_ctx->data; + + int err; + -+ err = ff_tx1_frame_params(avctx, hw_frames_ctx); ++ err = ff_nvtegra_frame_params(avctx, hw_frames_ctx); + if (err < 0) + return err; + + /* -+ * NVJPG can only decode to pitch linear surfaces, which have a -+ * 256b alignment requirement in VIC ++ * NVJPG1 can only decode to pitch linear surfaces, which have a ++ * 256b alignment requirement in VIC. + */ + frames_ctx->width = FFALIGN(frames_ctx->width, 256); + frames_ctx->height = FFALIGN(frames_ctx->height, 4); @@ -2487,27 +2504,27 @@ index 0000000000..4005873cee + return 0; +} + -+#if CONFIG_MJPEG_TX1_HWACCEL -+const FFHWAccel ff_mjpeg_tx1_hwaccel = { -+ .p.name = "mjpeg_tx1", -+ .p.type = AVMEDIA_TYPE_VIDEO, -+ .p.id = AV_CODEC_ID_MJPEG, -+ .p.pix_fmt = AV_PIX_FMT_TX1, -+ .start_frame = &tx1_mjpeg_start_frame, -+ .end_frame = &tx1_mjpeg_end_frame, -+ .decode_slice = &tx1_mjpeg_decode_slice, -+ .init = &tx1_mjpeg_decode_init, -+ .uninit = &tx1_mjpeg_decode_uninit, -+ .frame_params = &tx1_mjpeg_frame_params, -+ .priv_data_size = sizeof(TX1MJPEGDecodeContext), -+ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, ++#if CONFIG_MJPEG_NVTEGRA_HWACCEL ++const FFHWAccel ff_mjpeg_nvtegra_hwaccel = { ++ .p.name = "mjpeg_nvtegra", ++ .p.type = AVMEDIA_TYPE_VIDEO, ++ .p.id = AV_CODEC_ID_MJPEG, ++ .p.pix_fmt = AV_PIX_FMT_NVTEGRA, ++ .start_frame = &nvtegra_mjpeg_start_frame, ++ .end_frame = &nvtegra_mjpeg_end_frame, ++ .decode_slice = &nvtegra_mjpeg_decode_slice, ++ .init = &nvtegra_mjpeg_decode_init, ++ .uninit = &nvtegra_mjpeg_decode_uninit, ++ .frame_params = &nvtegra_mjpeg_frame_params, ++ .priv_data_size = sizeof(NVTegraMJPEGDecodeContext), ++ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; +#endif -diff --git a/libavcodec/tx1_mpeg12.c b/libavcodec/tx1_mpeg12.c +diff --git a/libavcodec/nvtegra_mpeg12.c b/libavcodec/nvtegra_mpeg12.c new file mode 100644 -index 0000000000..a7ba6f6cff +index 0000000000..f941126e1d --- /dev/null -+++ b/libavcodec/tx1_mpeg12.c ++++ b/libavcodec/nvtegra_mpeg12.c @@ -0,0 +1,318 @@ +/* + * Copyright (c) 2023 averne @@ -2539,16 +2556,16 @@ index 0000000000..a7ba6f6cff +#include "hwconfig.h" +#include "mpegvideo.h" +#include "decode.h" -+#include "tx1_decode.h" ++#include "nvtegra_decode.h" + +#include "libavutil/pixdesc.h" -+#include "libavutil/tx1_host1x.h" ++#include "libavutil/nvtegra_host1x.h" + -+typedef struct TX1MPEG12DecodeContext { -+ TX1DecodeContext core; ++typedef struct NVTegraMPEG12DecodeContext { ++ NVTegraDecodeContext core; + + AVFrame *prev_frame, *next_frame; -+} TX1MPEG12DecodeContext; ++} NVTegraMPEG12DecodeContext; + +/* Size (width, height) of a macroblock */ +#define MB_SIZE 16 @@ -2557,27 +2574,27 @@ index 0000000000..a7ba6f6cff + 0x00, 0x00, 0x01, 0xb7, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xb7, 0x00, 0x00, 0x00, 0x00, +}; + -+static int tx1_mpeg12_decode_uninit(AVCodecContext *avctx) { -+ TX1MPEG12DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_mpeg12_decode_uninit(AVCodecContext *avctx) { ++ NVTegraMPEG12DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Deinitializing TX1 MPEG12 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Deinitializing NVTEGRA MPEG12 decoder\n"); + -+ err = ff_tx1_decode_uninit(avctx, &ctx->core); ++ err = ff_nvtegra_decode_uninit(avctx, &ctx->core); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_mpeg12_decode_init(AVCodecContext *avctx) { -+ TX1MPEG12DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_mpeg12_decode_init(AVCodecContext *avctx) { ++ NVTegraMPEG12DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + + uint32_t num_slices; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Initializing TX1 MPEG12 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Initializing NVTEGRA MPEG12 decoder\n"); + + num_slices = (FFALIGN(avctx->coded_width, MB_SIZE) / MB_SIZE) * + (FFALIGN(avctx->coded_height, MB_SIZE) / MB_SIZE); @@ -2586,33 +2603,33 @@ index 0000000000..a7ba6f6cff + /* Ignored: histogram map, size 0x400 */ + ctx->core.pic_setup_off = 0; + ctx->core.status_off = FFALIGN(ctx->core.pic_setup_off + sizeof(nvdec_mpeg2_pic_s), -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.cmdbuf_off = FFALIGN(ctx->core.status_off + sizeof(nvdec_status_s), -+ FF_TX1_MAP_ALIGN); -+ ctx->core.slice_offsets_off = FFALIGN(ctx->core.cmdbuf_off + FF_TX1_MAP_ALIGN, -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.slice_offsets_off = FFALIGN(ctx->core.cmdbuf_off + FF_NVTEGRA_MAP_ALIGN, ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.bitstream_off = FFALIGN(ctx->core.slice_offsets_off + num_slices * sizeof(uint32_t), -+ FF_TX1_MAP_ALIGN); -+ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_tx1_decode_pick_bitstream_buffer_size(avctx), ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_nvtegra_decode_pick_bitstream_buffer_size(avctx), + 0x1000); + + ctx->core.max_cmdbuf_size = ctx->core.slice_offsets_off - ctx->core.cmdbuf_off; + ctx->core.max_num_slices = (ctx->core.bitstream_off - ctx->core.slice_offsets_off) / sizeof(uint32_t); + ctx->core.max_bitstream_size = ctx->core.input_map_size - ctx->core.bitstream_off; + -+ err = ff_tx1_decode_init(avctx, &ctx->core); ++ err = ff_nvtegra_decode_init(avctx, &ctx->core); + if (err < 0) + goto fail; + + return 0; + +fail: -+ tx1_mpeg12_decode_uninit(avctx); ++ nvtegra_mpeg12_decode_uninit(avctx); + return err; +} + -+static void tx1_mpeg12_prepare_frame_setup(nvdec_mpeg2_pic_s *setup, MpegEncContext *s, -+ TX1MPEG12DecodeContext *ctx) ++static void nvtegra_mpeg12_prepare_frame_setup(nvdec_mpeg2_pic_s *setup, MpegEncContext *s, ++ NVTegraMPEG12DecodeContext *ctx) +{ + *setup = (nvdec_mpeg2_pic_s){ + .gptimer_timeout_value = 0, /* Default value */ @@ -2662,16 +2679,16 @@ index 0000000000..a7ba6f6cff + } +} + -+static int tx1_mpeg12_prepare_cmdbuf(AVTX1Cmdbuf *cmdbuf, MpegEncContext *s, TX1MPEG12DecodeContext *ctx, -+ AVFrame *current_frame, AVFrame *prev_frame, AVFrame *next_frame) ++static int nvtegra_mpeg12_prepare_cmdbuf(AVNVTegraCmdbuf *cmdbuf, MpegEncContext *s, NVTegraMPEG12DecodeContext *ctx, ++ AVFrame *current_frame, AVFrame *prev_frame, AVFrame *next_frame) +{ -+ FrameDecodeData *fdd = (FrameDecodeData *)current_frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ FrameDecodeData *fdd = (FrameDecodeData *)current_frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + + int err, codec_id; + -+ err = ff_tx1_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); ++ err = ff_nvtegra_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); + if (err < 0) + return err; + @@ -2686,152 +2703,152 @@ index 0000000000..a7ba6f6cff + return AVERROR(EINVAL); + } + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, -+ FF_TX1_ENUM(NVC5B0_SET_APPLICATION_ID, ID, MPEG12)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, codec_id | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, -+ FF_TX1_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, -+ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, -+ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_SLICE_OFFSETS_BUF_OFFSET, -+ input_map, ctx->core.slice_offsets_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, -+ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+#define PUSH_FRAME(fr, offset) ({ \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ -+ NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, ++ FF_NVTEGRA_ENUM(NVC5B0_SET_APPLICATION_ID, ID, MPEG12)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, codec_id | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, ++ FF_NVTEGRA_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, ++ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, ++ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_SLICE_OFFSETS_BUF_OFFSET, ++ input_map, ctx->core.slice_offsets_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, ++ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++#define PUSH_FRAME(fr, offset) ({ \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ ++ NVHOST_RELOC_TYPE_DEFAULT); \ +}) + + PUSH_FRAME(current_frame, 0); + PUSH_FRAME(prev_frame, 1); + PUSH_FRAME(next_frame, 2); + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, -+ FF_TX1_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, ++ FF_NVTEGRA_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); + -+ err = ff_tx1_cmdbuf_end(cmdbuf); ++ err = ff_nvtegra_cmdbuf_end(cmdbuf); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_mpeg12_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { -+ MpegEncContext *s = avctx->priv_data; -+ AVFrame *frame = s->current_picture.f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1MPEG12DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_mpeg12_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { ++ MpegEncContext *s = avctx->priv_data; ++ AVFrame *frame = s->current_picture.f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraMPEG12DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + -+ TX1Frame *tf; -+ AVTX1Map *input_map; ++ NVTegraFrame *tf; ++ AVNVTegraMap *input_map; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Starting MPEG12-TX1 frame with pixel format %s\n", ++ av_log(avctx, AV_LOG_DEBUG, "Starting MPEG12-NVTEGRA frame with pixel format %s\n", + av_get_pix_fmt_name(avctx->sw_pix_fmt)); + -+ err = ff_tx1_start_frame(avctx, frame, &ctx->core); ++ err = ff_nvtegra_start_frame(avctx, frame, &ctx->core); + if (err < 0) + return err; + + tf = fdd->hwaccel_priv; -+ input_map = (AVTX1Map *)tf->input_map_ref->data; -+ mem = ff_tx1_map_get_addr(input_map); ++ input_map = (AVNVTegraMap *)tf->input_map_ref->data; ++ mem = ff_nvtegra_map_get_addr(input_map); + -+ tx1_mpeg12_prepare_frame_setup((nvdec_mpeg2_pic_s *)(mem + ctx->core.pic_setup_off), s, ctx); ++ nvtegra_mpeg12_prepare_frame_setup((nvdec_mpeg2_pic_s *)(mem + ctx->core.pic_setup_off), s, ctx); + -+ ctx->prev_frame = (s->pict_type != AV_PICTURE_TYPE_I) ? s->last_picture.f : frame; -+ ctx->next_frame = (s->pict_type == AV_PICTURE_TYPE_B) ? s->next_picture.f : frame; ++ ctx->prev_frame = (s->pict_type != AV_PICTURE_TYPE_I) ? s->last_picture.f : frame; ++ ctx->next_frame = (s->pict_type == AV_PICTURE_TYPE_B) ? s->next_picture.f : frame; + + return 0; +} + -+static int tx1_mpeg12_end_frame(AVCodecContext *avctx) { -+ MpegEncContext *s = avctx->priv_data; -+ TX1MPEG12DecodeContext *ctx = avctx->internal->hwaccel_priv_data; -+ AVFrame *frame = s->current_picture.f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; ++static int nvtegra_mpeg12_end_frame(AVCodecContext *avctx) { ++ MpegEncContext *s = avctx->priv_data; ++ NVTegraMPEG12DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ AVFrame *frame = s->current_picture.f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; + + nvdec_mpeg2_pic_s *setup; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Ending MPEG12-TX1 frame with %u slices -> %u bytes\n", ++ av_log(avctx, AV_LOG_DEBUG, "Ending MPEG12-NVTEGRA frame with %u slices -> %u bytes\n", + ctx->core.num_slices, ctx->core.bitstream_len); + + if (!tf || !ctx->core.num_slices) + return 0; + -+ mem = ff_tx1_map_get_addr((AVTX1Map *)tf->input_map_ref->data); ++ mem = ff_nvtegra_map_get_addr((AVNVTegraMap *)tf->input_map_ref->data); + + setup = (nvdec_mpeg2_pic_s *)(mem + ctx->core.pic_setup_off); + setup->stream_len = ctx->core.bitstream_len + sizeof(bitstream_end_sequence); + setup->slice_count = ctx->core.num_slices; + -+ err = tx1_mpeg12_prepare_cmdbuf(&ctx->core.cmdbuf, s, ctx, frame, -+ ctx->prev_frame, ctx->next_frame); ++ err = nvtegra_mpeg12_prepare_cmdbuf(&ctx->core.cmdbuf, s, ctx, frame, ++ ctx->prev_frame, ctx->next_frame); + if (err < 0) + return err; + -+ return ff_tx1_end_frame(avctx, frame, &ctx->core, bitstream_end_sequence, -+ sizeof(bitstream_end_sequence)); ++ return ff_nvtegra_end_frame(avctx, frame, &ctx->core, bitstream_end_sequence, ++ sizeof(bitstream_end_sequence)); +} + -+static int tx1_mpeg12_decode_slice(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { ++static int nvtegra_mpeg12_decode_slice(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { + MpegEncContext *s = avctx->priv_data; + AVFrame *frame = s->current_picture.f; + -+ return ff_tx1_decode_slice(avctx, frame, buf, buf_size, false); -+} -+ -+#if CONFIG_MPEG1_TX1_HWACCEL -+const FFHWAccel ff_mpeg1_tx1_hwaccel = { -+ .p.name = "mpeg1_tx1", -+ .p.type = AVMEDIA_TYPE_VIDEO, -+ .p.id = AV_CODEC_ID_MPEG1VIDEO, -+ .p.pix_fmt = AV_PIX_FMT_TX1, -+ .start_frame = &tx1_mpeg12_start_frame, -+ .end_frame = &tx1_mpeg12_end_frame, -+ .decode_slice = &tx1_mpeg12_decode_slice, -+ .init = &tx1_mpeg12_decode_init, -+ .uninit = &tx1_mpeg12_decode_uninit, -+ .frame_params = &ff_tx1_frame_params, -+ .priv_data_size = sizeof(TX1MPEG12DecodeContext), -+ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, ++ return ff_nvtegra_decode_slice(avctx, frame, buf, buf_size, false); ++} ++ ++#if CONFIG_MPEG1_NVTEGRA_HWACCEL ++const FFHWAccel ff_mpeg1_nvtegra_hwaccel = { ++ .p.name = "mpeg1_nvtegra", ++ .p.type = AVMEDIA_TYPE_VIDEO, ++ .p.id = AV_CODEC_ID_MPEG1VIDEO, ++ .p.pix_fmt = AV_PIX_FMT_NVTEGRA, ++ .start_frame = &nvtegra_mpeg12_start_frame, ++ .end_frame = &nvtegra_mpeg12_end_frame, ++ .decode_slice = &nvtegra_mpeg12_decode_slice, ++ .init = &nvtegra_mpeg12_decode_init, ++ .uninit = &nvtegra_mpeg12_decode_uninit, ++ .frame_params = &ff_nvtegra_frame_params, ++ .priv_data_size = sizeof(NVTegraMPEG12DecodeContext), ++ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; +#endif + -+#if CONFIG_MPEG2_TX1_HWACCEL -+const FFHWAccel ff_mpeg2_tx1_hwaccel = { -+ .p.name = "mpeg2_tx1", -+ .p.type = AVMEDIA_TYPE_VIDEO, -+ .p.id = AV_CODEC_ID_MPEG2VIDEO, -+ .p.pix_fmt = AV_PIX_FMT_TX1, -+ .start_frame = &tx1_mpeg12_start_frame, -+ .end_frame = &tx1_mpeg12_end_frame, -+ .decode_slice = &tx1_mpeg12_decode_slice, -+ .init = &tx1_mpeg12_decode_init, -+ .uninit = &tx1_mpeg12_decode_uninit, -+ .frame_params = &ff_tx1_frame_params, -+ .priv_data_size = sizeof(TX1MPEG12DecodeContext), -+ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, ++#if CONFIG_MPEG2_NVTEGRA_HWACCEL ++const FFHWAccel ff_mpeg2_nvtegra_hwaccel = { ++ .p.name = "mpeg2_nvtegra", ++ .p.type = AVMEDIA_TYPE_VIDEO, ++ .p.id = AV_CODEC_ID_MPEG2VIDEO, ++ .p.pix_fmt = AV_PIX_FMT_NVTEGRA, ++ .start_frame = &nvtegra_mpeg12_start_frame, ++ .end_frame = &nvtegra_mpeg12_end_frame, ++ .decode_slice = &nvtegra_mpeg12_decode_slice, ++ .init = &nvtegra_mpeg12_decode_init, ++ .uninit = &nvtegra_mpeg12_decode_uninit, ++ .frame_params = &ff_nvtegra_frame_params, ++ .priv_data_size = sizeof(NVTegraMPEG12DecodeContext), ++ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; +#endif -diff --git a/libavcodec/tx1_mpeg4.c b/libavcodec/tx1_mpeg4.c +diff --git a/libavcodec/nvtegra_mpeg4.c b/libavcodec/nvtegra_mpeg4.c new file mode 100644 -index 0000000000..e475678a46 +index 0000000000..cf6e537178 --- /dev/null -+++ b/libavcodec/tx1_mpeg4.c ++++ b/libavcodec/nvtegra_mpeg4.c @@ -0,0 +1,349 @@ +/* + * Copyright (c) 2023 averne @@ -2863,20 +2880,20 @@ index 0000000000..e475678a46 +#include "mpeg4videodec.h" +#include "mpeg4videodefs.h" +#include "decode.h" -+#include "tx1_decode.h" ++#include "nvtegra_decode.h" + +#include "libavutil/pixdesc.h" -+#include "libavutil/tx1_host1x.h" ++#include "libavutil/nvtegra_host1x.h" + -+typedef struct TX1MPEG4DecodeContext { -+ TX1DecodeContext core; ++typedef struct NVTegraMPEG4DecodeContext { ++ NVTegraDecodeContext core; + -+ AVTX1Map common_map; ++ AVNVTegraMap common_map; + uint32_t coloc_off, history_off, scratch_off; + uint32_t history_size, scratch_size; + + AVFrame *prev_frame, *next_frame; -+} TX1MPEG4DecodeContext; ++} NVTegraMPEG4DecodeContext; + +/* Size (width, height) of a macroblock */ +#define MB_SIZE 16 @@ -2885,52 +2902,52 @@ index 0000000000..e475678a46 + 0x00, 0x00, 0x01, 0xb1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xb1, 0x00, 0x00, 0x00, 0x00, +}; + -+static int tx1_mpeg4_decode_uninit(AVCodecContext *avctx) { -+ TX1MPEG4DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_mpeg4_decode_uninit(AVCodecContext *avctx) { ++ NVTegraMPEG4DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Deinitializing TX1 MPEG4 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Deinitializing NVTEGRA MPEG4 decoder\n"); + -+ err = ff_tx1_map_destroy(&ctx->common_map); ++ err = ff_nvtegra_map_destroy(&ctx->common_map); + if (err < 0) + return err; + -+ err = ff_tx1_decode_uninit(avctx, &ctx->core); ++ err = ff_nvtegra_decode_uninit(avctx, &ctx->core); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_mpeg4_decode_init(AVCodecContext *avctx) { -+ TX1MPEG4DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_mpeg4_decode_init(AVCodecContext *avctx) { ++ NVTegraMPEG4DecodeContext *ctx = avctx->internal->hwaccel_priv_data; +#ifdef __SWITCH__ -+ AVHWDeviceContext *hw_device_ctx; -+ AVTX1DeviceContext *device_hwctx; ++ AVHWDeviceContext *hw_device_ctx; ++ AVNVTegraDeviceContext *device_hwctx; +#endif + + uint32_t width_in_mbs, height_in_mbs, + coloc_size, history_size, scratch_size, common_map_size; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Initializing TX1 MPEG4 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Initializing NVTEGRA MPEG4 decoder\n"); + + /* Ignored: histogram map, size 0x400 */ + ctx->core.pic_setup_off = 0; + ctx->core.status_off = FFALIGN(ctx->core.pic_setup_off + sizeof(nvdec_mpeg4_pic_s), -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.cmdbuf_off = FFALIGN(ctx->core.status_off + sizeof(nvdec_status_s), -+ FF_TX1_MAP_ALIGN); -+ ctx->core.bitstream_off = FFALIGN(ctx->core.cmdbuf_off + FF_TX1_MAP_ALIGN, -+ FF_TX1_MAP_ALIGN); -+ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_tx1_decode_pick_bitstream_buffer_size(avctx), ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.bitstream_off = FFALIGN(ctx->core.cmdbuf_off + FF_NVTEGRA_MAP_ALIGN, ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_nvtegra_decode_pick_bitstream_buffer_size(avctx), + 0x1000); + + ctx->core.max_cmdbuf_size = ctx->core.bitstream_off - ctx->core.cmdbuf_off; + ctx->core.max_bitstream_size = ctx->core.input_map_size - ctx->core.bitstream_off; + -+ err = ff_tx1_decode_init(avctx, &ctx->core); ++ err = ff_nvtegra_decode_init(avctx, &ctx->core); + if (err < 0) + goto fail; + @@ -2941,8 +2958,8 @@ index 0000000000..e475678a46 + scratch_size = 0x400; + + ctx->coloc_off = 0; -+ ctx->history_off = FFALIGN(ctx->coloc_off + coloc_size, FF_TX1_MAP_ALIGN); -+ ctx->scratch_off = FFALIGN(ctx->history_off + history_size, FF_TX1_MAP_ALIGN); ++ ctx->history_off = FFALIGN(ctx->coloc_off + coloc_size, FF_NVTEGRA_MAP_ALIGN); ++ ctx->scratch_off = FFALIGN(ctx->history_off + history_size, FF_NVTEGRA_MAP_ALIGN); + common_map_size = FFALIGN(ctx->scratch_off + scratch_size, 0x1000); + +#ifdef __SWITCH__ @@ -2952,7 +2969,7 @@ index 0000000000..e475678a46 + ctx->common_map.owner = device_hwctx->nvdec_channel.channel.fd; +#endif + -+ err = ff_tx1_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); ++ err = ff_nvtegra_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); + if (err < 0) + goto fail; + @@ -2962,12 +2979,12 @@ index 0000000000..e475678a46 + return 0; + +fail: -+ tx1_mpeg4_decode_uninit(avctx); ++ nvtegra_mpeg4_decode_uninit(avctx); + return err; +} + -+static void tx1_mpeg4_prepare_frame_setup(nvdec_mpeg4_pic_s *setup, AVCodecContext *avctx, -+ TX1MPEG4DecodeContext *ctx) ++static void nvtegra_mpeg4_prepare_frame_setup(nvdec_mpeg4_pic_s *setup, AVCodecContext *avctx, ++ NVTegraMPEG4DecodeContext *ctx) +{ + Mpeg4DecContext *m = avctx->priv_data; + MpegEncContext *s = &m->m; @@ -3031,129 +3048,129 @@ index 0000000000..e475678a46 + } +} + -+static int tx1_mpeg4_prepare_cmdbuf(AVTX1Cmdbuf *cmdbuf, MpegEncContext *s, TX1MPEG4DecodeContext *ctx, -+ AVFrame *cur_frame, AVFrame *prev_frame, AVFrame *next_frame) ++static int nvtegra_mpeg4_prepare_cmdbuf(AVNVTegraCmdbuf *cmdbuf, MpegEncContext *s, NVTegraMPEG4DecodeContext *ctx, ++ AVFrame *cur_frame, AVFrame *prev_frame, AVFrame *next_frame) +{ -+ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + + int err; + -+ err = ff_tx1_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); ++ err = ff_nvtegra_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); + if (err < 0) + return err; + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, -+ FF_TX1_ENUM(NVC5B0_SET_APPLICATION_ID, ID, MPEG4)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, -+ FF_TX1_ENUM (NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, MPEG4) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, -+ FF_TX1_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, -+ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, -+ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, -+ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_COLOC_DATA_OFFSET, -+ &ctx->common_map, ctx->coloc_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_HISTORY_OFFSET, -+ &ctx->common_map, ctx->history_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PIC_SCRATCH_BUF_OFFSET, -+ &ctx->common_map, ctx->scratch_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+#define PUSH_FRAME(fr, offset) ({ \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ -+ NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, ++ FF_NVTEGRA_ENUM(NVC5B0_SET_APPLICATION_ID, ID, MPEG4)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, ++ FF_NVTEGRA_ENUM (NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, MPEG4) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, ++ FF_NVTEGRA_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, ++ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, ++ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, ++ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_COLOC_DATA_OFFSET, ++ &ctx->common_map, ctx->coloc_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_HISTORY_OFFSET, ++ &ctx->common_map, ctx->history_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PIC_SCRATCH_BUF_OFFSET, ++ &ctx->common_map, ctx->scratch_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++#define PUSH_FRAME(fr, offset) ({ \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ ++ NVHOST_RELOC_TYPE_DEFAULT); \ +}) + + PUSH_FRAME(cur_frame, 0); + PUSH_FRAME(prev_frame, 1); + PUSH_FRAME(next_frame, 2); + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, -+ FF_TX1_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, ++ FF_NVTEGRA_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); + -+ err = ff_tx1_cmdbuf_end(cmdbuf); ++ err = ff_nvtegra_cmdbuf_end(cmdbuf); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_mpeg4_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { -+ Mpeg4DecContext *m = avctx->priv_data; -+ MpegEncContext *s = &m->m; -+ AVFrame *frame = s->current_picture.f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1MPEG4DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_mpeg4_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { ++ Mpeg4DecContext *m = avctx->priv_data; ++ MpegEncContext *s = &m->m; ++ AVFrame *frame = s->current_picture.f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraMPEG4DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + -+ TX1Frame *tf; -+ AVTX1Map *input_map; ++ NVTegraFrame *tf; ++ AVNVTegraMap *input_map; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Starting MPEG4-TX1 frame with pixel format %s\n", ++ av_log(avctx, AV_LOG_DEBUG, "Starting MPEG4-NVTEGRA frame with pixel format %s\n", + av_get_pix_fmt_name(avctx->sw_pix_fmt)); + -+ err = ff_tx1_start_frame(avctx, frame, &ctx->core); ++ err = ff_nvtegra_start_frame(avctx, frame, &ctx->core); + if (err < 0) + return err; + + tf = fdd->hwaccel_priv; -+ input_map = (AVTX1Map *)tf->input_map_ref->data; -+ mem = ff_tx1_map_get_addr(input_map); ++ input_map = (AVNVTegraMap *)tf->input_map_ref->data; ++ mem = ff_nvtegra_map_get_addr(input_map); + -+ tx1_mpeg4_prepare_frame_setup((nvdec_mpeg4_pic_s *)(mem + ctx->core.pic_setup_off), avctx, ctx); ++ nvtegra_mpeg4_prepare_frame_setup((nvdec_mpeg4_pic_s *)(mem + ctx->core.pic_setup_off), avctx, ctx); + -+ ctx->prev_frame = (s->pict_type != AV_PICTURE_TYPE_I) ? s->last_picture.f : frame; -+ ctx->next_frame = (s->pict_type == AV_PICTURE_TYPE_B) ? s->next_picture.f : frame; ++ ctx->prev_frame = (s->pict_type != AV_PICTURE_TYPE_I) ? s->last_picture.f : frame; ++ ctx->next_frame = (s->pict_type == AV_PICTURE_TYPE_B) ? s->next_picture.f : frame; + + return 0; +} + -+static int tx1_mpeg4_end_frame(AVCodecContext *avctx) { -+ Mpeg4DecContext *m = avctx->priv_data; -+ MpegEncContext *s = &m->m; -+ TX1MPEG4DecodeContext *ctx = avctx->internal->hwaccel_priv_data; -+ AVFrame *frame = s->current_picture.f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; ++static int nvtegra_mpeg4_end_frame(AVCodecContext *avctx) { ++ Mpeg4DecContext *m = avctx->priv_data; ++ MpegEncContext *s = &m->m; ++ NVTegraMPEG4DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ AVFrame *frame = s->current_picture.f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; + + nvdec_mpeg4_pic_s *setup; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Ending MPEG4-TX1 frame with %u slices -> %u bytes\n", ++ av_log(avctx, AV_LOG_DEBUG, "Ending MPEG4-NVTEGRA frame with %u slices -> %u bytes\n", + ctx->core.num_slices, ctx->core.bitstream_len); + + if (!tf || !ctx->core.num_slices) + return 0; + -+ mem = ff_tx1_map_get_addr((AVTX1Map *)tf->input_map_ref->data); ++ mem = ff_nvtegra_map_get_addr((AVNVTegraMap *)tf->input_map_ref->data); + + setup = (nvdec_mpeg4_pic_s *)(mem + ctx->core.pic_setup_off); + setup->stream_len = ctx->core.bitstream_len + sizeof(bitstream_end_sequence); + setup->slice_count = ctx->core.num_slices; + -+ err = tx1_mpeg4_prepare_cmdbuf(&ctx->core.cmdbuf, s, ctx, frame, -+ ctx->prev_frame, ctx->next_frame); ++ err = nvtegra_mpeg4_prepare_cmdbuf(&ctx->core.cmdbuf, s, ctx, frame, ++ ctx->prev_frame, ctx->next_frame); + if (err < 0) + return err; + -+ return ff_tx1_end_frame(avctx, frame, &ctx->core, bitstream_end_sequence, -+ sizeof(bitstream_end_sequence)); ++ return ff_nvtegra_end_frame(avctx, frame, &ctx->core, bitstream_end_sequence, ++ sizeof(bitstream_end_sequence)); +} + -+static int tx1_mpeg4_decode_slice(AVCodecContext *avctx, const uint8_t *buf, ++static int nvtegra_mpeg4_decode_slice(AVCodecContext *avctx, const uint8_t *buf, + uint32_t buf_size) +{ + Mpeg4DecContext *m = avctx->priv_data; @@ -3163,31 +3180,31 @@ index 0000000000..e475678a46 + while (*(uint32_t *)buf != AV_BE2NE32C(VOP_STARTCODE)) + buf -= 1, buf_size += 1; + -+ return ff_tx1_decode_slice(avctx, frame, buf, buf_size, false); -+} -+ -+#if CONFIG_MPEG4_TX1_HWACCEL -+const FFHWAccel ff_mpeg4_tx1_hwaccel = { -+ .p.name = "mpeg4_tx1", -+ .p.type = AVMEDIA_TYPE_VIDEO, -+ .p.id = AV_CODEC_ID_MPEG4, -+ .p.pix_fmt = AV_PIX_FMT_TX1, -+ .start_frame = &tx1_mpeg4_start_frame, -+ .end_frame = &tx1_mpeg4_end_frame, -+ .decode_slice = &tx1_mpeg4_decode_slice, -+ .init = &tx1_mpeg4_decode_init, -+ .uninit = &tx1_mpeg4_decode_uninit, -+ .frame_params = &ff_tx1_frame_params, -+ .priv_data_size = sizeof(TX1MPEG4DecodeContext), -+ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, ++ return ff_nvtegra_decode_slice(avctx, frame, buf, buf_size, false); ++} ++ ++#if CONFIG_MPEG4_NVTEGRA_HWACCEL ++const FFHWAccel ff_mpeg4_nvtegra_hwaccel = { ++ .p.name = "mpeg4_nvtegra", ++ .p.type = AVMEDIA_TYPE_VIDEO, ++ .p.id = AV_CODEC_ID_MPEG4, ++ .p.pix_fmt = AV_PIX_FMT_NVTEGRA, ++ .start_frame = &nvtegra_mpeg4_start_frame, ++ .end_frame = &nvtegra_mpeg4_end_frame, ++ .decode_slice = &nvtegra_mpeg4_decode_slice, ++ .init = &nvtegra_mpeg4_decode_init, ++ .uninit = &nvtegra_mpeg4_decode_uninit, ++ .frame_params = &ff_nvtegra_frame_params, ++ .priv_data_size = sizeof(NVTegraMPEG4DecodeContext), ++ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; +#endif -diff --git a/libavcodec/tx1_vc1.c b/libavcodec/tx1_vc1.c +diff --git a/libavcodec/nvtegra_vc1.c b/libavcodec/nvtegra_vc1.c new file mode 100644 -index 0000000000..d55f001dc7 +index 0000000000..caa6761654 --- /dev/null -+++ b/libavcodec/tx1_vc1.c -@@ -0,0 +1,476 @@ ++++ b/libavcodec/nvtegra_vc1.c +@@ -0,0 +1,460 @@ +/* + * Copyright (c) 2023 averne + * @@ -3218,22 +3235,22 @@ index 0000000000..d55f001dc7 +#include "hwconfig.h" +#include "vc1.h" +#include "decode.h" -+#include "tx1_decode.h" ++#include "nvtegra_decode.h" + +#include "libavutil/pixdesc.h" -+#include "libavutil/tx1_host1x.h" ++#include "libavutil/nvtegra_host1x.h" + -+typedef struct TX1VC1DecodeContext { -+ TX1DecodeContext core; ++typedef struct NVTegraVC1DecodeContext { ++ NVTegraDecodeContext core; + -+ AVTX1Map common_map; ++ AVNVTegraMap common_map; + uint32_t coloc_off, history_off, scratch_off; + uint32_t history_size, scratch_size; + + bool is_first_slice; + + AVFrame *prev_frame, *next_frame; -+} TX1VC1DecodeContext; ++} NVTegraVC1DecodeContext; + +/* Size (width, height) of a macroblock */ +#define MB_SIZE 16 @@ -3242,29 +3259,29 @@ index 0000000000..d55f001dc7 + 0x00, 0x00, 0x01, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0a, 0x00, 0x00, 0x00, 0x00, +}; + -+static int tx1_vc1_decode_uninit(AVCodecContext *avctx) { -+ TX1VC1DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_vc1_decode_uninit(AVCodecContext *avctx) { ++ NVTegraVC1DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Deinitializing TX1 VC1 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Deinitializing NVTEGRA VC1 decoder\n"); + -+ err = ff_tx1_map_destroy(&ctx->common_map); ++ err = ff_nvtegra_map_destroy(&ctx->common_map); + if (err < 0) + return err; + -+ err = ff_tx1_decode_uninit(avctx, &ctx->core); ++ err = ff_nvtegra_decode_uninit(avctx, &ctx->core); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_vc1_decode_init(AVCodecContext *avctx) { -+ TX1VC1DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_vc1_decode_init(AVCodecContext *avctx) { ++ NVTegraVC1DecodeContext *ctx = avctx->internal->hwaccel_priv_data; +#ifdef __SWITCH__ -+ AVHWDeviceContext *hw_device_ctx; -+ AVTX1DeviceContext *device_hwctx; ++ AVHWDeviceContext *hw_device_ctx; ++ AVNVTegraDeviceContext *device_hwctx; +#endif + + uint32_t width_in_mbs, height_in_mbs, num_slices, @@ -3272,42 +3289,42 @@ index 0000000000..d55f001dc7 + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Initializing TX1 VC1 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Initializing NVTEGRA VC1 decoder\n"); + -+ width_in_mbs = FFALIGN(avctx->coded_width, MB_SIZE) / MB_SIZE; -+ height_in_mbs = FFALIGN(avctx->coded_height, MB_SIZE) / MB_SIZE; ++ width_in_mbs = FFALIGN(avctx->coded_width, MB_SIZE) / MB_SIZE; ++ height_in_mbs = FFALIGN(avctx->coded_height, MB_SIZE) / MB_SIZE; + + num_slices = width_in_mbs * height_in_mbs; + + /* Ignored: histogram map, size 0x400 */ + ctx->core.pic_setup_off = 0; + ctx->core.status_off = FFALIGN(ctx->core.pic_setup_off + sizeof(nvdec_vc1_pic_s), -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.cmdbuf_off = FFALIGN(ctx->core.status_off + sizeof(nvdec_status_s), -+ FF_TX1_MAP_ALIGN); -+ ctx->core.slice_offsets_off = FFALIGN(ctx->core.cmdbuf_off + FF_TX1_MAP_ALIGN, -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.slice_offsets_off = FFALIGN(ctx->core.cmdbuf_off + FF_NVTEGRA_MAP_ALIGN, ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.bitstream_off = FFALIGN(ctx->core.slice_offsets_off + num_slices * sizeof(uint32_t), -+ FF_TX1_MAP_ALIGN); -+ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_tx1_decode_pick_bitstream_buffer_size(avctx), ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_nvtegra_decode_pick_bitstream_buffer_size(avctx), + 0x1000); + + ctx->core.max_cmdbuf_size = ctx->core.slice_offsets_off - ctx->core.cmdbuf_off; + ctx->core.max_num_slices = (ctx->core.bitstream_off - ctx->core.slice_offsets_off) / sizeof(uint32_t); + ctx->core.max_bitstream_size = ctx->core.input_map_size - ctx->core.bitstream_off; + -+ err = ff_tx1_decode_init(avctx, &ctx->core); ++ err = ff_nvtegra_decode_init(avctx, &ctx->core); + if (err < 0) + goto fail; + -+ coloc_size = FFALIGN(FFALIGN(height_in_mbs, 2) * (width_in_mbs * 64) - 63, 0x100); -+ history_size = FFALIGN(width_in_mbs, 2) * 768; ++ coloc_size = 3 * FFALIGN(width_in_mbs * FFALIGN(height_in_mbs, 2) * 64 - 63, FF_NVTEGRA_MAP_ALIGN); ++ history_size = FFALIGN(width_in_mbs, 2) * 0x300; + scratch_size = 0x400; + -+ ctx->coloc_off = 0; -+ ctx->history_off = FFALIGN(ctx->coloc_off + coloc_size, FF_TX1_MAP_ALIGN); -+ ctx->scratch_off = FFALIGN(ctx->history_off + history_size, FF_TX1_MAP_ALIGN); -+ common_map_size = FFALIGN(ctx->scratch_off + scratch_size, 0x1000); ++ ctx->coloc_off = 0; ++ ctx->history_off = FFALIGN(ctx->coloc_off + coloc_size, FF_NVTEGRA_MAP_ALIGN); ++ ctx->scratch_off = FFALIGN(ctx->history_off + history_size, FF_NVTEGRA_MAP_ALIGN); ++ common_map_size = FFALIGN(ctx->scratch_off + scratch_size, 0x1000); + +#ifdef __SWITCH__ + hw_device_ctx = (AVHWDeviceContext *)ctx->core.hw_device_ref->data; @@ -3316,11 +3333,11 @@ index 0000000000..d55f001dc7 + ctx->common_map.owner = device_hwctx->nvdec_channel.channel.fd; +#endif + -+ err = ff_tx1_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); ++ err = ff_nvtegra_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); + if (err < 0) + goto fail; + -+ mem = ff_tx1_map_get_addr(&ctx->common_map); ++ mem = ff_nvtegra_map_get_addr(&ctx->common_map); + + memset(mem + ctx->coloc_off, 0, coloc_size); + memset(mem + ctx->history_off, 0, history_size); @@ -3332,22 +3349,25 @@ index 0000000000..d55f001dc7 + return 0; + +fail: -+ tx1_vc1_decode_uninit(avctx); ++ nvtegra_vc1_decode_uninit(avctx); + return err; +} + -+static void tx1_vc1_prepare_frame_setup(nvdec_vc1_pic_s *setup, AVCodecContext *avctx, -+ TX1VC1DecodeContext *ctx) ++static void nvtegra_vc1_prepare_frame_setup(nvdec_vc1_pic_s *setup, AVCodecContext *avctx, ++ NVTegraVC1DecodeContext *ctx) +{ + VC1Context *v = avctx->priv_data; + MpegEncContext *s = &v->s; -+ AVFrame *frame = s->current_picture.f; ++ AVFrame *frame = s->current_picture_ptr->f; + + /* -+ * Note: a lot of fields in this structure are unused by official software, -+ * here we only set those used by official code ++ * Notes: ++ * - s->current_picture.f->linesize is unconsistently doubled for interlaced content ++ * between I-frames and others, so s->current_pic_ptr is used ++ * - a lot of fields in this structure are unused by official software, ++ * here we only set those + */ -+ *setup = (nvdec_vc1_pic_s) { ++ *setup = (nvdec_vc1_pic_s){ + .scratch_pic_buffer_size = ctx->scratch_size, + + .gptimer_timeout_value = 0, /* Default value */ @@ -3359,7 +3379,6 @@ index 0000000000..d55f001dc7 + frame->linesize[1], + }, + -+ // TODO: Set these for interlaced content + .luma_top_offset = 0, + .luma_bot_offset = 0, + .luma_frame_offset = 0, @@ -3408,44 +3427,28 @@ index 0000000000..d55f001dc7 + .panscan_flag = v->panscanflag, + .dquant = v->dquant, + .refdist_flag = v->refdist_flag, -+ .refdist = v->refdist, + .quantizer = v->quantizer_mode, + .overlap = v->overlap, + .vstransform = v->vstransform, -+ .transacfrm = v->c_ac_table_index, -+ .transacfrm2 = v->y_ac_table_index, -+ .transdctab = v->s.dc_table_index, + .extended_mv = v->extended_mv, -+ .mvrange = v->mvrange, + .extended_dmv = v->extended_dmv, -+ .dmvrange = v->dmvrange, -+ .fcm = (v->fcm == 0) ? 0 : v->fcm + 1, -+ .pquantizer = v->pquantizer, -+ .dqprofile = v->dqprofile, -+ .dqsbedge = (v->dqprofile == DQPROFILE_SINGLE_EDGE) ? v->dqsbedge : 0, -+ .dqdbedge = (v->dqprofile == DQPROFILE_DOUBLE_EDGES) ? v->dqsbedge : 0, -+ .dqbilevel = v->dqbilevel, + }; + -+ setup->displayPara.enableTFOutput = 1; + if (v->profile == PROFILE_ADVANCED) { ++ setup->displayPara.enableTFOutput = 1; + setup->displayPara.VC1MapYFlag = v->range_mapy_flag; + setup->displayPara.MapYValue = v->range_mapy; + setup->displayPara.VC1MapUVFlag = v->range_mapuv_flag; + setup->displayPara.MapUVValue = v->range_mapuv; -+ } else { -+ if ((v->rangered == 0) || (v->rangeredfrm == 0)) { -+ setup->displayPara.enableTFOutput = false; -+ } else { -+ setup->displayPara.VC1MapYFlag = 1; -+ setup->displayPara.MapYValue = 7; -+ setup->displayPara.VC1MapUVFlag = 1; -+ setup->displayPara.MapUVValue = 7; -+ } ++ } else if (v->rangered && v->rangeredfrm) { ++ setup->displayPara.enableTFOutput = 1; ++ setup->displayPara.VC1MapYFlag = 1; ++ setup->displayPara.MapYValue = 7; ++ setup->displayPara.VC1MapUVFlag = 1; ++ setup->displayPara.MapUVValue = 7; + } + -+ if ((v->range_mapy_flag != 0) || (v->range_mapuv_flag != 0)) { -+ // TODO: Set these ++ if (v->range_mapy_flag || v->range_mapuv_flag) { + setup->displayPara.OutputBottom[0] = 0; + setup->displayPara.OutputBottom[1] = 0; + setup->displayPara.OutputStructure = v->interlace & 1; @@ -3453,159 +3456,157 @@ index 0000000000..d55f001dc7 + } +} + -+static int tx1_vc1_prepare_cmdbuf(AVTX1Cmdbuf *cmdbuf, VC1Context *v, TX1VC1DecodeContext *ctx, -+ AVFrame *cur_frame, AVFrame *prev_frame, AVFrame *next_frame) ++static int nvtegra_vc1_prepare_cmdbuf(AVNVTegraCmdbuf *cmdbuf, VC1Context *v, NVTegraVC1DecodeContext *ctx, ++ AVFrame *cur_frame, AVFrame *prev_frame, AVFrame *next_frame) +{ -+ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + + int err; + -+ err = ff_tx1_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); ++ err = ff_nvtegra_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); + if (err < 0) + return err; + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, -+ FF_TX1_ENUM(NVC5B0_SET_APPLICATION_ID, ID, VC1)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, -+ FF_TX1_ENUM (NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, VC1) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, -+ FF_TX1_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, -+ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, -+ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_SLICE_OFFSETS_BUF_OFFSET, -+ input_map, ctx->core.slice_offsets_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, -+ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_COLOC_DATA_OFFSET, -+ &ctx->common_map, ctx->coloc_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_HISTORY_OFFSET, -+ &ctx->common_map, ctx->history_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PIC_SCRATCH_BUF_OFFSET, -+ &ctx->common_map, ctx->scratch_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+#define PUSH_FRAME(fr, offset) ({ \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ -+ NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, ++ FF_NVTEGRA_ENUM(NVC5B0_SET_APPLICATION_ID, ID, VC1)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, ++ FF_NVTEGRA_ENUM (NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, VC1) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, ++ FF_NVTEGRA_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, ++ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, ++ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_SLICE_OFFSETS_BUF_OFFSET, ++ input_map, ctx->core.slice_offsets_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, ++ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_COLOC_DATA_OFFSET, ++ &ctx->common_map, ctx->coloc_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_HISTORY_OFFSET, ++ &ctx->common_map, ctx->history_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PIC_SCRATCH_BUF_OFFSET, ++ &ctx->common_map, ctx->scratch_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++#define PUSH_FRAME(fr, offset) ({ \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ ++ NVHOST_RELOC_TYPE_DEFAULT); \ +}) + + PUSH_FRAME(cur_frame, 0); + PUSH_FRAME(prev_frame, 1); + PUSH_FRAME(next_frame, 2); + -+ /* TODO: Bind a surface to the postproc output if we need range remapping */ -+ // if (((v->profile != PROFILE_ADVANCED) && ((v->rangered != 0) || (v->rangeredfrm != 0))) || -+ // ((v->range_mapy_flag != 0) || (v->range_mapuv_flag != 0))) { -+ // FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_DISPLAY_BUF_LUMA_OFFSET, -+ // &rangeMappedOutput.luma, 0, NVHOST_RELOC_TYPE_DEFAULT); -+ // FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_DISPLAY_BUF_CHROMA_OFFSET, -+ // &rangeMappedOutput.chroma, 0, NVHOST_RELOC_TYPE_DEFAULT); -+ // } ++ /* ++ * TODO: Bind a surface to the postproc output if we need range remapping ++ if (((v->profile != PROFILE_ADVANCED) && ((v->rangered != 0) || (v->rangeredfrm != 0))) || ++ ((v->range_mapy_flag != 0) || (v->range_mapuv_flag != 0))) { ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_DISPLAY_BUF_LUMA_OFFSET, ++ &output.luma, 0, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_DISPLAY_BUF_CHROMA_OFFSET, ++ &output.chroma, 0, NVHOST_RELOC_TYPE_DEFAULT); ++ } ++ */ + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, -+ FF_TX1_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, ++ FF_NVTEGRA_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); + -+ err = ff_tx1_cmdbuf_end(cmdbuf); ++ err = ff_nvtegra_cmdbuf_end(cmdbuf); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_vc1_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { -+ VC1Context *v = avctx->priv_data; -+ MpegEncContext *s = &v->s; -+ AVFrame *frame = s->current_picture.f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1VC1DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_vc1_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { ++ VC1Context *v = avctx->priv_data; ++ MpegEncContext *s = &v->s; ++ AVFrame *frame = s->current_picture.f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraVC1DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + -+ TX1Frame *tf; -+ AVTX1Map *input_map; ++ NVTegraFrame *tf; ++ AVNVTegraMap *input_map; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Starting VC1-TX1 frame with pixel format %s\n", ++ av_log(avctx, AV_LOG_DEBUG, "Starting VC1-NVTEGRA frame with pixel format %s\n", + av_get_pix_fmt_name(avctx->sw_pix_fmt)); + -+ // TODO: Set top/bottom fields offsets -+ // if (v->fcm == ILACE_FIELD) -+ // return AVERROR_PATCHWELCOME; -+ + ctx->is_first_slice = true; + -+ err = ff_tx1_start_frame(avctx, frame, &ctx->core); ++ err = ff_nvtegra_start_frame(avctx, frame, &ctx->core); + if (err < 0) + return err; + + tf = fdd->hwaccel_priv; -+ input_map = (AVTX1Map *)tf->input_map_ref->data; -+ mem = ff_tx1_map_get_addr(input_map); ++ input_map = (AVNVTegraMap *)tf->input_map_ref->data; ++ mem = ff_nvtegra_map_get_addr(input_map); + -+ tx1_vc1_prepare_frame_setup((nvdec_vc1_pic_s *)(mem + ctx->core.pic_setup_off), avctx, ctx); ++ nvtegra_vc1_prepare_frame_setup((nvdec_vc1_pic_s *)(mem + ctx->core.pic_setup_off), avctx, ctx); + -+ ctx->prev_frame = ff_tx1_safe_get_ref(s->last_picture.f, frame); -+ ctx->next_frame = ff_tx1_safe_get_ref(s->next_picture.f, frame); ++ ctx->prev_frame = ff_nvtegra_safe_get_ref(s->last_picture.f, frame); ++ ctx->next_frame = ff_nvtegra_safe_get_ref(s->next_picture.f, frame); + + return 0; +} + -+static int tx1_vc1_end_frame(AVCodecContext *avctx) { -+ VC1Context *v = avctx->priv_data; -+ TX1VC1DecodeContext *ctx = avctx->internal->hwaccel_priv_data; -+ AVFrame *frame = v->s.current_picture.f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; ++static int nvtegra_vc1_end_frame(AVCodecContext *avctx) { ++ VC1Context *v = avctx->priv_data; ++ NVTegraVC1DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ AVFrame *frame = v->s.current_picture.f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; + + nvdec_vc1_pic_s *setup; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Ending VC1-TX1 frame with %u slices -> %u bytes\n", ++ av_log(avctx, AV_LOG_DEBUG, "Ending VC1-NVTEGRA frame with %u slices -> %u bytes\n", + ctx->core.num_slices, ctx->core.bitstream_len); + + if (!tf || !ctx->core.num_slices) + return 0; + -+ mem = ff_tx1_map_get_addr((AVTX1Map *)tf->input_map_ref->data); ++ mem = ff_nvtegra_map_get_addr((AVNVTegraMap *)tf->input_map_ref->data); + + setup = (nvdec_vc1_pic_s *)(mem + ctx->core.pic_setup_off); + setup->stream_len = ctx->core.bitstream_len + sizeof(bitstream_end_sequence); + setup->slice_count = ctx->core.num_slices; + -+ err = tx1_vc1_prepare_cmdbuf(&ctx->core.cmdbuf, v, ctx, frame, -+ ctx->prev_frame, ctx->next_frame); ++ err = nvtegra_vc1_prepare_cmdbuf(&ctx->core.cmdbuf, v, ctx, frame, ++ ctx->prev_frame, ctx->next_frame); + if (err < 0) + return err; + -+ return ff_tx1_end_frame(avctx, frame, &ctx->core, bitstream_end_sequence, -+ sizeof(bitstream_end_sequence)); ++ return ff_nvtegra_end_frame(avctx, frame, &ctx->core, bitstream_end_sequence, ++ sizeof(bitstream_end_sequence)); +} + -+static int tx1_vc1_decode_slice(AVCodecContext *avctx, const uint8_t *buf, -+ uint32_t buf_size) ++static int nvtegra_vc1_decode_slice(AVCodecContext *avctx, const uint8_t *buf, ++ uint32_t buf_size) +{ -+ VC1Context *v = avctx->priv_data; -+ TX1VC1DecodeContext *ctx = avctx->internal->hwaccel_priv_data; -+ AVFrame *frame = v->s.current_picture.f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ VC1Context *v = avctx->priv_data; ++ NVTegraVC1DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ AVFrame *frame = v->s.current_picture.f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + + nvdec_vc1_pic_s *setup; + uint8_t *mem; + enum VC1Code startcode; + -+ mem = ff_tx1_map_get_addr(input_map); ++ mem = ff_nvtegra_map_get_addr(input_map); + + setup = (nvdec_vc1_pic_s *)(mem + ctx->core.pic_setup_off); + @@ -3617,9 +3618,9 @@ index 0000000000..d55f001dc7 + startcode = VC1_CODE_FIELD; + + /* -+ * Skip a word if the bitstream already contains the startcode -+ * We could probably just not insert our startcode but this is what official code does -+ */ ++ * Skip a dword if the bitstream already contains the startcode ++ * We could probably just not insert our startcode but this is what official code does ++ */ + if ((buf_size >= 4) && (AV_RB32(buf) == startcode)) + setup->bitstream_offset = 1; + @@ -3628,48 +3629,48 @@ index 0000000000..d55f001dc7 + ctx->is_first_slice = false; + } + -+ return ff_tx1_decode_slice(avctx, frame, buf, buf_size, false); -+} -+ -+#if CONFIG_VC1_TX1_HWACCEL -+const FFHWAccel ff_vc1_tx1_hwaccel = { -+ .p.name = "vc1_tx1", -+ .p.type = AVMEDIA_TYPE_VIDEO, -+ .p.id = AV_CODEC_ID_VC1, -+ .p.pix_fmt = AV_PIX_FMT_TX1, -+ .start_frame = &tx1_vc1_start_frame, -+ .end_frame = &tx1_vc1_end_frame, -+ .decode_slice = &tx1_vc1_decode_slice, -+ .init = &tx1_vc1_decode_init, -+ .uninit = &tx1_vc1_decode_uninit, -+ .frame_params = &ff_tx1_frame_params, -+ .priv_data_size = sizeof(TX1VC1DecodeContext), -+ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, ++ return ff_nvtegra_decode_slice(avctx, frame, buf, buf_size, false); ++} ++ ++#if CONFIG_VC1_NVTEGRA_HWACCEL ++const FFHWAccel ff_vc1_nvtegra_hwaccel = { ++ .p.name = "vc1_nvtegra", ++ .p.type = AVMEDIA_TYPE_VIDEO, ++ .p.id = AV_CODEC_ID_VC1, ++ .p.pix_fmt = AV_PIX_FMT_NVTEGRA, ++ .start_frame = &nvtegra_vc1_start_frame, ++ .end_frame = &nvtegra_vc1_end_frame, ++ .decode_slice = &nvtegra_vc1_decode_slice, ++ .init = &nvtegra_vc1_decode_init, ++ .uninit = &nvtegra_vc1_decode_uninit, ++ .frame_params = &ff_nvtegra_frame_params, ++ .priv_data_size = sizeof(NVTegraVC1DecodeContext), ++ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; +#endif + -+#if CONFIG_WMV3_TX1_HWACCEL -+const FFHWAccel ff_wmv3_tx1_hwaccel = { -+ .p.name = "wmv3_tx1", -+ .p.type = AVMEDIA_TYPE_VIDEO, -+ .p.id = AV_CODEC_ID_WMV3, -+ .p.pix_fmt = AV_PIX_FMT_TX1, -+ .start_frame = &tx1_vc1_start_frame, -+ .end_frame = &tx1_vc1_end_frame, -+ .decode_slice = &tx1_vc1_decode_slice, -+ .init = &tx1_vc1_decode_init, -+ .uninit = &tx1_vc1_decode_uninit, -+ .frame_params = &ff_tx1_frame_params, -+ .priv_data_size = sizeof(TX1VC1DecodeContext), -+ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, ++#if CONFIG_WMV3_NVTEGRA_HWACCEL ++const FFHWAccel ff_wmv3_nvtegra_hwaccel = { ++ .p.name = "wmv3_nvtegra", ++ .p.type = AVMEDIA_TYPE_VIDEO, ++ .p.id = AV_CODEC_ID_WMV3, ++ .p.pix_fmt = AV_PIX_FMT_NVTEGRA, ++ .start_frame = &nvtegra_vc1_start_frame, ++ .end_frame = &nvtegra_vc1_end_frame, ++ .decode_slice = &nvtegra_vc1_decode_slice, ++ .init = &nvtegra_vc1_decode_init, ++ .uninit = &nvtegra_vc1_decode_uninit, ++ .frame_params = &ff_nvtegra_frame_params, ++ .priv_data_size = sizeof(NVTegraVC1DecodeContext), ++ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; +#endif -diff --git a/libavcodec/tx1_vp8.c b/libavcodec/tx1_vp8.c +diff --git a/libavcodec/nvtegra_vp8.c b/libavcodec/nvtegra_vp8.c new file mode 100644 -index 0000000000..6cdfd6d9c2 +index 0000000000..79f53f33b0 --- /dev/null -+++ b/libavcodec/tx1_vp8.c -@@ -0,0 +1,340 @@ ++++ b/libavcodec/nvtegra_vp8.c +@@ -0,0 +1,339 @@ +/* + * Copyright (c) 2023 averne + * @@ -3699,44 +3700,44 @@ index 0000000000..6cdfd6d9c2 +#include "vp8.h" +#include "vp8data.h" +#include "decode.h" -+#include "tx1_decode.h" ++#include "nvtegra_decode.h" + +#include "libavutil/pixdesc.h" -+#include "libavutil/tx1_host1x.h" ++#include "libavutil/nvtegra_host1x.h" + -+typedef struct TX1VP8DecodeContext { -+ TX1DecodeContext core; ++typedef struct NVTegraVP8DecodeContext { ++ NVTegraDecodeContext core; + -+ AVTX1Map common_map; ++ AVNVTegraMap common_map; + uint32_t prob_data_off, history_off; + uint32_t history_size; + -+ AVFrame *golden_frame, *altref_frame, ++ AVFrame *golden_frame, *altref_frame, + *previous_frame; -+} TX1VP8DecodeContext; ++} NVTegraVP8DecodeContext; + +/* Size (width, height) of a macroblock */ +#define MB_SIZE 16 + -+static int tx1_vp8_decode_uninit(AVCodecContext *avctx) { -+ TX1VP8DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_vp8_decode_uninit(AVCodecContext *avctx) { ++ NVTegraVP8DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Deinitializing TX1 VP8 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Deinitializing NVTEGRA VP8 decoder\n"); + -+ err = ff_tx1_map_destroy(&ctx->common_map); ++ err = ff_nvtegra_map_destroy(&ctx->common_map); + if (err < 0) + return err; + -+ err = ff_tx1_decode_uninit(avctx, &ctx->core); ++ err = ff_nvtegra_decode_uninit(avctx, &ctx->core); + if (err < 0) + return err; + + return 0; +} + -+static void tx1_vp8_init_probs(void *p) { ++static void nvtegra_vp8_init_probs(void *p) { + int i, j, k; + uint8_t *ptr = p; + @@ -3763,33 +3764,33 @@ index 0000000000..6cdfd6d9c2 + } +} + -+static int tx1_vp8_decode_init(AVCodecContext *avctx) { -+ TX1VP8DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_vp8_decode_init(AVCodecContext *avctx) { ++ NVTegraVP8DecodeContext *ctx = avctx->internal->hwaccel_priv_data; +#ifdef __SWITCH__ -+ AVHWDeviceContext *hw_device_ctx; -+ AVTX1DeviceContext *device_hwctx; ++ AVHWDeviceContext *hw_device_ctx; ++ AVNVTegraDeviceContext *device_hwctx; +#endif + + uint32_t width_in_mbs, common_map_size; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Initializing TX1 VP8 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Initializing NVTEGRA VP8 decoder\n"); + + /* Ignored: histogram map, size 0x400 */ + ctx->core.pic_setup_off = 0; + ctx->core.status_off = FFALIGN(ctx->core.pic_setup_off + sizeof(nvdec_vp8_pic_s), -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.cmdbuf_off = FFALIGN(ctx->core.status_off + sizeof(nvdec_status_s), -+ FF_TX1_MAP_ALIGN); -+ ctx->core.bitstream_off = FFALIGN(ctx->core.cmdbuf_off + FF_TX1_MAP_ALIGN, -+ FF_TX1_MAP_ALIGN); -+ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_tx1_decode_pick_bitstream_buffer_size(avctx), ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.bitstream_off = FFALIGN(ctx->core.cmdbuf_off + FF_NVTEGRA_MAP_ALIGN, ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_nvtegra_decode_pick_bitstream_buffer_size(avctx), + 0x1000); + + ctx->core.max_cmdbuf_size = ctx->core.bitstream_off - ctx->core.cmdbuf_off; + ctx->core.max_bitstream_size = ctx->core.input_map_size - ctx->core.bitstream_off; + -+ err = ff_tx1_decode_init(avctx, &ctx->core); ++ err = ff_nvtegra_decode_init(avctx, &ctx->core); + if (err < 0) + goto fail; + @@ -3797,7 +3798,7 @@ index 0000000000..6cdfd6d9c2 + ctx->history_size = width_in_mbs * 0x200; + + ctx->prob_data_off = 0; -+ ctx->history_off = FFALIGN(ctx->prob_data_off + 0x4b00, FF_TX1_MAP_ALIGN); ++ ctx->history_off = FFALIGN(ctx->prob_data_off + 0x4b00, FF_NVTEGRA_MAP_ALIGN); + common_map_size = FFALIGN(ctx->history_off + ctx->history_size, 0x1000); + +#ifdef __SWITCH__ @@ -3807,21 +3808,21 @@ index 0000000000..6cdfd6d9c2 + ctx->common_map.owner = device_hwctx->nvdec_channel.channel.fd; +#endif + -+ err = ff_tx1_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); ++ err = ff_nvtegra_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); + if (err < 0) + goto fail; + -+ tx1_vp8_init_probs((uint8_t *)ff_tx1_map_get_addr(&ctx->common_map) + ctx->prob_data_off); ++ nvtegra_vp8_init_probs((uint8_t *)ff_nvtegra_map_get_addr(&ctx->common_map) + ctx->prob_data_off); + + return 0; + +fail: -+ tx1_vp8_decode_uninit(avctx); ++ nvtegra_vp8_decode_uninit(avctx); + return err; +} + -+static void tx1_vp8_prepare_frame_setup(nvdec_vp8_pic_s *setup, VP8Context *h, -+ TX1VP8DecodeContext *ctx) ++static void nvtegra_vp8_prepare_frame_setup(nvdec_vp8_pic_s *setup, VP8Context *h, ++ NVTegraVP8DecodeContext *ctx) +{ + *setup = (nvdec_vp8_pic_s){ + .gptimer_timeout_value = 0, /* Default value */ @@ -3856,8 +3857,7 @@ index 0000000000..6cdfd6d9c2 + .current_output_memory_layout = 0, /* NV12 */ + .output_memory_layout = { 0, 0, 0 }, /* NV12 */ + -+ /* ??? */ -+ /* Official code sets this value at 0x8d (reserved1[0]), so just set both */ ++ /* ???: Official code sets this value at 0x8d (reserved1[0]), so just set both */ + .segmentation_feature_data_update = h->segmentation.enabled ? h->segmentation.update_feature_data : 0, + .reserved1[0] = h->segmentation.enabled ? h->segmentation.update_feature_data : 0, + @@ -3865,46 +3865,46 @@ index 0000000000..6cdfd6d9c2 + }; +} + -+static int tx1_vp8_prepare_cmdbuf(AVTX1Cmdbuf *cmdbuf, VP8Context *h, -+ TX1VP8DecodeContext *ctx, AVFrame *cur_frame) ++static int nvtegra_vp8_prepare_cmdbuf(AVNVTegraCmdbuf *cmdbuf, VP8Context *h, ++ NVTegraVP8DecodeContext *ctx, AVFrame *cur_frame) +{ -+ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + + int err; + -+ err = ff_tx1_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); ++ err = ff_nvtegra_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); + if (err < 0) + return err; + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, -+ FF_TX1_ENUM(NVC5B0_SET_APPLICATION_ID, ID, VP8)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, -+ FF_TX1_ENUM(NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, VP8) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, -+ FF_TX1_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, -+ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, -+ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, -+ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_VP8_SET_PROB_DATA_OFFSET, -+ &ctx->common_map, ctx->prob_data_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_HISTORY_OFFSET, -+ &ctx->common_map, ctx->history_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+#define PUSH_FRAME(fr, offset) ({ \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ -+ NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, ++ FF_NVTEGRA_ENUM(NVC5B0_SET_APPLICATION_ID, ID, VP8)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, ++ FF_NVTEGRA_ENUM(NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, VP8) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, ++ FF_NVTEGRA_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, ++ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, ++ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, ++ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_VP8_SET_PROB_DATA_OFFSET, ++ &ctx->common_map, ctx->prob_data_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_HISTORY_OFFSET, ++ &ctx->common_map, ctx->history_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++#define PUSH_FRAME(fr, offset) ({ \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ ++ NVHOST_RELOC_TYPE_DEFAULT); \ +}) + + PUSH_FRAME(ctx->golden_frame, 0); @@ -3912,109 +3912,109 @@ index 0000000000..6cdfd6d9c2 + PUSH_FRAME(ctx->previous_frame, 2); + PUSH_FRAME(cur_frame, 3); + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, -+ FF_TX1_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, ++ FF_NVTEGRA_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); + -+ err = ff_tx1_cmdbuf_end(cmdbuf); ++ err = ff_nvtegra_cmdbuf_end(cmdbuf); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_vp8_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { -+ VP8Context *h = avctx->priv_data; -+ AVFrame *frame = h->framep[VP8_FRAME_CURRENT]->tf.f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1VP8DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_vp8_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { ++ VP8Context *h = avctx->priv_data; ++ AVFrame *frame = h->framep[VP8_FRAME_CURRENT]->tf.f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraVP8DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + -+ TX1Frame *tf; -+ AVTX1Map *input_map; ++ NVTegraFrame *tf; ++ AVNVTegraMap *input_map; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Starting VP8-TX1 frame with pixel format %s\n", ++ av_log(avctx, AV_LOG_DEBUG, "Starting VP8-NVTEGRA frame with pixel format %s\n", + av_get_pix_fmt_name(avctx->sw_pix_fmt)); + -+ err = ff_tx1_start_frame(avctx, frame, &ctx->core); ++ err = ff_nvtegra_start_frame(avctx, frame, &ctx->core); + if (err < 0) + return err; + + tf = fdd->hwaccel_priv; -+ input_map = (AVTX1Map *)tf->input_map_ref->data; -+ mem = ff_tx1_map_get_addr(input_map); ++ input_map = (AVNVTegraMap *)tf->input_map_ref->data; ++ mem = ff_nvtegra_map_get_addr(input_map); + -+ tx1_vp8_prepare_frame_setup((nvdec_vp8_pic_s *)(mem + ctx->core.pic_setup_off), h, ctx); ++ nvtegra_vp8_prepare_frame_setup((nvdec_vp8_pic_s *)(mem + ctx->core.pic_setup_off), h, ctx); + +#define SAFE_REF(type) (h->framep[(type)] ?: h->framep[VP8_FRAME_CURRENT]) -+ ctx->golden_frame = ff_tx1_safe_get_ref(SAFE_REF(VP8_FRAME_GOLDEN) ->tf.f, frame); -+ ctx->altref_frame = ff_tx1_safe_get_ref(SAFE_REF(VP8_FRAME_ALTREF) ->tf.f, frame); -+ ctx->previous_frame = ff_tx1_safe_get_ref(SAFE_REF(VP8_FRAME_PREVIOUS)->tf.f, frame); ++ ctx->golden_frame = ff_nvtegra_safe_get_ref(SAFE_REF(VP8_FRAME_GOLDEN) ->tf.f, frame); ++ ctx->altref_frame = ff_nvtegra_safe_get_ref(SAFE_REF(VP8_FRAME_ALTREF) ->tf.f, frame); ++ ctx->previous_frame = ff_nvtegra_safe_get_ref(SAFE_REF(VP8_FRAME_PREVIOUS)->tf.f, frame); + + return 0; +} + -+static int tx1_vp8_end_frame(AVCodecContext *avctx) { -+ VP8Context *h = avctx->priv_data; -+ TX1VP8DecodeContext *ctx = avctx->internal->hwaccel_priv_data; -+ AVFrame *frame = h->framep[VP8_FRAME_CURRENT]->tf.f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; ++static int nvtegra_vp8_end_frame(AVCodecContext *avctx) { ++ VP8Context *h = avctx->priv_data; ++ NVTegraVP8DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ AVFrame *frame = h->framep[VP8_FRAME_CURRENT]->tf.f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; + + nvdec_vp8_pic_s *setup; + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Ending VP8-TX1 frame with %u slices -> %u bytes\n", ++ av_log(avctx, AV_LOG_DEBUG, "Ending VP8-NVTEGRA frame with %u slices -> %u bytes\n", + ctx->core.num_slices, ctx->core.bitstream_len); + + if (!tf || !ctx->core.num_slices) + return 0; + -+ mem = ff_tx1_map_get_addr((AVTX1Map *)tf->input_map_ref->data); ++ mem = ff_nvtegra_map_get_addr((AVNVTegraMap *)tf->input_map_ref->data); + + setup = (nvdec_vp8_pic_s *)(mem + ctx->core.pic_setup_off); + setup->VLDBufferSize = ctx->core.bitstream_len; + -+ err = tx1_vp8_prepare_cmdbuf(&ctx->core.cmdbuf, h, ctx, frame); ++ err = nvtegra_vp8_prepare_cmdbuf(&ctx->core.cmdbuf, h, ctx, frame); + if (err < 0) + return err; + -+ return ff_tx1_end_frame(avctx, frame, &ctx->core, NULL, 0); ++ return ff_nvtegra_end_frame(avctx, frame, &ctx->core, NULL, 0); +} + -+static int tx1_vp8_decode_slice(AVCodecContext *avctx, const uint8_t *buf, -+ uint32_t buf_size) ++static int nvtegra_vp8_decode_slice(AVCodecContext *avctx, const uint8_t *buf, ++ uint32_t buf_size) +{ + VP8Context *h = avctx->priv_data; + AVFrame *frame = h->framep[VP8_FRAME_CURRENT]->tf.f; + + int offset = h->keyframe ? 10 : 3; + -+ return ff_tx1_decode_slice(avctx, frame, buf + offset, buf_size - offset, false); -+} -+ -+#if CONFIG_VP8_TX1_HWACCEL -+const FFHWAccel ff_vp8_tx1_hwaccel = { -+ .p.name = "vp8_tx1", -+ .p.type = AVMEDIA_TYPE_VIDEO, -+ .p.id = AV_CODEC_ID_VP8, -+ .p.pix_fmt = AV_PIX_FMT_TX1, -+ .start_frame = &tx1_vp8_start_frame, -+ .end_frame = &tx1_vp8_end_frame, -+ .decode_slice = &tx1_vp8_decode_slice, -+ .init = &tx1_vp8_decode_init, -+ .uninit = &tx1_vp8_decode_uninit, -+ .frame_params = &ff_tx1_frame_params, -+ .priv_data_size = sizeof(TX1VP8DecodeContext), -+ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, ++ return ff_nvtegra_decode_slice(avctx, frame, buf + offset, buf_size - offset, false); ++} ++ ++#if CONFIG_VP8_NVTEGRA_HWACCEL ++const FFHWAccel ff_vp8_nvtegra_hwaccel = { ++ .p.name = "vp8_nvtegra", ++ .p.type = AVMEDIA_TYPE_VIDEO, ++ .p.id = AV_CODEC_ID_VP8, ++ .p.pix_fmt = AV_PIX_FMT_NVTEGRA, ++ .start_frame = &nvtegra_vp8_start_frame, ++ .end_frame = &nvtegra_vp8_end_frame, ++ .decode_slice = &nvtegra_vp8_decode_slice, ++ .init = &nvtegra_vp8_decode_init, ++ .uninit = &nvtegra_vp8_decode_uninit, ++ .frame_params = &ff_nvtegra_frame_params, ++ .priv_data_size = sizeof(NVTegraVP8DecodeContext), ++ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; +#endif -diff --git a/libavcodec/tx1_vp9.c b/libavcodec/tx1_vp9.c +diff --git a/libavcodec/nvtegra_vp9.c b/libavcodec/nvtegra_vp9.c new file mode 100644 -index 0000000000..06572827ba +index 0000000000..c4111ce8f5 --- /dev/null -+++ b/libavcodec/tx1_vp9.c ++++ b/libavcodec/nvtegra_vp9.c @@ -0,0 +1,670 @@ +/* + * Copyright (c) 2023 averne @@ -4047,24 +4047,24 @@ index 0000000000..06572827ba +#include "vp9data.h" +#include "vp9dec.h" +#include "decode.h" -+#include "tx1_decode.h" ++#include "nvtegra_decode.h" + +#include "libavutil/pixdesc.h" -+#include "libavutil/tx1_host1x.h" ++#include "libavutil/nvtegra_host1x.h" + -+typedef struct TX1VP9DecodeContext { -+ TX1DecodeContext core; ++typedef struct NVTegraVP9DecodeContext { ++ NVTegraDecodeContext core; + + uint32_t prob_tab_off; + -+ AVTX1Map common_map; ++ AVNVTegraMap common_map; + uint32_t segment_rw1_off, segment_rw2_off, tile_sizes_off, filter_off, + col_mvrw1_off, col_mvrw2_off, ctx_counter_off; + + bool prev_show_frame; + + AVFrame *refs[3]; -+} TX1VP9DecodeContext; ++} NVTegraVP9DecodeContext; + +/* Size (width, height) of a macroblock */ +#define MB_SIZE 16 @@ -4077,29 +4077,29 @@ index 0000000000..06572827ba +/* Prediction modes aren't layed out in the same order in ffmpeg's defaults than in hardware */ +static const uint8_t pmconv[] = { 2, 0, 1, 3, 4, 5, 6, 8, 7, 9 }; + -+static int tx1_vp9_decode_uninit(AVCodecContext *avctx) { -+ TX1VP9DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_vp9_decode_uninit(AVCodecContext *avctx) { ++ NVTegraVP9DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Deinitializing TX1 VP9 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Deinitializing NVTEGRA VP9 decoder\n"); + -+ err = ff_tx1_map_destroy(&ctx->common_map); ++ err = ff_nvtegra_map_destroy(&ctx->common_map); + if (err < 0) + return err; + -+ err = ff_tx1_decode_uninit(avctx, &ctx->core); ++ err = ff_nvtegra_decode_uninit(avctx, &ctx->core); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_vp9_decode_init(AVCodecContext *avctx) { -+ TX1VP9DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_vp9_decode_init(AVCodecContext *avctx) { ++ NVTegraVP9DecodeContext *ctx = avctx->internal->hwaccel_priv_data; +#ifdef __SWITCH__ -+ AVHWDeviceContext *hw_device_ctx; -+ AVTX1DeviceContext *device_hwctx; ++ AVHWDeviceContext *hw_device_ctx; ++ AVNVTegraDeviceContext *device_hwctx; +#endif + + uint32_t aligned_width, aligned_height, max_sb_size, @@ -4108,24 +4108,24 @@ index 0000000000..06572827ba + uint8_t *mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Initializing TX1 VP9 decoder\n"); ++ av_log(avctx, AV_LOG_DEBUG, "Initializing NVTEGRA VP9 decoder\n"); + + ctx->core.pic_setup_off = 0; + ctx->core.status_off = FFALIGN(ctx->core.pic_setup_off + sizeof(nvdec_vp9_pic_s), -+ FF_TX1_MAP_ALIGN); ++ FF_NVTEGRA_MAP_ALIGN); + ctx->core.cmdbuf_off = FFALIGN(ctx->core.status_off + sizeof(nvdec_status_s), -+ FF_TX1_MAP_ALIGN); -+ ctx->prob_tab_off = FFALIGN(ctx->core.cmdbuf_off + 2*FF_TX1_MAP_ALIGN, -+ FF_TX1_MAP_ALIGN); -+ ctx->core.bitstream_off = FFALIGN(ctx->prob_tab_off + 0xf00, -+ FF_TX1_MAP_ALIGN); -+ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_tx1_decode_pick_bitstream_buffer_size(avctx), ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->prob_tab_off = FFALIGN(ctx->core.cmdbuf_off + 2*FF_NVTEGRA_MAP_ALIGN, ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.bitstream_off = FFALIGN(ctx->prob_tab_off + sizeof(nvdec_vp9EntropyProbs_t), ++ FF_NVTEGRA_MAP_ALIGN); ++ ctx->core.input_map_size = FFALIGN(ctx->core.bitstream_off + ff_nvtegra_decode_pick_bitstream_buffer_size(avctx), + 0x1000); + + ctx->core.max_cmdbuf_size = ctx->prob_tab_off - ctx->core.cmdbuf_off; + ctx->core.max_bitstream_size = ctx->core.input_map_size - ctx->core.bitstream_off; + -+ err = ff_tx1_decode_init(avctx, &ctx->core); ++ err = ff_nvtegra_decode_init(avctx, &ctx->core); + if (err < 0) + goto fail; + @@ -4138,12 +4138,12 @@ index 0000000000..06572827ba + ctx_counter_size = FFALIGN(sizeof(nvdec_vp9EntropyCounts_t), 0x100); + + ctx->segment_rw1_off = 0; -+ ctx->segment_rw2_off = FFALIGN(ctx->segment_rw1_off + segment_rw_size, FF_TX1_MAP_ALIGN); -+ ctx->tile_sizes_off = FFALIGN(ctx->segment_rw2_off + segment_rw_size, FF_TX1_MAP_ALIGN); -+ ctx->filter_off = FFALIGN(ctx->tile_sizes_off + 0x700, FF_TX1_MAP_ALIGN); -+ ctx->col_mvrw1_off = FFALIGN(ctx->filter_off + filter_size, FF_TX1_MAP_ALIGN); -+ ctx->col_mvrw2_off = FFALIGN(ctx->col_mvrw1_off + col_mvrw_size, FF_TX1_MAP_ALIGN); -+ ctx->ctx_counter_off = FFALIGN(ctx->col_mvrw2_off + col_mvrw_size, FF_TX1_MAP_ALIGN); ++ ctx->segment_rw2_off = FFALIGN(ctx->segment_rw1_off + segment_rw_size, FF_NVTEGRA_MAP_ALIGN); ++ ctx->tile_sizes_off = FFALIGN(ctx->segment_rw2_off + segment_rw_size, FF_NVTEGRA_MAP_ALIGN); ++ ctx->filter_off = FFALIGN(ctx->tile_sizes_off + 0x700, FF_NVTEGRA_MAP_ALIGN); ++ ctx->col_mvrw1_off = FFALIGN(ctx->filter_off + filter_size, FF_NVTEGRA_MAP_ALIGN); ++ ctx->col_mvrw2_off = FFALIGN(ctx->col_mvrw1_off + col_mvrw_size, FF_NVTEGRA_MAP_ALIGN); ++ ctx->ctx_counter_off = FFALIGN(ctx->col_mvrw2_off + col_mvrw_size, FF_NVTEGRA_MAP_ALIGN); + common_map_size = FFALIGN(ctx->ctx_counter_off + ctx_counter_size, 0x1000); + +#ifdef __SWITCH__ @@ -4153,11 +4153,11 @@ index 0000000000..06572827ba + ctx->common_map.owner = device_hwctx->nvdec_channel.channel.fd; +#endif + -+ err = ff_tx1_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); ++ err = ff_nvtegra_map_create(&ctx->common_map, common_map_size, 0x100, NVMAP_CACHE_OP_INV); + if (err < 0) + goto fail; + -+ mem = ff_tx1_map_get_addr(&ctx->common_map); ++ mem = ff_nvtegra_map_get_addr(&ctx->common_map); + + memset(mem + ctx->segment_rw1_off, 0, segment_rw_size); + memset(mem + ctx->segment_rw2_off, 0, segment_rw_size); @@ -4174,11 +4174,11 @@ index 0000000000..06572827ba + return 0; + +fail: -+ tx1_vp9_decode_uninit(avctx); ++ nvtegra_vp9_decode_uninit(avctx); + return err; +} + -+static void tx1_vp9_init_probs(nvdec_vp9EntropyProbs_t *probs) { ++static void nvtegra_vp9_init_probs(nvdec_vp9EntropyProbs_t *probs) { + int i, j; + + for (i = 0; i < FF_ARRAY_ELEMS(probs->kf_bmode_prob); ++i) { @@ -4191,8 +4191,8 @@ index 0000000000..06572827ba + } +} + -+static void tx1_vp9_update_probs(nvdec_vp9EntropyProbs_t *probs, -+ VP9Context *s, bool init) ++static void nvtegra_vp9_update_probs(nvdec_vp9EntropyProbs_t *probs, ++ VP9Context *s, bool init) +{ + ProbContext *p = &s->prob.p; + @@ -4200,7 +4200,7 @@ index 0000000000..06572827ba + + if (init) { + memset(probs, 0, sizeof(nvdec_vp9EntropyProbs_t)); -+ tx1_vp9_init_probs(probs); ++ nvtegra_vp9_init_probs(probs); + } + + for (i = 0; i < FF_ARRAY_ELEMS(probs->ref_pred_probs); ++i) @@ -4276,7 +4276,7 @@ index 0000000000..06572827ba + } +} + -+static void tx1_vp9_set_tile_sizes(uint16_t *sizes, VP9Context *s) { ++static void nvtegra_vp9_set_tile_sizes(uint16_t *sizes, VP9Context *s) { + int i, j; + + for (i = 0; i < s->s.h.tiling.tile_rows; ++i) { @@ -4290,8 +4290,8 @@ index 0000000000..06572827ba + } +} + -+static void tx1_vp9_update_counts(nvdec_vp9EntropyCounts_t *cts, -+ VP9TileData *td) ++static void nvtegra_vp9_update_counts(nvdec_vp9EntropyCounts_t *cts, ++ VP9TileData *td) +{ + int i, j, k, l; + @@ -4366,8 +4366,8 @@ index 0000000000..06572827ba + } +} + -+static void tx1_vp9_prepare_frame_setup(nvdec_vp9_pic_s *setup, AVCodecContext *avctx, -+ TX1VP9DecodeContext *ctx) ++static void nvtegra_vp9_prepare_frame_setup(nvdec_vp9_pic_s *setup, AVCodecContext *avctx, ++ NVTegraVP9DecodeContext *ctx) +{ + VP9Context *s = avctx->priv_data; + VP9SharedContext *h = &s->s; @@ -4478,12 +4478,12 @@ index 0000000000..06572827ba + ctx->prev_show_frame = !h->h.invisible; +} + -+static int tx1_vp9_prepare_cmdbuf(AVTX1Cmdbuf *cmdbuf, VP9SharedContext *h, -+ TX1VP9DecodeContext *ctx, AVFrame *cur_frame) ++static int nvtegra_vp9_prepare_cmdbuf(AVNVTegraCmdbuf *cmdbuf, VP9SharedContext *h, ++ NVTegraVP9DecodeContext *ctx, AVFrame *cur_frame) +{ -+ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; -+ AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; ++ FrameDecodeData *fdd = (FrameDecodeData *)cur_frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; ++ AVNVTegraMap *input_map = (AVNVTegraMap *)tf->input_map_ref->data; + + uint32_t col_mvwrite_off, col_mvread_off; + int err; @@ -4493,49 +4493,49 @@ index 0000000000..06572827ba + else + col_mvwrite_off = ctx->col_mvrw2_off, col_mvread_off = ctx->col_mvrw1_off; + -+ err = ff_tx1_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); ++ err = ff_nvtegra_cmdbuf_begin(cmdbuf, HOST1X_CLASS_NVDEC); + if (err < 0) + return err; + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, -+ FF_TX1_ENUM(NVC5B0_SET_APPLICATION_ID, ID, VP9)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, -+ FF_TX1_ENUM (NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, VP9) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | -+ FF_TX1_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, -+ FF_TX1_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, -+ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, -+ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, -+ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_PROB_TAB_BUF_OFFSET, -+ input_map, ctx->prob_tab_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_CTX_COUNTER_BUF_OFFSET, -+ &ctx->common_map, ctx->ctx_counter_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_TILE_SIZE_BUF_OFFSET, -+ &ctx->common_map, ctx->tile_sizes_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_COL_MVWRITE_BUF_OFFSET, -+ &ctx->common_map, col_mvwrite_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_COL_MVREAD_BUF_OFFSET, -+ &ctx->common_map, col_mvread_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_SEGMENT_READ_BUF_OFFSET, -+ &ctx->common_map, ctx->segment_rw1_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_SEGMENT_WRITE_BUF_OFFSET, -+ &ctx->common_map, ctx->segment_rw2_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_FILTER_BUFFER_OFFSET, -+ &ctx->common_map, ctx->filter_off, NVHOST_RELOC_TYPE_DEFAULT); -+ -+#define PUSH_FRAME(fr, offset) ({ \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ -+ ff_tx1_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ -+ NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_APPLICATION_ID, ++ FF_NVTEGRA_ENUM(NVC5B0_SET_APPLICATION_ID, ID, VP9)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_CONTROL_PARAMS, ++ FF_NVTEGRA_ENUM (NVC5B0_SET_CONTROL_PARAMS, CODEC_TYPE, VP9) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, ERR_CONCEAL_ON, 1) | ++ FF_NVTEGRA_VALUE(NVC5B0_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_SET_PICTURE_INDEX, ++ FF_NVTEGRA_VALUE(NVC5B0_SET_PICTURE_INDEX, INDEX, ctx->core.frame_idx)); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_DRV_PIC_SETUP_OFFSET, ++ input_map, ctx->core.pic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_IN_BUF_BASE_OFFSET, ++ input_map, ctx->core.bitstream_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_NVDEC_STATUS_OFFSET, ++ input_map, ctx->core.status_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_PROB_TAB_BUF_OFFSET, ++ input_map, ctx->prob_tab_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_CTX_COUNTER_BUF_OFFSET, ++ &ctx->common_map, ctx->ctx_counter_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_TILE_SIZE_BUF_OFFSET, ++ &ctx->common_map, ctx->tile_sizes_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_COL_MVWRITE_BUF_OFFSET, ++ &ctx->common_map, col_mvwrite_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_COL_MVREAD_BUF_OFFSET, ++ &ctx->common_map, col_mvread_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_SEGMENT_READ_BUF_OFFSET, ++ &ctx->common_map, ctx->segment_rw1_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_SEGMENT_WRITE_BUF_OFFSET, ++ &ctx->common_map, ctx->segment_rw2_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_VP9_SET_FILTER_BUFFER_OFFSET, ++ &ctx->common_map, ctx->filter_off, NVHOST_RELOC_TYPE_DEFAULT); ++ ++#define PUSH_FRAME(fr, offset) ({ \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_LUMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), 0, NVHOST_RELOC_TYPE_DEFAULT); \ ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVC5B0_SET_PICTURE_CHROMA_OFFSET0 + offset * 4, \ ++ ff_nvtegra_frame_get_fbuf_map(fr), fr->data[1] - fr->data[0], \ ++ NVHOST_RELOC_TYPE_DEFAULT); \ +}) + + PUSH_FRAME(ctx->refs[0], 0); @@ -4543,10 +4543,10 @@ index 0000000000..06572827ba + PUSH_FRAME(ctx->refs[2], 2); + PUSH_FRAME(cur_frame, 3); + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, -+ FF_TX1_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVC5B0_EXECUTE, ++ FF_NVTEGRA_ENUM(NVC5B0_EXECUTE, AWAKEN, ENABLE)); + -+ err = ff_tx1_cmdbuf_end(cmdbuf); ++ err = ff_nvtegra_cmdbuf_end(cmdbuf); + if (err < 0) + return err; + @@ -4556,19 +4556,19 @@ index 0000000000..06572827ba + return 0; +} + -+static int tx1_vp9_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { -+ VP9Context *s = avctx->priv_data; -+ VP9SharedContext *h = &s->s; -+ AVFrame *frame = h->frames[CUR_FRAME].tf.f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1VP9DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++static int nvtegra_vp9_start_frame(AVCodecContext *avctx, const uint8_t *buf, uint32_t buf_size) { ++ VP9Context *s = avctx->priv_data; ++ VP9SharedContext *h = &s->s; ++ AVFrame *frame = h->frames[CUR_FRAME].tf.f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraVP9DecodeContext *ctx = avctx->internal->hwaccel_priv_data; + -+ TX1Frame *tf; -+ AVTX1Map *input_map; ++ NVTegraFrame *tf; ++ AVNVTegraMap *input_map; + uint8_t *mem, *common_mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Starting VP9-TX1 frame with pixel format %s\n", ++ av_log(avctx, AV_LOG_DEBUG, "Starting VP9-NVTEGRA frame with pixel format %s\n", + av_get_pix_fmt_name(avctx->sw_pix_fmt)); + + if (s->s.h.refreshctx && s->s.h.parallelmode) { @@ -4589,53 +4589,53 @@ index 0000000000..06572827ba + s->prob_ctx[s->s.h.framectxid].p = s->prob.p; + } + -+ err = ff_tx1_start_frame(avctx, frame, &ctx->core); ++ err = ff_nvtegra_start_frame(avctx, frame, &ctx->core); + if (err < 0) + return err; + + tf = fdd->hwaccel_priv; -+ input_map = (AVTX1Map *)tf->input_map_ref->data; -+ mem = ff_tx1_map_get_addr(input_map), common_mem = ff_tx1_map_get_addr(&ctx->common_map); ++ input_map = (AVNVTegraMap *)tf->input_map_ref->data; ++ mem = ff_nvtegra_map_get_addr(input_map), common_mem = ff_nvtegra_map_get_addr(&ctx->common_map); + -+ tx1_vp9_prepare_frame_setup((nvdec_vp9_pic_s *)(mem + ctx->core.pic_setup_off), avctx, ctx); -+ tx1_vp9_set_tile_sizes((uint16_t *)(common_mem + ctx->tile_sizes_off), s); -+ tx1_vp9_update_probs((nvdec_vp9EntropyProbs_t *)(mem + ctx->prob_tab_off), s, ctx->core.new_input_buffer); ++ nvtegra_vp9_prepare_frame_setup((nvdec_vp9_pic_s *)(mem + ctx->core.pic_setup_off), avctx, ctx); ++ nvtegra_vp9_set_tile_sizes((uint16_t *)(common_mem + ctx->tile_sizes_off), s); ++ nvtegra_vp9_update_probs((nvdec_vp9EntropyProbs_t *)(mem + ctx->prob_tab_off), s, ctx->core.new_input_buffer); + -+ ctx->refs[0] = ff_tx1_safe_get_ref(h->refs[h->h.refidx[0]].f, h->frames[CUR_FRAME].tf.f); -+ ctx->refs[1] = ff_tx1_safe_get_ref(h->refs[h->h.refidx[1]].f, h->frames[CUR_FRAME].tf.f); -+ ctx->refs[2] = ff_tx1_safe_get_ref(h->refs[h->h.refidx[2]].f, h->frames[CUR_FRAME].tf.f); ++ ctx->refs[0] = ff_nvtegra_safe_get_ref(h->refs[h->h.refidx[0]].f, h->frames[CUR_FRAME].tf.f); ++ ctx->refs[1] = ff_nvtegra_safe_get_ref(h->refs[h->h.refidx[1]].f, h->frames[CUR_FRAME].tf.f); ++ ctx->refs[2] = ff_nvtegra_safe_get_ref(h->refs[h->h.refidx[2]].f, h->frames[CUR_FRAME].tf.f); + + return 0; +} + -+static int tx1_vp9_end_frame(AVCodecContext *avctx) { -+ VP9Context *s = avctx->priv_data; -+ VP9SharedContext *h = avctx->priv_data; -+ TX1VP9DecodeContext *ctx = avctx->internal->hwaccel_priv_data; -+ AVFrame *frame = h->frames[CUR_FRAME].tf.f; -+ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; -+ TX1Frame *tf = fdd->hwaccel_priv; ++static int nvtegra_vp9_end_frame(AVCodecContext *avctx) { ++ VP9Context *s = avctx->priv_data; ++ VP9SharedContext *h = avctx->priv_data; ++ NVTegraVP9DecodeContext *ctx = avctx->internal->hwaccel_priv_data; ++ AVFrame *frame = h->frames[CUR_FRAME].tf.f; ++ FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; ++ NVTegraFrame *tf = fdd->hwaccel_priv; + + nvdec_vp9_pic_s *setup; + uint8_t *mem, *common_mem; + int err; + -+ av_log(avctx, AV_LOG_DEBUG, "Ending VP9-TX1 frame with %u slices -> %u bytes\n", ++ av_log(avctx, AV_LOG_DEBUG, "Ending VP9-NVTEGRA frame with %u slices -> %u bytes\n", + ctx->core.num_slices, ctx->core.bitstream_len); + + if (!tf || !ctx->core.num_slices) + return 0; + -+ mem = ff_tx1_map_get_addr((AVTX1Map *)tf->input_map_ref->data); ++ mem = ff_nvtegra_map_get_addr((AVNVTegraMap *)tf->input_map_ref->data); + + setup = (nvdec_vp9_pic_s *)(mem + ctx->core.pic_setup_off); + setup->bitstream_size = ctx->core.bitstream_len; + -+ err = tx1_vp9_prepare_cmdbuf(&ctx->core.cmdbuf, h, ctx, frame); ++ err = nvtegra_vp9_prepare_cmdbuf(&ctx->core.cmdbuf, h, ctx, frame); + if (err < 0) + return err; + -+ err = ff_tx1_end_frame(avctx, frame, &ctx->core, NULL, 0); ++ err = ff_nvtegra_end_frame(avctx, frame, &ctx->core, NULL, 0); + if (err < 0) + return err; + @@ -4645,49 +4645,49 @@ index 0000000000..06572827ba + * we need to wait for the decode operation to complete. + */ + if (!s->s.h.errorres && !s->s.h.parallelmode) { -+ err = ff_tx1_wait_decode(avctx, frame); ++ err = ff_nvtegra_wait_decode(avctx, frame); + if (err < 0) + return err; + -+ common_mem = ff_tx1_map_get_addr(&ctx->common_map); ++ common_mem = ff_nvtegra_map_get_addr(&ctx->common_map); + -+ tx1_vp9_update_counts((nvdec_vp9EntropyCounts_t *)(common_mem + ctx->ctx_counter_off), -+ s->td); ++ nvtegra_vp9_update_counts((nvdec_vp9EntropyCounts_t *)(common_mem + ctx->ctx_counter_off), ++ s->td); + ff_vp9_adapt_probs(s); + } + + return 0; +} + -+static int tx1_vp9_decode_slice(AVCodecContext *avctx, const uint8_t *buf, -+ uint32_t buf_size) ++static int nvtegra_vp9_decode_slice(AVCodecContext *avctx, const uint8_t *buf, ++ uint32_t buf_size) +{ + VP9SharedContext *h = avctx->priv_data; + AVFrame *frame = h->frames[CUR_FRAME].tf.f; + + int offset = h->h.uncompressed_header_size + h->h.compressed_header_size; + -+ return ff_tx1_decode_slice(avctx, frame, buf + offset, buf_size - offset, false); -+} -+ -+#if CONFIG_VP9_TX1_HWACCEL -+const FFHWAccel ff_vp9_tx1_hwaccel = { -+ .p.name = "vp9_tx1", -+ .p.type = AVMEDIA_TYPE_VIDEO, -+ .p.id = AV_CODEC_ID_VP9, -+ .p.pix_fmt = AV_PIX_FMT_TX1, -+ .start_frame = &tx1_vp9_start_frame, -+ .end_frame = &tx1_vp9_end_frame, -+ .decode_slice = &tx1_vp9_decode_slice, -+ .init = &tx1_vp9_decode_init, -+ .uninit = &tx1_vp9_decode_uninit, -+ .frame_params = &ff_tx1_frame_params, -+ .priv_data_size = sizeof(TX1VP9DecodeContext), -+ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, ++ return ff_nvtegra_decode_slice(avctx, frame, buf + offset, buf_size - offset, false); ++} ++ ++#if CONFIG_VP9_NVTEGRA_HWACCEL ++const FFHWAccel ff_vp9_nvtegra_hwaccel = { ++ .p.name = "vp9_nvtegra", ++ .p.type = AVMEDIA_TYPE_VIDEO, ++ .p.id = AV_CODEC_ID_VP9, ++ .p.pix_fmt = AV_PIX_FMT_NVTEGRA, ++ .start_frame = &nvtegra_vp9_start_frame, ++ .end_frame = &nvtegra_vp9_end_frame, ++ .decode_slice = &nvtegra_vp9_decode_slice, ++ .init = &nvtegra_vp9_decode_init, ++ .uninit = &nvtegra_vp9_decode_uninit, ++ .frame_params = &ff_nvtegra_frame_params, ++ .priv_data_size = sizeof(NVTegraVP9DecodeContext), ++ .caps_internal = HWACCEL_CAP_ASYNC_SAFE, +}; +#endif diff --git a/libavcodec/vc1dec.c b/libavcodec/vc1dec.c -index 534128d6ee..e3b7551b88 100644 +index 534128d6ee..598d8c3bbc 100644 --- a/libavcodec/vc1dec.c +++ b/libavcodec/vc1dec.c @@ -1411,6 +1411,9 @@ static const enum AVPixelFormat vc1_hwaccel_pixfmt_list_420[] = { @@ -4695,8 +4695,8 @@ index 534128d6ee..e3b7551b88 100644 #if CONFIG_VC1_VDPAU_HWACCEL AV_PIX_FMT_VDPAU, +#endif -+#if CONFIG_VC1_TX1_HWACCEL -+ AV_PIX_FMT_TX1, ++#if CONFIG_VC1_NVTEGRA_HWACCEL ++ AV_PIX_FMT_NVTEGRA, #endif AV_PIX_FMT_YUV420P, AV_PIX_FMT_NONE @@ -4705,8 +4705,8 @@ index 534128d6ee..e3b7551b88 100644 #if CONFIG_VC1_VDPAU_HWACCEL HWACCEL_VDPAU(vc1), +#endif -+#if CONFIG_VC1_TX1_HWACCEL -+ HWACCEL_TX1(vc1), ++#if CONFIG_VC1_NVTEGRA_HWACCEL ++ HWACCEL_NVTEGRA(vc1), #endif NULL }, @@ -4715,13 +4715,13 @@ index 534128d6ee..e3b7551b88 100644 #if CONFIG_WMV3_VDPAU_HWACCEL HWACCEL_VDPAU(wmv3), +#endif -+#if CONFIG_WMV3_TX1_HWACCEL -+ HWACCEL_TX1(wmv3), ++#if CONFIG_WMV3_NVTEGRA_HWACCEL ++ HWACCEL_NVTEGRA(wmv3), #endif NULL }, diff --git a/libavcodec/vp8.c b/libavcodec/vp8.c -index ffc430dd32..171e017115 100644 +index ffc430dd32..42d31d9fc6 100644 --- a/libavcodec/vp8.c +++ b/libavcodec/vp8.c @@ -197,6 +197,9 @@ static enum AVPixelFormat get_pixel_format(VP8Context *s) @@ -4729,8 +4729,8 @@ index ffc430dd32..171e017115 100644 #if CONFIG_VP8_NVDEC_HWACCEL AV_PIX_FMT_CUDA, +#endif -+#if CONFIG_VP8_TX1_HWACCEL -+ AV_PIX_FMT_TX1, ++#if CONFIG_VP8_NVTEGRA_HWACCEL ++ AV_PIX_FMT_NVTEGRA, #endif AV_PIX_FMT_YUV420P, AV_PIX_FMT_NONE, @@ -4739,13 +4739,13 @@ index ffc430dd32..171e017115 100644 #if CONFIG_VP8_NVDEC_HWACCEL HWACCEL_NVDEC(vp8), +#endif -+#if CONFIG_VP8_TX1_HWACCEL -+ HWACCEL_TX1(vp8), ++#if CONFIG_VP8_NVTEGRA_HWACCEL ++ HWACCEL_NVTEGRA(vp8), #endif NULL }, diff --git a/libavcodec/vp9.c b/libavcodec/vp9.c -index 885500fdb4..48f020a34a 100644 +index 885500fdb4..8a7c1b173c 100644 --- a/libavcodec/vp9.c +++ b/libavcodec/vp9.c @@ -179,7 +179,8 @@ static int update_size(AVCodecContext *avctx, int w, int h) @@ -4754,7 +4754,7 @@ index 885500fdb4..48f020a34a 100644 CONFIG_VP9_VDPAU_HWACCEL + \ - CONFIG_VP9_VIDEOTOOLBOX_HWACCEL) + CONFIG_VP9_VIDEOTOOLBOX_HWACCEL + \ -+ CONFIG_VP9_TX1_HWACCEL) ++ CONFIG_VP9_NVTEGRA_HWACCEL) enum AVPixelFormat pix_fmts[HWACCEL_MAX + 2], *fmtp = pix_fmts; VP9Context *s = avctx->priv_data; uint8_t *p; @@ -4762,8 +4762,8 @@ index 885500fdb4..48f020a34a 100644 switch (s->pix_fmt) { case AV_PIX_FMT_YUV420P: -+#if CONFIG_VP9_TX1_HWACCEL -+ *fmtp++ = AV_PIX_FMT_TX1; ++#if CONFIG_VP9_NVTEGRA_HWACCEL ++ *fmtp++ = AV_PIX_FMT_NVTEGRA; +#endif + /* fallthrough */ case AV_PIX_FMT_YUV420P10: @@ -4774,50 +4774,64 @@ index 885500fdb4..48f020a34a 100644 #if CONFIG_VP9_VIDEOTOOLBOX_HWACCEL HWACCEL_VIDEOTOOLBOX(vp9), +#endif -+#if CONFIG_VP9_TX1_HWACCEL -+ HWACCEL_TX1(vp9), ++#if CONFIG_VP9_NVTEGRA_HWACCEL ++ HWACCEL_NVTEGRA(vp9), #endif NULL }, diff --git a/libavutil/Makefile b/libavutil/Makefile -index 4711f8cde8..f339d6d37d 100644 +index 4711f8cde8..d0a09397f6 100644 --- a/libavutil/Makefile +++ b/libavutil/Makefile -@@ -51,6 +51,11 @@ HEADERS = adler32.h \ +@@ -51,6 +51,10 @@ HEADERS = adler32.h \ hwcontext_videotoolbox.h \ hwcontext_vdpau.h \ hwcontext_vulkan.h \ -+ hwcontext_tx1.h \ -+ tx1.h \ -+ tx1_host1x.h \ ++ hwcontext_nvtegra.h \ ++ nvtegra.h \ + nvhost_ioctl.h \ + nvmap_ioctl.h \ imgutils.h \ intfloat.h \ intreadwrite.h \ -@@ -202,6 +207,7 @@ OBJS-$(CONFIG_VDPAU) += hwcontext_vdpau.o +@@ -202,6 +206,7 @@ OBJS-$(CONFIG_VDPAU) += hwcontext_vdpau.o OBJS-$(CONFIG_VULKAN) += hwcontext_vulkan.o vulkan.o OBJS-$(!CONFIG_VULKAN) += hwcontext_stub.o -+OBJS-$(CONFIG_TX1) += hwcontext_tx1.o tx1.o ++OBJS-$(CONFIG_NVTEGRA) += hwcontext_nvtegra.o nvtegra.o OBJS += $(COMPAT_OBJS:%=../compat/%) -@@ -222,6 +228,9 @@ SKIPHEADERS-$(CONFIG_VDPAU) += hwcontext_vdpau.h +@@ -222,6 +227,9 @@ SKIPHEADERS-$(CONFIG_VDPAU) += hwcontext_vdpau.h SKIPHEADERS-$(CONFIG_VULKAN) += hwcontext_vulkan.h vulkan.h \ vulkan_functions.h \ vulkan_loader.h -+SKIPHEADERS-$(CONFIG_TX1) += hwcontext_tx1.h \ -+ tx1.h \ -+ tx1_host1x.h ++SKIPHEADERS-$(CONFIG_NVTEGRA) += hwcontext_nvtegra.h \ ++ nvtegra.h \ ++ nvtegra_host1x.h TESTPROGS = adler32 \ aes \ diff --git a/libavutil/buffer.c b/libavutil/buffer.c -index e4562a79b1..51372f5be6 100644 +index e4562a79b1..5b6e329fc7 100644 --- a/libavutil/buffer.c +++ b/libavutil/buffer.c -@@ -90,6 +90,28 @@ AVBufferRef *av_buffer_alloc(size_t size) +@@ -16,9 +16,14 @@ + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ + ++#include "config.h" ++ + #include + #include + #include ++#if HAVE_MALLOC_H ++#include ++#endif + + #include "avassert.h" + #include "buffer_internal.h" +@@ -90,6 +95,32 @@ AVBufferRef *av_buffer_alloc(size_t size) return ret; } @@ -4829,8 +4843,12 @@ index e4562a79b1..51372f5be6 100644 +#if HAVE_POSIX_MEMALIGN + if (posix_memalign((void **)&data, align, size)) + return NULL; -+#else ++#elif HAVE_ALIGNED_MALLOC + data = aligned_alloc(align, size); ++#elif HAVE_MEMALIGN ++ data = memalign(align, size); ++#else ++ return NULL; +#endif + + if (!data) @@ -5772,21 +5790,8 @@ index 1e0607d581..c5023d7295 100644 if (!atomic_exchange_explicit(&printed, 1, memory_order_relaxed)) av_log(NULL, AV_LOG_DEBUG, "detected %d logical cores\n", nb_cpus); -diff --git a/libavutil/frame.c b/libavutil/frame.c -index a3f07ca089..95eb9235c1 100644 ---- a/libavutil/frame.c -+++ b/libavutil/frame.c -@@ -152,7 +152,7 @@ static int get_video_buffer(AVFrame *frame, int align) - total_size += sizes[i]; - } - -- frame->buf[0] = av_buffer_alloc(total_size); -+ frame->buf[0] = av_buffer_aligned_alloc(total_size, 0x100); - if (!frame->buf[0]) { - ret = AVERROR(ENOMEM); - goto fail; diff --git a/libavutil/hwcontext.c b/libavutil/hwcontext.c -index 3650d4653a..32138ed6d9 100644 +index 3650d4653a..24771e9f11 100644 --- a/libavutil/hwcontext.c +++ b/libavutil/hwcontext.c @@ -62,6 +62,9 @@ static const HWContextType * const hw_table[] = { @@ -5794,8 +5799,8 @@ index 3650d4653a..32138ed6d9 100644 #if CONFIG_VULKAN &ff_hwcontext_type_vulkan, +#endif -+#if CONFIG_TX1 -+ &ff_hwcontext_type_tx1, ++#if CONFIG_NVTEGRA ++ &ff_hwcontext_type_nvtegra, #endif NULL, }; @@ -5803,48 +5808,39 @@ index 3650d4653a..32138ed6d9 100644 [AV_HWDEVICE_TYPE_VIDEOTOOLBOX] = "videotoolbox", [AV_HWDEVICE_TYPE_MEDIACODEC] = "mediacodec", [AV_HWDEVICE_TYPE_VULKAN] = "vulkan", -+ [AV_HWDEVICE_TYPE_TX1] = "tx1", ++ [AV_HWDEVICE_TYPE_NVTEGRA] = "nvtegra", }; enum AVHWDeviceType av_hwdevice_find_type_by_name(const char *name) -@@ -427,7 +431,7 @@ static int transfer_data_alloc(AVFrame *dst, const AVFrame *src, int flags) - frame_tmp->width = ctx->width; - frame_tmp->height = ctx->height; - -- ret = av_frame_get_buffer(frame_tmp, 0); -+ ret = av_frame_get_buffer(frame_tmp, 0x100); - if (ret < 0) - goto fail; - diff --git a/libavutil/hwcontext.h b/libavutil/hwcontext.h -index 7ff08c8608..9a994c7784 100644 +index 7ff08c8608..09d86e128c 100644 --- a/libavutil/hwcontext.h +++ b/libavutil/hwcontext.h @@ -37,6 +37,7 @@ enum AVHWDeviceType { AV_HWDEVICE_TYPE_OPENCL, AV_HWDEVICE_TYPE_MEDIACODEC, AV_HWDEVICE_TYPE_VULKAN, -+ AV_HWDEVICE_TYPE_TX1, ++ AV_HWDEVICE_TYPE_NVTEGRA, }; typedef struct AVHWDeviceInternal AVHWDeviceInternal; diff --git a/libavutil/hwcontext_internal.h b/libavutil/hwcontext_internal.h -index e6266494ac..ed3e641c02 100644 +index e6266494ac..d0fab2a950 100644 --- a/libavutil/hwcontext_internal.h +++ b/libavutil/hwcontext_internal.h @@ -174,5 +174,6 @@ extern const HWContextType ff_hwcontext_type_vdpau; extern const HWContextType ff_hwcontext_type_videotoolbox; extern const HWContextType ff_hwcontext_type_mediacodec; extern const HWContextType ff_hwcontext_type_vulkan; -+extern const HWContextType ff_hwcontext_type_tx1; ++extern const HWContextType ff_hwcontext_type_nvtegra; #endif /* AVUTIL_HWCONTEXT_INTERNAL_H */ -diff --git a/libavutil/hwcontext_tx1.c b/libavutil/hwcontext_tx1.c +diff --git a/libavutil/hwcontext_nvtegra.c b/libavutil/hwcontext_nvtegra.c new file mode 100644 -index 0000000000..e833d8e3cb +index 0000000000..2eef9a9715 --- /dev/null -+++ b/libavutil/hwcontext_tx1.c -@@ -0,0 +1,1052 @@ ++++ b/libavutil/hwcontext_nvtegra.c +@@ -0,0 +1,1136 @@ +/* + * Copyright (c) 2023 averne + * @@ -5866,8 +5862,6 @@ index 0000000000..e833d8e3cb + */ + +#include -+#include -+#include + +#include "config.h" +#include "pixdesc.h" @@ -5881,15 +5875,28 @@ index 0000000000..e833d8e3cb + +#include "nvhost_ioctl.h" +#include "nvmap_ioctl.h" -+#include "tx1_host1x.h" ++#include "nvtegra_host1x.h" +#include "clb0b6.h" +#include "vic_drv.h" + -+#include "hwcontext_tx1.h" ++#include "hwcontext_nvtegra.h" + -+#ifndef __SWITCH__ -+int g_nvmap_fd = 0, g_nvhost_fd = 0; -+#endif ++typedef struct NVTegraDevicePriv { ++ AVBufferRef *driver_state_ref; ++ ++ AVNVTegraMap vic_map; ++ AVNVTegraCmdbuf vic_cmdbuf; ++ uint32_t vic_setup_off, vic_cmdbuf_off, vic_filter_off; ++ uint32_t vic_max_cmdbuf_size; ++ ++ double framerate; ++ uint32_t dfs_lowcorner; ++ double dfs_decode_cycles_ema; ++ double dfs_ema_damping; ++ int dfs_bitrate_sum; ++ int dfs_cur_sample, dfs_num_samples; ++ int64_t dfs_sampling_start_ts, dfs_last_ts_delta; ++} NVTegraDevicePriv; + +/* 3x3 color conversion matrix plus 1x3 color offsets */ +static float mat_rgb_to_ycbcr_bt601lim[3][4] = { @@ -5926,7 +5933,7 @@ index 0000000000..e833d8e3cb +static float mat_rgb_to_ycbcr_bt2020full[3][4] = { + { 0.2627, 0.678, 0.0593, 0.0 }, + {-0.13963006, -0.36036994, 0.5, 0.50196075}, -+ { 0.5 , -0.4597857, -0.0402143, 0.50196075}, ++ { 0.5, -0.4597857, -0.0402143, 0.50196075}, +}; + +static float mat_ycbcr_bt601lim_to_rgb[3][4] = { @@ -5986,7 +5993,7 @@ index 0000000000..e833d8e3cb + AV_PIX_FMT_YUV420P, +}; + -+int ff_tx1_map_vic_pic_fmt(enum AVPixelFormat fmt) { ++int ff_nvtegra_map_vic_pic_fmt(enum AVPixelFormat fmt) { + switch (fmt) { + case AV_PIX_FMT_GRAY8: + return NVB0B6_T_L8; @@ -6013,10 +6020,10 @@ index 0000000000..e833d8e3cb + } +} + -+static uint32_t tx1_surface_get_width_align(enum AVPixelFormat fmt, const AVComponentDescriptor *comp) { ++static uint32_t nvtegra_surface_get_width_align(enum AVPixelFormat fmt, const AVComponentDescriptor *comp) { + int step = comp->step; + -+ if (fmt != AV_PIX_FMT_TX1) ++ if (fmt != AV_PIX_FMT_NVTEGRA) + return 256 / step; /* Pitch linear surfaces must be aligned to 256B for VIC */ + + /* @@ -6026,9 +6033,9 @@ index 0000000000..e833d8e3cb + return 64 / step; +} + -+static uint32_t tx1_surface_get_height_align(enum AVPixelFormat fmt, const AVComponentDescriptor *comp) { ++static uint32_t nvtegra_surface_get_height_align(enum AVPixelFormat fmt, const AVComponentDescriptor *comp) { + /* Height alignment is in terms of lines, not bytes, therefore we don't divide by the sample step */ -+ if (fmt != AV_PIX_FMT_TX1) ++ if (fmt != AV_PIX_FMT_NVTEGRA) + return 4; /* We use 64Bx4 cache width in VIC for pitch linear surfaces */ + + /* @@ -6039,14 +6046,14 @@ index 0000000000..e833d8e3cb + return 32; +} + -+static int tx1_channel_set_freq(AVTX1Channel *channel, uint32_t freq) { ++static int nvtegra_channel_set_freq(AVNVTegraChannel *channel, uint32_t freq) { + int err; +#ifndef __SWITCH__ -+ err = ff_tx1_channel_set_clock_rate(channel, channel->module_id, freq); ++ err = ff_nvtegra_channel_set_clock_rate(channel, channel->module_id, freq); + if (err < 0) + return err; + -+ err = ff_tx1_channel_get_clock_rate(channel, channel->module_id, &channel->clock); ++ err = ff_nvtegra_channel_get_clock_rate(channel, channel->module_id, &channel->clock); + if (err < 0) + return err; +#else @@ -6061,94 +6068,89 @@ index 0000000000..e833d8e3cb + return 0; +} + -+static void tx1_device_uninit(AVHWDeviceContext *ctx) { -+ AVTX1DeviceContext *hwctx = ctx->hwctx; ++static void nvtegra_device_uninit(AVHWDeviceContext *ctx) { ++ AVNVTegraDeviceContext *hwctx = ctx->hwctx; ++ NVTegraDevicePriv *priv = ctx->internal->priv; + -+ av_log(ctx, AV_LOG_DEBUG, "Deinitializing TX1 device\n"); ++ av_log(ctx, AV_LOG_DEBUG, "Deinitializing NVTEGRA device\n"); + -+ ff_tx1_cmdbuf_deinit(&hwctx->vic_cmdbuf); ++ ff_nvtegra_cmdbuf_deinit(&priv->vic_cmdbuf); + -+ ff_tx1_map_destroy(&hwctx->vic_map); ++ ff_nvtegra_map_destroy(&priv->vic_map); + + if (hwctx->has_nvdec) -+ ff_tx1_channel_close(&hwctx->nvdec_channel); ++ ff_nvtegra_channel_close(&hwctx->nvdec_channel); + if (hwctx->has_nvjpg) -+ ff_tx1_channel_close(&hwctx->nvjpg_channel); -+ ff_tx1_channel_close(&hwctx->vic_channel); -+ -+#ifndef __SWITCH__ -+ if (g_nvmap_fd > 0) -+ close(g_nvmap_fd); ++ ff_nvtegra_channel_close(&hwctx->nvjpg_channel); ++ ff_nvtegra_channel_close(&hwctx->vic_channel); + -+ if (g_nvhost_fd > 0) -+ close(g_nvhost_fd); -+#else -+ nvFenceExit(); -+ nvMapExit(); -+ nvExit(); -+ if (hwctx->has_nvdec) -+ mmuRequestFinalize(&hwctx->nvdec_channel.mmu_request); -+ if (hwctx->has_nvjpg) -+ mmuRequestFinalize(&hwctx->nvjpg_channel.mmu_request); -+ mmuExit(); -+#endif ++ av_buffer_unref(&priv->driver_state_ref); +} + -+static int tx1_device_init(AVHWDeviceContext *ctx) { -+ AVTX1DeviceContext *hwctx = ctx->hwctx; ++/* ++ * Hardware modules on the Tegra X1 (see t210.c in l4t kernel sources) ++ * - nvdec v2.0 ++ * - nvenc v5.0 ++ * - nvjpg v1.0 ++ * - vic v4.0 ++ */ ++ ++static int nvtegra_device_init(AVHWDeviceContext *ctx) { ++ AVNVTegraDeviceContext *hwctx = ctx->hwctx; ++ NVTegraDevicePriv *priv = ctx->internal->priv; + + uint32_t vic_map_size; + int err; + -+ av_log(ctx, AV_LOG_DEBUG, "Initializing TX1 device\n"); ++ av_log(ctx, AV_LOG_DEBUG, "Initializing NVTEGRA device\n"); + -+ err = ff_tx1_channel_open(&hwctx->nvdec_channel, "/dev/nvhost-nvdec"); ++ err = ff_nvtegra_channel_open(&hwctx->nvdec_channel, "/dev/nvhost-nvdec"); + hwctx->has_nvdec = err == 0; + -+ err = ff_tx1_channel_open(&hwctx->nvjpg_channel, "/dev/nvhost-nvjpg"); ++ err = ff_nvtegra_channel_open(&hwctx->nvjpg_channel, "/dev/nvhost-nvjpg"); + hwctx->has_nvjpg = err == 0; + -+ err = ff_tx1_channel_open(&hwctx->vic_channel, "/dev/nvhost-vic"); ++ err = ff_nvtegra_channel_open(&hwctx->vic_channel, "/dev/nvhost-vic"); + if (err < 0) + goto fail; + + /* Note: Official code only sets this for the nvdec channel */ + if (hwctx->has_nvdec) { -+ err = ff_tx1_channel_set_submit_timeout(&hwctx->nvdec_channel, 1000); ++ err = ff_nvtegra_channel_set_submit_timeout(&hwctx->nvdec_channel, 1000); + if (err < 0) + goto fail; + } + + if (hwctx->has_nvjpg) { -+ err = ff_tx1_channel_set_submit_timeout(&hwctx->nvjpg_channel, 1000); ++ err = ff_nvtegra_channel_set_submit_timeout(&hwctx->nvjpg_channel, 1000); + if (err < 0) + goto fail; + } + +#ifdef __SWITCH__ -+ hwctx->vic_map.owner = hwctx->vic_channel.channel.fd; ++ priv->vic_map.owner = hwctx->vic_channel.channel.fd; +#endif + -+ hwctx->vic_setup_off = 0; -+ hwctx->vic_cmdbuf_off = FFALIGN(hwctx->vic_setup_off + sizeof(VicConfigStruct), -+ FF_TX1_MAP_ALIGN); -+ hwctx->vic_filter_off = FFALIGN(hwctx->vic_cmdbuf_off + FF_TX1_MAP_ALIGN, -+ FF_TX1_MAP_ALIGN); -+ vic_map_size = FFALIGN(hwctx->vic_filter_off + 0x3000, -+ 0x1000); ++ priv->vic_setup_off = 0; ++ priv->vic_cmdbuf_off = FFALIGN(priv->vic_setup_off + sizeof(VicConfigStruct), ++ FF_NVTEGRA_MAP_ALIGN); ++ priv->vic_filter_off = FFALIGN(priv->vic_cmdbuf_off + FF_NVTEGRA_MAP_ALIGN, ++ FF_NVTEGRA_MAP_ALIGN); ++ vic_map_size = FFALIGN(priv->vic_filter_off + 0x3000, ++ 0x1000); + -+ hwctx->vic_max_cmdbuf_size = hwctx->vic_filter_off - hwctx->vic_cmdbuf_off; ++ priv->vic_max_cmdbuf_size = priv->vic_filter_off - priv->vic_cmdbuf_off; + -+ err = ff_tx1_map_create(&hwctx->vic_map, vic_map_size, 0x100, NVMAP_CACHE_OP_INV); ++ err = ff_nvtegra_map_create(&priv->vic_map, vic_map_size, 0x100, NVMAP_CACHE_OP_INV); + if (err < 0) + goto fail; + -+ err = ff_tx1_cmdbuf_init(&hwctx->vic_cmdbuf); ++ err = ff_nvtegra_cmdbuf_init(&priv->vic_cmdbuf); + if (err < 0) + goto fail; + -+ err = ff_tx1_cmdbuf_add_memory(&hwctx->vic_cmdbuf, &hwctx->vic_map, -+ hwctx->vic_cmdbuf_off, hwctx->vic_max_cmdbuf_size); ++ err = ff_nvtegra_cmdbuf_add_memory(&priv->vic_cmdbuf, &priv->vic_map, ++ priv->vic_cmdbuf_off, priv->vic_max_cmdbuf_size); + if (err < 0) + goto fail; + @@ -6160,7 +6162,6 @@ index 0000000000..e833d8e3cb + * The NVHOST_IOCTL_CHANNEL_SET_CLK_RATE ioctl also exists on HOS but the clock rate + * will be reset when the console goes to sleep. + */ -+ + if (hwctx->has_nvdec) { + err = AVERROR(mmuRequestInitialize(&hwctx->nvdec_channel.mmu_request, (MmuModuleId)5, 8, false)); + if (err < 0) @@ -6177,56 +6178,42 @@ index 0000000000..e833d8e3cb + return 0; + +fail: -+ tx1_device_uninit(ctx); ++ nvtegra_device_uninit(ctx); + return err; +} + -+static int tx1_device_create(AVHWDeviceContext *ctx, const char *device, -+ AVDictionary *opts, int flags) ++static int nvtegra_device_create(AVHWDeviceContext *ctx, const char *device, ++ AVDictionary *opts, int flags) +{ -+ int err; ++ NVTegraDevicePriv *priv = ctx->internal->priv; + -+ av_log(ctx, AV_LOG_DEBUG, "Creating TX1 device\n"); ++ av_log(ctx, AV_LOG_DEBUG, "Creating NVTEGRA device\n"); + -+#ifndef __SWITCH__ -+ if (!g_nvmap_fd) { -+ err = open("/dev/nvmap", O_RDWR | O_SYNC); -+ if (err < 0) -+ return AVERROR(errno); -+ g_nvmap_fd = err; -+ } ++ priv->driver_state_ref = ff_nvtegra_driver_init(); ++ if (!priv->driver_state_ref) ++ return AVERROR(ENOSYS); + -+ if (!g_nvhost_fd) { -+ err = open("/dev/nvhost-ctrl", O_RDWR | O_SYNC); -+ if (err < 0) -+ return AVERROR(errno); -+ g_nvhost_fd = err; -+ } -+#else -+ err = AVERROR(nvInitialize()); -+ if (R_FAILED(err)) -+ return err; ++ return 0; ++} + -+ err = AVERROR(nvMapInit()); -+ if (R_FAILED(err)) -+ return err; ++static int nvtegra_device_derive(AVHWDeviceContext *dst_ctx, ++ AVHWDeviceContext *src_ctx, ++ AVDictionary *opts, int flags) ++{ + -+ err = AVERROR(nvFenceInit()); -+ if (R_FAILED(err)) -+ return err; ++ NVTegraDevicePriv *src_priv = src_ctx->internal->priv, *dst_priv = dst_ctx->internal->priv; + -+ err = AVERROR(mmuInitialize()); -+ if (R_FAILED(err)) -+ return err; -+#endif ++ dst_priv->driver_state_ref = av_buffer_ref(src_priv->driver_state_ref); ++ if (!dst_priv->driver_state_ref) ++ return AVERROR(ENOMEM); + + return 0; +} + -+static int tx1_frames_get_constraints(AVHWDeviceContext *ctx, const void *hwconfig, -+ AVHWFramesConstraints *constraints) ++static int nvtegra_frames_get_constraints(AVHWDeviceContext *ctx, const void *hwconfig, ++ AVHWFramesConstraints *constraints) +{ -+ av_log(ctx, AV_LOG_DEBUG, "Getting frame constraints for TX1 device\n"); ++ av_log(ctx, AV_LOG_DEBUG, "Getting frame constraints for NVTEGRA device\n"); + + constraints->valid_sw_formats = av_malloc_array(FF_ARRAY_ELEMS(supported_sw_formats) + 1, + sizeof(*constraints->valid_sw_formats)); @@ -6241,36 +6228,36 @@ index 0000000000..e833d8e3cb + if (!constraints->valid_hw_formats) + return AVERROR(ENOMEM); + -+ constraints->valid_hw_formats[0] = AV_PIX_FMT_TX1; ++ constraints->valid_hw_formats[0] = AV_PIX_FMT_NVTEGRA; + constraints->valid_hw_formats[1] = AV_PIX_FMT_NONE; + + return 0; +} + -+static void tx1_buffer_free(void *opaque, uint8_t *data) { -+ AVTX1Map *map = (AVTX1Map *)data; ++static void nvtegra_buffer_free(void *opaque, uint8_t *data) { ++ AVNVTegraMap *map = (AVNVTegraMap *)data; + -+ av_log(opaque, AV_LOG_DEBUG, "Freeing surface from TX1 device\n"); ++ av_log(opaque, AV_LOG_DEBUG, "Freeing surface from NVTEGRA device\n"); + + if (!data) + return; + -+ ff_tx1_map_destroy(map); ++ ff_nvtegra_map_destroy(map); + + av_freep(&map); +} + -+static AVBufferRef *tx1_pool_alloc(void *opaque, size_t size) { -+ AVHWFramesContext *ctx = opaque; ++static AVBufferRef *nvtegra_pool_alloc(void *opaque, size_t size) { ++ AVHWFramesContext *ctx = opaque; +#ifdef __SWITCH__ -+ AVTX1DeviceContext *hwctx = ctx->device_ctx->hwctx; ++ AVNVTegraDeviceContext *hwctx = ctx->device_ctx->hwctx; +#endif + + AVBufferRef *buffer; -+ AVTX1Map *map; ++ AVNVTegraMap *map; + int err; + -+ av_log(ctx, AV_LOG_DEBUG, "Creating surface from TX1 device\n"); ++ av_log(ctx, AV_LOG_DEBUG, "Creating surface from NVTEGRA device\n"); + + map = av_mallocz(sizeof(*map)); + if (!map) @@ -6280,11 +6267,11 @@ index 0000000000..e833d8e3cb + map->owner = hwctx->nvdec_channel.channel.fd; +#endif + -+ err = ff_tx1_map_create(map, size, 0x100, NVMAP_CACHE_OP_INV); ++ err = ff_nvtegra_map_create(map, size, 0x100, NVMAP_CACHE_OP_INV); + if (err < 0) + goto fail; + -+ buffer = av_buffer_create((uint8_t *)map, sizeof(map), tx1_buffer_free, ctx, 0); ++ buffer = av_buffer_create((uint8_t *)map, sizeof(*map), nvtegra_buffer_free, ctx, 0); + if (!buffer) + goto fail; + @@ -6292,26 +6279,26 @@ index 0000000000..e833d8e3cb + +fail: + av_log(ctx, AV_LOG_ERROR, "Failed to create buffer\n"); -+ ff_tx1_map_destroy(map); ++ ff_nvtegra_map_destroy(map); + av_freep(map); + return NULL; +} + -+static int tx1_frames_init(AVHWFramesContext *ctx) { ++static int nvtegra_frames_init(AVHWFramesContext *ctx) { + const AVPixFmtDescriptor *desc = av_pix_fmt_desc_get(ctx->sw_format); + + uint32_t width_aligned, height_aligned, size; + -+ av_log(ctx, AV_LOG_DEBUG, "Initializing frame pool for the TX1 device\n"); ++ av_log(ctx, AV_LOG_DEBUG, "Initializing frame pool for the NVTEGRA device\n"); + + if (!ctx->pool) { -+ width_aligned = FFALIGN(ctx->width, tx1_surface_get_width_align (ctx->format, &desc->comp[0])); -+ height_aligned = FFALIGN(ctx->height, tx1_surface_get_height_align(ctx->format, &desc->comp[0])); ++ width_aligned = FFALIGN(ctx->width, nvtegra_surface_get_width_align (ctx->format, &desc->comp[0])); ++ height_aligned = FFALIGN(ctx->height, nvtegra_surface_get_height_align(ctx->format, &desc->comp[0])); + + size = av_image_get_buffer_size(ctx->sw_format, width_aligned, height_aligned, -+ tx1_surface_get_width_align(ctx->format, &desc->comp[0])); ++ nvtegra_surface_get_width_align(ctx->format, &desc->comp[0])); + -+ ctx->internal->pool_internal = av_buffer_pool_init2(size, ctx, tx1_pool_alloc, NULL); ++ ctx->internal->pool_internal = av_buffer_pool_init2(size, ctx, nvtegra_pool_alloc, NULL); + if (!ctx->internal->pool_internal) + return AVERROR(ENOMEM); + } @@ -6319,35 +6306,35 @@ index 0000000000..e833d8e3cb + return 0; +} + -+static void tx1_frames_uninit(AVHWFramesContext *ctx) { -+ av_log(ctx, AV_LOG_DEBUG, "Deinitializing frame pool for the TX1 device\n"); ++static void nvtegra_frames_uninit(AVHWFramesContext *ctx) { ++ av_log(ctx, AV_LOG_DEBUG, "Deinitializing frame pool for the NVTEGRA device\n"); +} + -+static int tx1_get_buffer(AVHWFramesContext *ctx, AVFrame *frame) { ++static int nvtegra_get_buffer(AVHWFramesContext *ctx, AVFrame *frame) { + const AVPixFmtDescriptor *desc = av_pix_fmt_desc_get(ctx->sw_format); + -+ AVTX1Map *map; ++ AVNVTegraMap *map; + uint32_t width_aligned, height_aligned; + int err; + -+ av_log(ctx, AV_LOG_DEBUG, "Getting frame buffer for TX1 device\n"); ++ av_log(ctx, AV_LOG_DEBUG, "Getting frame buffer for NVTEGRA device\n"); + + frame->buf[0] = av_buffer_pool_get(ctx->pool); + if (!frame->buf[0]) + return AVERROR(ENOMEM); + -+ map = ff_tx1_frame_get_fbuf_map(frame); ++ map = ff_nvtegra_frame_get_fbuf_map(frame); + -+ width_aligned = FFALIGN(ctx->width, tx1_surface_get_width_align (ctx->format, &desc->comp[0])); -+ height_aligned = FFALIGN(ctx->height, tx1_surface_get_height_align(ctx->format, &desc->comp[0])); ++ width_aligned = FFALIGN(ctx->width, nvtegra_surface_get_width_align (ctx->format, &desc->comp[0])); ++ height_aligned = FFALIGN(ctx->height, nvtegra_surface_get_height_align(ctx->format, &desc->comp[0])); + -+ err = av_image_fill_arrays(frame->data, frame->linesize, ff_tx1_map_get_addr(map), ++ err = av_image_fill_arrays(frame->data, frame->linesize, ff_nvtegra_map_get_addr(map), + ctx->sw_format, width_aligned, height_aligned, -+ tx1_surface_get_width_align(ctx->format, &desc->comp[0])); ++ nvtegra_surface_get_width_align(ctx->format, &desc->comp[0])); + if (err < 0) + return err; + -+ frame->format = AV_PIX_FMT_TX1; ++ frame->format = AV_PIX_FMT_NVTEGRA; + frame->width = ctx->width; + frame->height = ctx->height; + @@ -6365,15 +6352,16 @@ index 0000000000..e833d8e3cb + * 422.4, 441.6, 499.2, 518.4, 537.6, 556.8, 576.0, 595.2, 614.4, 633.6, 652.8 + */ + -+int ff_tx1_dfs_init(AVHWDeviceContext *ctx, AVTX1Channel *channel, int width, int height, double framerate_hz) { -+ AVTX1DeviceContext *hwctx = ctx->hwctx; ++int ff_nvtegra_dfs_init(AVHWDeviceContext *ctx, AVNVTegraChannel *channel, int width, int height, ++ double framerate_hz) ++{ ++ NVTegraDevicePriv *priv = ctx->internal->priv; + + uint32_t max_freq, lowcorner; + int num_mbs, err; + -+ hwctx->dfs_num_samples = 5; -+ hwctx->dfs_decode_ema_damping = 0.2; -+ hwctx->dfs_sampling_start_ts = av_gettime_relative(); ++ priv->dfs_num_samples = 20; ++ priv->dfs_ema_damping = 0.1; + + /* + * Initialize low-corner frequency (reproduces official code) @@ -6392,14 +6380,11 @@ index 0000000000..e833d8e3cb + if (framerate_hz >= 0.1 && isfinite(framerate_hz)) + lowcorner = FFMIN(lowcorner, lowcorner * framerate_hz / 30.0); + -+ hwctx->dfs_lowcorner = lowcorner; -+ -+ hwctx->dfs_bitrate_samples = av_malloc_array(hwctx->dfs_num_samples, sizeof(*hwctx->dfs_bitrate_samples)); -+ if (!hwctx->dfs_bitrate_samples) -+ return AVERROR(ENOMEM); ++ priv->framerate = framerate_hz; ++ priv->dfs_lowcorner = lowcorner; + + av_log(ctx, AV_LOG_DEBUG, "DFS: Initializing lowcorner to %d Hz, using %u samples\n", -+ hwctx->dfs_lowcorner, hwctx->dfs_num_samples); ++ priv->dfs_lowcorner, priv->dfs_num_samples); + + /* + * Initialize channel to the max possible frequency (the kernel driver will clamp to an allowed value) @@ -6408,20 +6393,26 @@ index 0000000000..e833d8e3cb + */ + max_freq = (UINT64_C(1)<<32) - 1000 & UINT32_MAX; + -+ err = tx1_channel_set_freq(channel, max_freq); ++ err = nvtegra_channel_set_freq(channel, max_freq); + if (err < 0) + return err; + ++ priv->dfs_decode_cycles_ema = 0.0; ++ priv->dfs_bitrate_sum = 0; ++ priv->dfs_cur_sample = 0; ++ priv->dfs_sampling_start_ts = av_gettime_relative(); ++ priv->dfs_last_ts_delta = 0; ++ + return 0; +} + -+int ff_tx1_dfs_update(AVHWDeviceContext *ctx, AVTX1Channel *channel, int bitstream_len, int decode_cycles) { -+ AVTX1DeviceContext *hwctx = ctx->hwctx; ++int ff_nvtegra_dfs_update(AVHWDeviceContext *ctx, AVNVTegraChannel *channel, int bitstream_len, int decode_cycles) { ++ NVTegraDevicePriv *priv = ctx->internal->priv; + -+ double avg; -+ uint32_t sum, clock; -+ int64_t time; -+ int i, err; ++ double frame_time, avg; ++ int64_t now, wl_dt; ++ uint32_t clock; ++ int err; + + /* + * Official software implements DFS using a flat average of the decoder pool occupancy. @@ -6434,53 +6425,64 @@ index 0000000000..e833d8e3cb + /* Convert to bits */ + bitstream_len *= 8; + -+ /* Exponential moving average of decode cycles per bitstream bit */ -+ hwctx->dfs_decode_cycles_ema = hwctx->dfs_decode_ema_damping * (double)decode_cycles/bitstream_len + -+ (1.0 - hwctx->dfs_decode_ema_damping) * hwctx->dfs_decode_cycles_ema; ++ /* Exponential moving average of decode cycles per frame */ ++ priv->dfs_decode_cycles_ema = priv->dfs_ema_damping * (double)decode_cycles/bitstream_len + ++ (1.0 - priv->dfs_ema_damping) * priv->dfs_decode_cycles_ema; + -+ hwctx->dfs_cur_sample = (hwctx->dfs_cur_sample + 1) % hwctx->dfs_num_samples; -+ hwctx->dfs_bitrate_samples[hwctx->dfs_cur_sample] = bitstream_len; ++ priv->dfs_bitrate_sum += bitstream_len; ++ priv->dfs_cur_sample = (priv->dfs_cur_sample + 1) % priv->dfs_num_samples; ++ ++ err = 0; + + /* Reclock if we collected enough samples */ -+ if (hwctx->dfs_cur_sample == 0) { -+ /* Flat average of bitstream bits per time interval */ -+ for (sum = i = 0; i < hwctx->dfs_num_samples; ++i) -+ sum += hwctx->dfs_bitrate_samples[i]; ++ if (priv->dfs_cur_sample == 0) { ++ now = av_gettime_relative(); ++ wl_dt = now - priv->dfs_sampling_start_ts; + -+ time = av_gettime_relative(); -+ avg = sum * 1e6 / (time - hwctx->dfs_sampling_start_ts); ++ /* ++ * Try to filter bad sample sets caused by eg. pausing the video playback. ++ * We reject if one of these conditions is met: ++ * - the wall time is over 1.5x the framerate (10Hz is used as fallback if no framerate information is available) ++ * - the wall time is over 1.5x the ema-damped previous values ++ */ + -+ clock = hwctx->dfs_decode_cycles_ema * avg * 1.2; -+ clock = FFMAX(clock, hwctx->dfs_lowcorner); ++ if (priv->framerate >= 0.1 && isfinite(priv->framerate)) ++ frame_time = 1.0e6 / priv->framerate; ++ else ++ frame_time = 0.1e6; + -+ err = tx1_channel_set_freq(channel, clock); -+ if (err < 0) -+ return err; ++ if ((wl_dt < 1.5 * priv->dfs_num_samples * frame_time) || ++ ((priv->dfs_last_ts_delta) && (wl_dt < 1.5 * priv->dfs_last_ts_delta))) { ++ avg = priv->dfs_bitrate_sum * 1e6 / wl_dt; ++ clock = priv->dfs_decode_cycles_ema * avg * 1.2; ++ clock = FFMAX(clock, priv->dfs_lowcorner); + -+ av_log(ctx, AV_LOG_DEBUG, "DFS: %.0f cycles/b (ema), %.0f b/s -> clock %u Hz (lowcorner %u Hz)\n", -+ hwctx->dfs_decode_cycles_ema, avg, clock, hwctx->dfs_lowcorner); ++ av_log(ctx, AV_LOG_DEBUG, "DFS: %.0f cycles/b (ema), %.0f b/s -> clock %u Hz (lowcorner %u Hz)\n", ++ priv->dfs_decode_cycles_ema, avg, clock, priv->dfs_lowcorner); + -+ hwctx->dfs_sampling_start_ts = time; -+ } ++ err = nvtegra_channel_set_freq(channel, clock); + -+ return 0; -+} ++ priv->dfs_last_ts_delta = wl_dt; ++ } + -+int ff_tx1_dfs_uninit(AVHWDeviceContext *ctx, AVTX1Channel *channel) { -+ AVTX1DeviceContext *hwctx = ctx->hwctx; ++ priv->dfs_bitrate_sum = 0; ++ priv->dfs_sampling_start_ts = now; ++ } + -+ av_free(hwctx->dfs_bitrate_samples); ++ return err; ++} + -+ return 0; ++int ff_nvtegra_dfs_uninit(AVHWDeviceContext *ctx, AVNVTegraChannel *channel) { ++ return nvtegra_channel_set_freq(channel, 0); +} + -+static int tx1_transfer_get_formats(AVHWFramesContext *ctx, -+ enum AVHWFrameTransferDirection dir, -+ enum AVPixelFormat **formats) ++static int nvtegra_transfer_get_formats(AVHWFramesContext *ctx, ++ enum AVHWFrameTransferDirection dir, ++ enum AVPixelFormat **formats) +{ + enum AVPixelFormat *fmts; + -+ av_log(ctx, AV_LOG_DEBUG, "Getting transfer formats for TX1 device\n"); ++ av_log(ctx, AV_LOG_DEBUG, "Getting transfer formats for NVTEGRA device\n"); + + fmts = av_malloc_array(2, sizeof(**formats)); + if (!fmts) @@ -6517,11 +6519,11 @@ index 0000000000..e833d8e3cb + dst->matrix_coeff23 = (int)(src[2][3] * 0x3ff00 + 0.5f); +} + -+static void tx1_vic_preprare_config(VicConfigStruct *config, AVFrame *dst, const AVFrame *src, -+ enum AVPixelFormat fmt, bool is_10b_chroma) ++static void nvtegra_vic_preprare_config(VicConfigStruct *config, AVFrame *dst, const AVFrame *src, ++ enum AVPixelFormat fmt, bool is_10b_chroma) +{ + const AVPixFmtDescriptor *desc = av_pix_fmt_desc_get(fmt); -+ AVTX1Map *input_map = ff_tx1_frame_get_fbuf_map(src); ++ AVNVTegraMap *input_map = ff_nvtegra_frame_get_fbuf_map(src); + + /* Subsampled dimensions when emulating 10B chroma transfers, as input is always NV12 */ + int divider = (!is_10b_chroma ? 1 : 2); @@ -6546,7 +6548,7 @@ index 0000000000..e833d8e3cb + .TargetRectBottom = dst_height - 1, + }, + .outputSurfaceConfig = { -+ .OutPixelFormat = ff_tx1_map_vic_pic_fmt(fmt), ++ .OutPixelFormat = ff_nvtegra_map_vic_pic_fmt(fmt), + .OutSurfaceWidth = dst_width - 1, + .OutSurfaceHeight = dst_height - 1, + .OutBlkKind = NVB0B6_BLK_KIND_PITCH, @@ -6576,7 +6578,7 @@ index 0000000000..e833d8e3cb + .DestRectBottom = src_height - 1, + }, + .slotSurfaceConfig = { -+ .SlotPixelFormat = ff_tx1_map_vic_pic_fmt(fmt), ++ .SlotPixelFormat = ff_nvtegra_map_vic_pic_fmt(fmt), + .SlotChromaLocHoriz = ((desc->flags & AV_PIX_FMT_FLAG_RGB) || + src->chroma_location == AVCHROMA_LOC_TOPLEFT || + src->chroma_location == AVCHROMA_LOC_LEFT || @@ -6662,120 +6664,124 @@ index 0000000000..e833d8e3cb + } +} + -+static int tx1_vic_prepare_cmdbuf(AVTX1DeviceContext *hwctx, AVTX1Map *map, -+ uint32_t *map_offsets, int num_comps, -+ const AVFrame *src, enum AVPixelFormat fmt) ++static int nvtegra_vic_prepare_cmdbuf(AVHWFramesContext *ctx, AVNVTegraMap *map, ++ uint32_t *map_offsets, int num_comps, ++ const AVFrame *src, enum AVPixelFormat fmt) +{ -+ AVTX1Cmdbuf *cmdbuf = &hwctx->vic_cmdbuf; ++ AVNVTegraDeviceContext *hwctx = ctx->device_ctx->hwctx; ++ NVTegraDevicePriv *priv = ctx->device_ctx->internal->priv; + -+ AVTX1Map *src_map; ++ AVNVTegraCmdbuf *cmdbuf = &priv->vic_cmdbuf; ++ ++ AVNVTegraMap *src_map; + int input_reloc_type, err; + -+ src_map = ff_tx1_frame_get_fbuf_map(src); ++ src_map = ff_nvtegra_frame_get_fbuf_map(src); + + input_reloc_type = !src_map->is_linear ? + NVHOST_RELOC_TYPE_BLOCK_LINEAR : NVHOST_RELOC_TYPE_PITCH_LINEAR; + -+ err = ff_tx1_cmdbuf_begin(cmdbuf, HOST1X_CLASS_VIC); ++ err = ff_nvtegra_cmdbuf_begin(cmdbuf, HOST1X_CLASS_VIC); + if (err < 0) + return err; + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_APPLICATION_ID, -+ FF_TX1_VALUE(NVB0B6_VIDEO_COMPOSITOR_SET_APPLICATION_ID, ID, 1)); -+ FF_TX1_PUSH_VALUE(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_CONTROL_PARAMS, -+ FF_TX1_VALUE(NVB0B6_VIDEO_COMPOSITOR_SET_CONTROL_PARAMS, CONFIG_STRUCT_SIZE, sizeof(VicConfigStruct) >> 4) | -+ FF_TX1_VALUE(NVB0B6_VIDEO_COMPOSITOR_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_CONFIG_STRUCT_OFFSET, -+ &hwctx->vic_map, hwctx->vic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_FILTER_STRUCT_OFFSET, -+ &hwctx->vic_map, hwctx->vic_filter_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_APPLICATION_ID, ++ FF_NVTEGRA_VALUE(NVB0B6_VIDEO_COMPOSITOR_SET_APPLICATION_ID, ID, 1)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_CONTROL_PARAMS, ++ FF_NVTEGRA_VALUE(NVB0B6_VIDEO_COMPOSITOR_SET_CONTROL_PARAMS, CONFIG_STRUCT_SIZE, sizeof(VicConfigStruct) >> 4) | ++ FF_NVTEGRA_VALUE(NVB0B6_VIDEO_COMPOSITOR_SET_CONTROL_PARAMS, GPTIMER_ON, 1)); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_CONFIG_STRUCT_OFFSET, ++ &priv->vic_map, priv->vic_setup_off, NVHOST_RELOC_TYPE_DEFAULT); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_FILTER_STRUCT_OFFSET, ++ &priv->vic_map, priv->vic_filter_off, NVHOST_RELOC_TYPE_DEFAULT); + + for (int i = 0; i < num_comps; ++i) -+ FF_TX1_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_OUTPUT_SURFACE_LUMA_OFFSET + i * sizeof(uint32_t), -+ map, map_offsets[i], NVHOST_RELOC_TYPE_PITCH_LINEAR); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_OUTPUT_SURFACE_LUMA_OFFSET + i * sizeof(uint32_t), ++ map, map_offsets[i], NVHOST_RELOC_TYPE_PITCH_LINEAR); + + switch (fmt) { + case AV_PIX_FMT_RGB565: + /* 16-bit luma transfer */ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_SURFACE0_LUMA_OFFSET(0), -+ src_map, 0, input_reloc_type); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_SURFACE0_LUMA_OFFSET(0), ++ src_map, 0, input_reloc_type); + break; + case AV_PIX_FMT_RGB32: + /* 16-bit chroma transfer */ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_SURFACE0_LUMA_OFFSET(0), -+ src_map, src->data[1] - src->data[0], input_reloc_type); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_SURFACE0_LUMA_OFFSET(0), ++ src_map, src->data[1] - src->data[0], input_reloc_type); + break; + case AV_PIX_FMT_NV12: + /* Normal transfer */ -+ FF_TX1_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_SURFACE0_LUMA_OFFSET(0), -+ src_map, 0, input_reloc_type); -+ FF_TX1_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_SURFACE0_CHROMA_U_OFFSET(0), -+ src_map, src->data[1] - src->data[0], input_reloc_type); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_SURFACE0_LUMA_OFFSET(0), ++ src_map, 0, input_reloc_type); ++ FF_NVTEGRA_PUSH_RELOC(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_SET_SURFACE0_CHROMA_U_OFFSET(0), ++ src_map, src->data[1] - src->data[0], input_reloc_type); + break; + } + -+ FF_TX1_PUSH_VALUE(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_EXECUTE, -+ FF_TX1_ENUM(NVB0B6_VIDEO_COMPOSITOR_EXECUTE, AWAKEN, ENABLE)); ++ FF_NVTEGRA_PUSH_VALUE(cmdbuf, NVB0B6_VIDEO_COMPOSITOR_EXECUTE, ++ FF_NVTEGRA_ENUM(NVB0B6_VIDEO_COMPOSITOR_EXECUTE, AWAKEN, ENABLE)); + -+ err = ff_tx1_cmdbuf_end(cmdbuf); ++ err = ff_nvtegra_cmdbuf_end(cmdbuf); + if (err < 0) + return err; + + /* Insert syncpt increment to signal the end of the conversion */ -+ err = ff_tx1_cmdbuf_begin(cmdbuf, HOST1X_CLASS_VIC); ++ err = ff_nvtegra_cmdbuf_begin(cmdbuf, HOST1X_CLASS_VIC); + if (err < 0) + return err; + -+ err = ff_tx1_cmdbuf_push_word(cmdbuf, host1x_opcode_nonincr(NV_THI_INCR_SYNCPT, 1)); ++ err = ff_nvtegra_cmdbuf_push_word(cmdbuf, host1x_opcode_nonincr(NV_THI_INCR_SYNCPT, 1)); + if (err < 0) + return err; + -+ err = ff_tx1_cmdbuf_push_word(cmdbuf, -+ FF_TX1_VALUE(NV_THI_INCR_SYNCPT, INDX, hwctx->vic_channel.syncpt) | -+ FF_TX1_ENUM (NV_THI_INCR_SYNCPT, COND, OP_DONE)); ++ err = ff_nvtegra_cmdbuf_push_word(cmdbuf, ++ FF_NVTEGRA_VALUE(NV_THI_INCR_SYNCPT, INDX, hwctx->vic_channel.syncpt) | ++ FF_NVTEGRA_ENUM (NV_THI_INCR_SYNCPT, COND, OP_DONE)); + if (err < 0) + return err; + -+ err = ff_tx1_cmdbuf_end(cmdbuf); ++ err = ff_nvtegra_cmdbuf_end(cmdbuf); + if (err < 0) + return err; + -+ err = ff_tx1_cmdbuf_add_syncpt_incr(cmdbuf, hwctx->vic_channel.syncpt, 1, 0); ++ err = ff_nvtegra_cmdbuf_add_syncpt_incr(cmdbuf, hwctx->vic_channel.syncpt, 1, 0); + if (err < 0) + return err; + + return 0; +} + -+static int tx1_vic_transfer_data(AVHWFramesContext *ctx, AVFrame *dst, const AVFrame *src, -+ enum AVPixelFormat fmt, AVTX1Map *map, uint32_t *plane_offsets, -+ int num_planes, bool is_chroma) ++static int nvtegra_vic_transfer_data(AVHWFramesContext *ctx, AVFrame *dst, const AVFrame *src, ++ enum AVPixelFormat fmt, AVNVTegraMap *map, uint32_t *plane_offsets, ++ int num_planes, bool is_chroma) +{ -+ AVTX1DeviceContext *hwctx = ctx->device_ctx->hwctx; -+ AVTX1Cmdbuf *cmdbuf = &hwctx->vic_cmdbuf; ++ AVNVTegraDeviceContext *hwctx = ctx->device_ctx->hwctx; ++ NVTegraDevicePriv *priv = ctx->device_ctx->internal->priv; ++ AVNVTegraCmdbuf *cmdbuf = &priv->vic_cmdbuf; + + uint32_t render_fence; + uint8_t *mem; + int err; + -+ mem = ff_tx1_map_get_addr(&hwctx->vic_map); ++ mem = ff_nvtegra_map_get_addr(&priv->vic_map); + -+ tx1_vic_preprare_config((VicConfigStruct *)(mem + hwctx->vic_setup_off), -+ dst, src, fmt, is_chroma); ++ nvtegra_vic_preprare_config((VicConfigStruct *)(mem + priv->vic_setup_off), ++ dst, src, fmt, is_chroma); + -+ err = ff_tx1_cmdbuf_clear(cmdbuf); ++ err = ff_nvtegra_cmdbuf_clear(cmdbuf); + if (err < 0) + return err; + -+ err = tx1_vic_prepare_cmdbuf(hwctx, map, plane_offsets, num_planes, src, fmt); ++ err = nvtegra_vic_prepare_cmdbuf(ctx, map, plane_offsets, num_planes, src, fmt); + if (err < 0) + goto fail; + -+ err = ff_tx1_channel_submit(&hwctx->vic_channel, cmdbuf, &render_fence); ++ err = ff_nvtegra_channel_submit(&hwctx->vic_channel, cmdbuf, &render_fence); + if (err < 0) + goto fail; + -+ err = ff_tx1_syncpt_wait(&hwctx->vic_channel, render_fence, -1); ++ err = ff_nvtegra_syncpt_wait(&hwctx->vic_channel, render_fence, -1); + if (err < 0) + goto fail; + @@ -6783,20 +6789,93 @@ index 0000000000..e833d8e3cb + return err; +} + -+static int tx1_transfer_data_from(AVHWFramesContext *ctx, AVFrame *dst, const AVFrame *src) { ++static void nvtegra_unswizzle_nvdec_surf(void *out, int out_stride, void *in, int in_stride, int h) { ++ /* ++ * Adapted from https://fgiesen.wordpress.com/2011/01/17/texture-tiling-and-swizzling/. ++ * We process 16x2 bytes at a time. Horizontally, this is the size of a linear atom ++ * in a 16Bx2 sector, conveniently also the size of a cache line. ++ * The input pitch is guaranteed to fulfill this condition because of GOB alignment. ++ * ++ * NVDEC always uses a GOB height of 2 (block height of 16, in line with macroblock dimensions). ++ * The corresponding swizzling pattern is the following: ++ * y3 y2 y1 y0 x5 x4 x3 x2 x1 x0 ++ * x: ___x5_______x4____x3 x3 x1 x0 ++ * y: y3____y2 y1____y0____________ ++ * ++ * Addresses for the 4 lower bits can then be copied as-is (16 bytes). ++ * As a further optimization, the y0 bit is also handled within the same inner loop, ++ * which halves the total number of iterations. ++ */ ++ ++ __uint128_t *src = in, *dst = out, *src_line, *dst_line; ++ uint32_t w = out_stride / 16, offs_x = 0, offs_y = 0, offs_line; ++ uint32_t x_mask = -0x2e, y_mask = 0x2c; ++ int x, y; ++ ++ for (y = 0; y < h; y += 2) { ++ dst_line = dst + y * w; ++ src_line = src + offs_y; ++ ++ offs_line = offs_x; ++ for (x = 0; x < w; ++x) { ++ dst_line[x+0] = src_line[offs_line+0]; ++ dst_line[x+w] = src_line[offs_line+1]; ++ offs_line = (offs_line - x_mask) & x_mask; ++ } ++ ++ offs_y = (offs_y - y_mask) & y_mask; ++ ++ /* Wrap into next tile row */ ++ if (!offs_y) ++ offs_x += in_stride; ++ } ++} ++ ++static int nvtegra_cpu_transfer_data(AVHWFramesContext *ctx, AVFrame *dst, const AVFrame *src) { ++ const AVPixFmtDescriptor *desc = av_pix_fmt_desc_get(ctx->sw_format); ++ AVNVTegraMap *src_map; ++ int i; ++ ++ src_map = ff_nvtegra_frame_get_fbuf_map(src); ++ ++ if (dst->format != ctx->sw_format) { ++ av_log(ctx, AV_LOG_WARNING, "Source and destination must have the same format for cpu transfers\n"); ++ return AVERROR(EINVAL); ++ } ++ ++ for (i = 0; i < av_pix_fmt_count_planes(dst->format); ++i) { ++ if (src_map->is_linear) ++ av_image_copy_plane(dst->data[i], dst->linesize[i], src->data[i], src->linesize[i], ++ FFMIN(dst->linesize[i], src->linesize[i]), ++ dst->height >> (i ? desc->log2_chroma_h : 0)); ++ else ++ nvtegra_unswizzle_nvdec_surf(dst->data[i], dst->linesize[i], src->data[i], src->linesize[i], ++ dst->height >> (i ? desc->log2_chroma_h : 0)); ++ } ++ ++ return 0; ++} ++ ++static int nvtegra_transfer_data_from(AVHWFramesContext *ctx, AVFrame *dst, const AVFrame *src) { +#ifdef __SWITCH__ -+ AVTX1DeviceContext *hwctx = ctx->device_ctx->hwctx; ++ AVNVTegraDeviceContext *hwctx = ctx->device_ctx->hwctx; +#endif + -+ AVTX1Map map = {0}; ++ AVNVTegraMap map = {0}; + uint8_t *map_base; + uint32_t plane_offsets[4]; + int num_planes, i; + int err; + -+ av_log(ctx, AV_LOG_DEBUG, "Transferring data from TX1 device, %s -> %s\n", ++ av_log(ctx, AV_LOG_DEBUG, "Transferring data from NVTEGRA device, %s -> %s\n", + av_get_pix_fmt_name(src->format), av_get_pix_fmt_name(dst->format)); + ++ if (((uintptr_t)dst->data[0] & 0xff) || ((uintptr_t)dst->data[1] & 0xff) || (dst->linesize[0] & 0xff)) { ++ av_log(ctx, AV_LOG_WARNING, "Destination address/pitch not aligned to 256, " ++ "falling back to slower cpu transfer\n"); ++ return nvtegra_cpu_transfer_data(ctx, dst, src); ++ } ++ + if (!src->hw_frames_ctx || dst->hw_frames_ctx) + return AVERROR(ENOSYS); + @@ -6808,19 +6887,19 @@ index 0000000000..e833d8e3cb + */ +#ifndef __SWITCH__ + map_base = dst->data[0]; -+ err = ff_tx1_map_allocate(&map, dst->buf[0]->size, 0x100, NVMAP_CACHE_OP_INV); ++ err = ff_nvtegra_map_allocate(&map, dst->buf[0]->size, 0x100, NVMAP_CACHE_OP_INV); + if (err < 0) + goto fail; +#else + map.owner = hwctx->vic_channel.channel.fd; + map_base = (uint8_t *)((uintptr_t)dst->buf[0]->data & ~0xfff); -+ err = ff_tx1_map_from_va(&map, map_base, dst->buf[0]->size + ((uintptr_t)dst->buf[0]->data & 0xfff), -+ 0x100, NVMAP_CACHE_OP_WB); ++ err = ff_nvtegra_map_from_va(&map, map_base, dst->buf[0]->size + ((uintptr_t)dst->buf[0]->data & 0xfff), ++ 0x100, NVMAP_CACHE_OP_WB); + if (err < 0) + goto fail; +#endif + -+ err = ff_tx1_map_map(&map); ++ err = ff_nvtegra_map_map(&map); + if (err < 0) + goto fail; + @@ -6833,76 +6912,77 @@ index 0000000000..e833d8e3cb + FFSWAP(uint32_t, plane_offsets[1], plane_offsets[2]); + + /* -+ * VIC on the TX1 does not support 16-bit YUV surfaces. ++ * VIC2 does not support 16-bit YUV surfaces. + * Here we emulate them using two separates transfers for the luma and chroma planes + * (16-bit and 32-bit widths respectively). + */ + if (dst->format == AV_PIX_FMT_P010) { -+ err = tx1_vic_transfer_data(ctx, dst, src, AV_PIX_FMT_RGB565, -+ &map, &plane_offsets[0], 1, false); ++ err = nvtegra_vic_transfer_data(ctx, dst, src, AV_PIX_FMT_RGB565, ++ &map, &plane_offsets[0], 1, false); + if (err < 0) + goto fail; + -+ err = tx1_vic_transfer_data(ctx, dst, src, AV_PIX_FMT_RGB32, -+ &map, &plane_offsets[1], 1, true); ++ err = nvtegra_vic_transfer_data(ctx, dst, src, AV_PIX_FMT_RGB32, ++ &map, &plane_offsets[1], 1, true); + if (err < 0) + goto fail; + } else { -+ err = tx1_vic_transfer_data(ctx, dst, src, dst->format, -+ &map, plane_offsets, num_planes, false); ++ err = nvtegra_vic_transfer_data(ctx, dst, src, dst->format, ++ &map, plane_offsets, num_planes, false); + if (err < 0) + goto fail; + } + +#ifndef __SWITCH__ -+ memcpy(dst->buf[0]->data, ff_tx1_map_get_addr(&map), dst->buf[0]->size); ++ memcpy(dst->buf[0]->data, ff_nvtegra_map_get_addr(&map), dst->buf[0]->size); +#endif + +fail: -+ ff_tx1_map_unmap(&map); ++ ff_nvtegra_map_unmap(&map); + +#ifndef __SWITCH__ -+ ff_tx1_map_free(&map); ++ ff_nvtegra_map_free(&map); +#else -+ ff_tx1_map_close(&map); ++ ff_nvtegra_map_close(&map); +#endif + + return err; +} + -+const HWContextType ff_hwcontext_type_tx1 = { -+ .type = AV_HWDEVICE_TYPE_TX1, -+ .name = "tx1", ++const HWContextType ff_hwcontext_type_nvtegra = { ++ .type = AV_HWDEVICE_TYPE_NVTEGRA, ++ .name = "nvtegra", + -+ .device_hwctx_size = sizeof(AVTX1DeviceContext), -+ .device_priv_size = 0, ++ .device_hwctx_size = sizeof(AVNVTegraDeviceContext), ++ .device_priv_size = sizeof(NVTegraDevicePriv), + .device_hwconfig_size = 0, + .frames_hwctx_size = 0, + .frames_priv_size = 0, + -+ .device_create = &tx1_device_create, -+ .device_init = &tx1_device_init, -+ .device_uninit = &tx1_device_uninit, ++ .device_create = &nvtegra_device_create, ++ .device_derive = &nvtegra_device_derive, ++ .device_init = &nvtegra_device_init, ++ .device_uninit = &nvtegra_device_uninit, + -+ .frames_get_constraints = &tx1_frames_get_constraints, -+ .frames_init = &tx1_frames_init, -+ .frames_uninit = &tx1_frames_uninit, -+ .frames_get_buffer = &tx1_get_buffer, ++ .frames_get_constraints = &nvtegra_frames_get_constraints, ++ .frames_init = &nvtegra_frames_init, ++ .frames_uninit = &nvtegra_frames_uninit, ++ .frames_get_buffer = &nvtegra_get_buffer, + -+ .transfer_get_formats = &tx1_transfer_get_formats, -+ .transfer_data_from = &tx1_transfer_data_from, ++ .transfer_get_formats = &nvtegra_transfer_get_formats, ++ .transfer_data_from = &nvtegra_transfer_data_from, + + .pix_fmts = (const enum AVPixelFormat[]) { -+ AV_PIX_FMT_TX1, ++ AV_PIX_FMT_NVTEGRA, + AV_PIX_FMT_NONE, + }, +}; -diff --git a/libavutil/hwcontext_tx1.h b/libavutil/hwcontext_tx1.h +diff --git a/libavutil/hwcontext_nvtegra.h b/libavutil/hwcontext_nvtegra.h new file mode 100644 -index 0000000000..f867259469 +index 0000000000..e72221f61f --- /dev/null -+++ b/libavutil/hwcontext_tx1.h -@@ -0,0 +1,62 @@ ++++ b/libavutil/hwcontext_nvtegra.h +@@ -0,0 +1,64 @@ +/* + * Copyright (c) 2023 averne + * @@ -6923,8 +7003,8 @@ index 0000000000..f867259469 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + -+#ifndef AVUTIL_HWCONTEXT_TX1_H -+#define AVUTIL_HWCONTEXT_TX1_H ++#ifndef AVUTIL_HWCONTEXT_NVTEGRA_H ++#define AVUTIL_HWCONTEXT_NVTEGRA_H + +#include + @@ -6932,45 +7012,47 @@ index 0000000000..f867259469 +#include "frame.h" +#include "pixfmt.h" + -+#include "tx1.h" ++#include "nvtegra.h" + -+typedef struct AVTX1DeviceContext { -+ AVTX1Channel nvdec_channel, nvjpg_channel, vic_channel; -+ bool has_nvdec, has_nvjpg; -+ -+ AVTX1Map vic_map; -+ uint32_t vic_setup_off, vic_cmdbuf_off, vic_filter_off; -+ uint32_t vic_max_cmdbuf_size; -+ -+ AVTX1Cmdbuf vic_cmdbuf; -+ -+ uint32_t dfs_lowcorner; -+ -+ double dfs_decode_cycles_ema; -+ double dfs_decode_ema_damping; ++/** ++ * @file ++ * API-specific header for AV_HWDEVICE_TYPE_NVTEGRA. ++ * ++ * For user-allocated pools, AVHWFramesContext.pool must return AVBufferRefs ++ * with the data pointer set to an AVNVTegraMap. ++ */ + -+ int *dfs_bitrate_samples; -+ int dfs_cur_sample, dfs_num_samples; -+ int64_t dfs_sampling_start_ts; -+} AVTX1DeviceContext; ++typedef struct AVNVTegraDeviceContext { ++ /* ++ * Hardware multimedia engines ++ */ ++ AVNVTegraChannel nvdec_channel, nvjpg_channel, vic_channel; ++ bool has_nvdec, has_nvjpg; ++} AVNVTegraDeviceContext; + -+static inline AVTX1Map *ff_tx1_frame_get_fbuf_map(const AVFrame *frame) { -+ return (AVTX1Map *)frame->buf[0]->data; ++static inline AVNVTegraMap *ff_nvtegra_frame_get_fbuf_map(const AVFrame *frame) { ++ return (AVNVTegraMap *)frame->buf[0]->data; +} + -+int ff_tx1_map_vic_pic_fmt(enum AVPixelFormat fmt); ++/* ++ * Helper to retrieve a map object from the corresponding frame ++ */ ++int ff_nvtegra_map_vic_pic_fmt(enum AVPixelFormat fmt); + -+int ff_tx1_dfs_init(AVHWDeviceContext *ctx, AVTX1Channel *channel, int width, int height, double framerate_hz); -+int ff_tx1_dfs_update(AVHWDeviceContext *ctx, AVTX1Channel *channel, int bitstream_len, int decode_cycles); -+int ff_tx1_dfs_uninit(AVHWDeviceContext *ctx, AVTX1Channel *channel); ++/* ++ * Dynamic frequency scaling routines ++ */ ++int ff_nvtegra_dfs_init(AVHWDeviceContext *ctx, AVNVTegraChannel *channel, int width, int height, double framerate_hz); ++int ff_nvtegra_dfs_update(AVHWDeviceContext *ctx, AVNVTegraChannel *channel, int bitstream_len, int decode_cycles); ++int ff_nvtegra_dfs_uninit(AVHWDeviceContext *ctx, AVNVTegraChannel *channel); + -+#endif /* AVUTIL_HWCONTEXT_TX1_H */ ++#endif /* AVUTIL_HWCONTEXT_NVTEGRA_H */ diff --git a/libavutil/nvdec_drv.h b/libavutil/nvdec_drv.h new file mode 100644 -index 0000000000..9116268f89 +index 0000000000..ab3789f936 --- /dev/null +++ b/libavutil/nvdec_drv.h -@@ -0,0 +1,1111 @@ +@@ -0,0 +1,1109 @@ +/******************************************************************************* + Copyright (c) 1993-2020, NVIDIA CORPORATION. All rights reserved. + @@ -7349,8 +7431,6 @@ index 0000000000..9116268f89 +typedef struct _nvdec_vp9_pic_s +{ + // reserved[0xc] = bitstream_size_in_bytes; -+ // reserved[0xd] = do_pass_1 (always 0) -+ // reserved[0xe] = displayParams? + NvU32 reserved0[12]; + NvU32 bitstream_size; + NvU32 reserved0_[2]; @@ -9207,40 +9287,12 @@ index 0000000000..a239476a71 +#define NVMAP_IOC_MAXNR (_IOC_NR(NVMAP_IOC_QUERY_HEAP_PARAMS)) + +#endif /* __UAPI_LINUX_NVMAP_H */ -diff --git a/libavutil/pixdesc.c b/libavutil/pixdesc.c -index 6ded9467b0..f7b9e9cbbf 100644 ---- a/libavutil/pixdesc.c -+++ b/libavutil/pixdesc.c -@@ -2793,6 +2793,10 @@ static const AVPixFmtDescriptor av_pix_fmt_descriptors[AV_PIX_FMT_NB] = { - }, - .flags = AV_PIX_FMT_FLAG_PLANAR, - }, -+ [AV_PIX_FMT_TX1] = { -+ .name = "tx1", -+ .flags = AV_PIX_FMT_FLAG_HWACCEL, -+ }, - }; - - static const char * const color_range_names[] = { -diff --git a/libavutil/pixfmt.h b/libavutil/pixfmt.h -index a26c72d56b..ae91ee78b5 100644 ---- a/libavutil/pixfmt.h -+++ b/libavutil/pixfmt.h -@@ -375,6 +375,8 @@ enum AVPixelFormat { - */ - AV_PIX_FMT_VULKAN, - -+ AV_PIX_FMT_TX1, ///< Tegra X1 pixel format, data[3] contains nothing -+ - AV_PIX_FMT_Y210BE, ///< packed YUV 4:2:2 like YUYV422, 20bpp, data in the high bits, big-endian - AV_PIX_FMT_Y210LE, ///< packed YUV 4:2:2 like YUYV422, 20bpp, data in the high bits, little-endian - -diff --git a/libavutil/tx1.c b/libavutil/tx1.c +diff --git a/libavutil/nvtegra.c b/libavutil/nvtegra.c new file mode 100644 -index 0000000000..52675cf499 +index 0000000000..69c00988df --- /dev/null -+++ b/libavutil/tx1.c -@@ -0,0 +1,698 @@ ++++ b/libavutil/nvtegra.c +@@ -0,0 +1,878 @@ +/* + * Copyright (c) 2023 averne + * @@ -9273,21 +9325,150 @@ index 0000000000..52675cf499 + +#include + -+#include "libavutil/log.h" -+#include "libavutil/error.h" -+#include "libavutil/mem.h" ++#include "buffer.h" ++#include "log.h" ++#include "error.h" ++#include "mem.h" ++#include "thread.h" + +#include "nvhost_ioctl.h" +#include "nvmap_ioctl.h" -+#include "tx1_host1x.h" ++#include "nvtegra_host1x.h" ++ ++#include "nvtegra.h" ++ ++struct DriverState { ++ int nvmap_fd, nvhost_fd; ++}; ++ ++static AVMutex g_driver_init_mtx = AV_MUTEX_INITIALIZER; ++static struct DriverState *g_driver_state = NULL; ++static AVBufferRef *g_driver_state_ref = NULL; ++ ++static void free_driver_fds(void *opaque, uint8_t *data) { ++ if (!g_driver_state) ++ return; ++ ++#ifndef __SWITCH__ ++ if (g_driver_state->nvmap_fd > 0) ++ close(g_driver_state->nvmap_fd); ++ ++ if (g_driver_state->nvhost_fd > 0) ++ close(g_driver_state->nvhost_fd); ++#else ++ nvFenceExit(); ++ nvMapExit(); ++ nvExit(); ++#endif ++ ++ g_driver_init_mtx = (AVMutex)AV_MUTEX_INITIALIZER; ++ g_driver_state_ref = NULL; ++ av_freep(&g_driver_state); ++} ++ ++static int init_driver_fds(void) { ++ AVBufferRef *ref; ++ struct DriverState *state; ++ int err; ++ ++ state = av_mallocz(sizeof(*state)); ++ if (!state) ++ return AVERROR(ENOMEM); ++ ++ ref = av_buffer_create((uint8_t *)state, sizeof(*state), free_driver_fds, NULL, 0); ++ if (!state) ++ return AVERROR(ENOMEM); + -+#include "tx1.h" ++ g_driver_state = state; ++ g_driver_state_ref = ref; + +#ifndef __SWITCH__ -+extern int g_nvmap_fd, g_nvhost_fd; ++ err = open("/dev/nvmap", O_RDWR | O_SYNC); ++ if (err < 0) ++ return AVERROR(errno); ++ state->nvmap_fd = err; ++ ++ err = open("/dev/nvhost-ctrl", O_RDWR | O_SYNC); ++ if (err < 0) ++ return AVERROR(errno); ++ state->nvhost_fd = err; ++#else ++ err = nvInitialize(); ++ if (R_FAILED(err)) ++ return AVERROR(err); ++ ++ err = nvMapInit(); ++ if (R_FAILED(err)) ++ return AVERROR(err); ++ state->nvmap_fd = nvMapGetFd(); ++ ++ err = nvFenceInit(); ++ if (R_FAILED(err)) ++ return AVERROR(err); ++ /* libnx doesn't export the nvhost-ctrl file descriptor */ ++ ++ err = mmuInitialize(); ++ if (R_FAILED(err)) ++ return AVERROR(err); +#endif + -+int ff_tx1_channel_open(AVTX1Channel *channel, const char *dev) { ++ return 0; ++} ++ ++static inline int get_nvmap_fd(void) { ++ if (!g_driver_state) ++ return AVERROR_UNKNOWN; ++ ++ if (!g_driver_state->nvmap_fd) ++ return AVERROR_UNKNOWN; ++ ++ return g_driver_state->nvmap_fd; ++} ++ ++static inline int get_nvhost_fd(void) { ++ if (!g_driver_state) ++ return AVERROR_UNKNOWN; ++ ++ if (!g_driver_state->nvhost_fd) ++ return AVERROR_UNKNOWN; ++ ++ return g_driver_state->nvhost_fd; ++} ++ ++AVBufferRef *ff_nvtegra_driver_init(void) { ++ AVBufferRef *out = NULL; ++ int err; ++ ++ /* ++ * We have to do this overly complex dance of putting driver fds in a refcounted struct, ++ * otherwise initializing multiple hwcontexts would leak fds ++ */ ++ ++ err = ff_mutex_lock(&g_driver_init_mtx); ++ if (err != 0) ++ goto exit; ++ ++ if (g_driver_state_ref) { ++ out = av_buffer_ref(g_driver_state_ref); ++ goto exit; ++ } ++ ++ err = init_driver_fds(); ++ if (err < 0) { ++ // In case memory allocations failed, call the destructor ourselves ++ av_buffer_unref(&g_driver_state_ref); ++ free_driver_fds(NULL, NULL); ++ goto exit; ++ } ++ ++ out = g_driver_state_ref; ++ ++exit: ++ ff_mutex_unlock(&g_driver_init_mtx); ++ return out; ++} ++ ++int ff_nvtegra_channel_open(AVNVTegraChannel *channel, const char *dev) { + int err; +#ifndef __SWITCH__ + struct nvhost_get_param_arg args; @@ -9328,7 +9509,7 @@ index 0000000000..52675cf499 +#endif +} + -+int ff_tx1_channel_close(AVTX1Channel *channel) { ++int ff_nvtegra_channel_close(AVNVTegraChannel *channel) { +#ifndef __SWITCH__ + if (!channel->fd) + return 0; @@ -9340,7 +9521,7 @@ index 0000000000..52675cf499 +#endif +} + -+int ff_tx1_channel_get_clock_rate(AVTX1Channel *channel, uint32_t moduleid, uint32_t *clock_rate) { ++int ff_nvtegra_channel_get_clock_rate(AVNVTegraChannel *channel, uint32_t moduleid, uint32_t *clock_rate) { + struct nvhost_clk_rate_args args; + int err; + @@ -9364,7 +9545,7 @@ index 0000000000..52675cf499 + return 0; +} + -+int ff_tx1_channel_set_clock_rate(AVTX1Channel *channel, uint32_t moduleid, uint32_t clock_rate) { ++int ff_nvtegra_channel_set_clock_rate(AVNVTegraChannel *channel, uint32_t moduleid, uint32_t clock_rate) { + struct nvhost_clk_rate_args args; + + args = (struct nvhost_clk_rate_args){ @@ -9383,7 +9564,7 @@ index 0000000000..52675cf499 +#endif +} + -+int ff_tx1_channel_submit(AVTX1Channel *channel, AVTX1Cmdbuf *cmdbuf, uint32_t *fence) { ++int ff_nvtegra_channel_submit(AVNVTegraChannel *channel, AVNVTegraCmdbuf *cmdbuf, uint32_t *fence) { + int err; +#ifndef __SWITCH__ + struct nvhost_submit_args args; @@ -9393,7 +9574,7 @@ index 0000000000..52675cf499 + .num_syncpt_incrs = cmdbuf->num_syncpt_incrs, + .num_cmdbufs = cmdbuf->num_cmdbufs, + .num_relocs = cmdbuf->num_relocs, -+ .num_waitchks = 0, ++ .num_waitchks = cmdbuf->num_waitchks, + .timeout = 0, + .flags = 0, + .fence = 0, @@ -9406,7 +9587,7 @@ index 0000000000..52675cf499 + .cmdbufs = (uintptr_t)cmdbuf->cmdbufs, + .relocs = (uintptr_t)cmdbuf->relocs, + .reloc_shifts = (uintptr_t)cmdbuf->reloc_shifts, -+ .waitchks = 0, ++ .waitchks = (uintptr_t)cmdbuf->waitchks, + .waitbases = 0, + .class_ids = (uintptr_t)cmdbuf->class_ids, + .fences = (uintptr_t)cmdbuf->fences, @@ -9436,7 +9617,7 @@ index 0000000000..52675cf499 +#endif +} + -+int ff_tx1_channel_set_submit_timeout(AVTX1Channel *channel, uint32_t timeout_ms) { ++int ff_nvtegra_channel_set_submit_timeout(AVNVTegraChannel *channel, uint32_t timeout_ms) { + struct nvhost_set_timeout_args args; + + args = (struct nvhost_set_timeout_args){ @@ -9450,7 +9631,7 @@ index 0000000000..52675cf499 +#endif +} + -+int ff_tx1_syncpt_wait(AVTX1Channel *channel, uint32_t threshold, int32_t timeout) { ++int ff_nvtegra_syncpt_wait(AVNVTegraChannel *channel, uint32_t threshold, int32_t timeout) { +#ifndef __SWITCH__ + struct nvhost_ctrl_syncpt_waitex_args args = { + .id = channel->syncpt, @@ -9458,7 +9639,7 @@ index 0000000000..52675cf499 + .timeout = timeout, + }; + -+ return (ioctl(g_nvhost_fd, NVHOST_IOCTL_CTRL_SYNCPT_WAITEX, &args) < 0) ? AVERROR(errno) : 0; ++ return (ioctl(get_nvhost_fd(), NVHOST_IOCTL_CTRL_SYNCPT_WAITEX, &args) < 0) ? AVERROR(errno) : 0; +#else + NvFence fence; + @@ -9480,7 +9661,7 @@ index 0000000000..52675cf499 +} +#endif + -+int ff_tx1_map_allocate(AVTX1Map *map, uint32_t size, uint32_t align, uint32_t flags) { ++int ff_nvtegra_map_allocate(AVNVTegraMap *map, uint32_t size, uint32_t align, uint32_t flags) { +#ifndef __SWITCH__ + struct nvmap_create_handle create_args; + struct nvmap_alloc_handle alloc_args; @@ -9490,7 +9671,7 @@ index 0000000000..52675cf499 + .size = size, + }; + -+ err = ioctl(g_nvmap_fd, NVMAP_IOC_CREATE, &create_args); ++ err = ioctl(get_nvmap_fd(), NVMAP_IOC_CREATE, &create_args); + if (err < 0) + return AVERROR(errno); + @@ -9504,14 +9685,14 @@ index 0000000000..52675cf499 + .align = align, + }; + -+ err = ioctl(g_nvmap_fd, NVMAP_IOC_ALLOC, &alloc_args); ++ err = ioctl(get_nvmap_fd(), NVMAP_IOC_ALLOC, &alloc_args); + if (err < 0) + goto fail; + + return 0; + +fail: -+ ff_tx1_map_free(map); ++ ff_nvtegra_map_free(map); + return AVERROR(errno); +#else + void *mem; @@ -9527,14 +9708,14 @@ index 0000000000..52675cf499 +#endif +} + -+int ff_tx1_map_free(AVTX1Map *map) { ++int ff_nvtegra_map_free(AVNVTegraMap *map) { +#ifndef __SWITCH__ + int err; + + if (!map->handle) + return 0; + -+ err = ioctl(g_nvmap_fd, NVMAP_IOC_FREE, map->handle); ++ err = ioctl(get_nvmap_fd(), NVMAP_IOC_FREE, map->handle); + if (err < 0) + return AVERROR(errno); + @@ -9553,7 +9734,7 @@ index 0000000000..52675cf499 +#endif +} + -+int ff_tx1_map_from_va(AVTX1Map *map, void *mem, uint32_t size, uint32_t align, uint32_t flags) { ++int ff_nvtegra_map_from_va(AVNVTegraMap *map, void *mem, uint32_t size, uint32_t align, uint32_t flags) { +#ifndef __SWITCH__ + struct nvmap_create_handle_from_va args; + int err; @@ -9564,7 +9745,7 @@ index 0000000000..52675cf499 + .flags = flags, + }; + -+ err = ioctl(g_nvmap_fd, NVMAP_IOC_FROM_VA, &args); ++ err = ioctl(get_nvmap_fd(), NVMAP_IOC_FROM_VA, &args); + if (err < 0) + return AVERROR(errno); + @@ -9579,16 +9760,16 @@ index 0000000000..52675cf499 +#endif +} + -+int ff_tx1_map_close(AVTX1Map *map) { ++int ff_nvtegra_map_close(AVNVTegraMap *map) { +#ifndef __SWITCH__ -+ return ff_tx1_map_free(map); ++ return ff_nvtegra_map_free(map); +#else + nvMapClose(&map->map); + return 0; +#endif +} + -+int ff_tx1_map_map(AVTX1Map *map) { ++int ff_nvtegra_map_map(AVNVTegraMap *map) { +#ifndef __SWITCH__ + void *addr; + @@ -9617,7 +9798,7 @@ index 0000000000..52675cf499 +#endif +} + -+int ff_tx1_map_unmap(AVTX1Map *map) { ++int ff_nvtegra_map_unmap(AVNVTegraMap *map) { + int err; +#ifndef __SWITCH__ + if (!map->cpu_addr) @@ -9651,24 +9832,24 @@ index 0000000000..52675cf499 +#endif +} + -+int ff_tx1_map_realloc(AVTX1Map *map, uint32_t size, uint32_t align, uint32_t flags) { -+ AVTX1Map tmp = {0}; ++int ff_nvtegra_map_realloc(AVNVTegraMap *map, uint32_t size, uint32_t align, uint32_t flags) { ++ AVNVTegraMap tmp = {0}; + int err; + -+ if (ff_tx1_map_get_size(map) >= size) ++ if (ff_nvtegra_map_get_size(map) >= size) + return 0; + +#ifdef __SWITCH__ + tmp.owner = map->owner; +#endif + -+ err = ff_tx1_map_create(&tmp, size, align, flags); ++ err = ff_nvtegra_map_create(&tmp, size, align, flags); + if (err < 0) + goto fail; + -+ memcpy(ff_tx1_map_get_addr(&tmp), ff_tx1_map_get_addr(map), ff_tx1_map_get_size(map)); ++ memcpy(ff_nvtegra_map_get_addr(&tmp), ff_nvtegra_map_get_addr(map), ff_nvtegra_map_get_size(map)); + -+ err = ff_tx1_map_destroy(map); ++ err = ff_nvtegra_map_destroy(map); + if (err < 0) + goto fail; + @@ -9677,14 +9858,15 @@ index 0000000000..52675cf499 + return 0; + +fail: -+ ff_tx1_map_destroy(&tmp); ++ ff_nvtegra_map_destroy(&tmp); + return err; +} + -+int ff_tx1_cmdbuf_init(AVTX1Cmdbuf *cmdbuf) { ++int ff_nvtegra_cmdbuf_init(AVNVTegraCmdbuf *cmdbuf) { + cmdbuf->num_cmdbufs = 0; +#ifndef __SWITCH__ + cmdbuf->num_relocs = 0; ++ cmdbuf->num_waitchks = 0; +#endif + cmdbuf->num_syncpt_incrs = 0; + @@ -9728,7 +9910,7 @@ index 0000000000..52675cf499 + return 0; +} + -+int ff_tx1_cmdbuf_deinit(AVTX1Cmdbuf *cmdbuf) { ++int ff_nvtegra_cmdbuf_deinit(AVNVTegraCmdbuf *cmdbuf) { + av_freep(&cmdbuf->cmdbufs); + av_freep(&cmdbuf->syncpt_incrs); + @@ -9741,10 +9923,10 @@ index 0000000000..52675cf499 + return 0; +} + -+int ff_tx1_cmdbuf_add_memory(AVTX1Cmdbuf *cmdbuf, AVTX1Map *map, uint32_t offset, uint32_t size) { ++int ff_nvtegra_cmdbuf_add_memory(AVNVTegraCmdbuf *cmdbuf, AVNVTegraMap *map, uint32_t offset, uint32_t size) { + uint8_t *mem; + -+ mem = ff_tx1_map_get_addr(map); ++ mem = ff_nvtegra_map_get_addr(map); + + cmdbuf->map = map; + cmdbuf->mem_offset = offset; @@ -9755,28 +9937,28 @@ index 0000000000..52675cf499 + return 0; +} + -+int ff_tx1_cmdbuf_clear(AVTX1Cmdbuf *cmdbuf) { ++int ff_nvtegra_cmdbuf_clear(AVNVTegraCmdbuf *cmdbuf) { + uint8_t *mem; + -+ mem = ff_tx1_map_get_addr(cmdbuf->map); ++ mem = ff_nvtegra_map_get_addr(cmdbuf->map); + + cmdbuf->num_cmdbufs = 0, cmdbuf->num_syncpt_incrs = 0; +#ifndef __SWITCH__ -+ cmdbuf->num_relocs = 0; ++ cmdbuf->num_relocs = 0, cmdbuf->num_waitchks = 0; +#endif + + cmdbuf->cur_word = (uint32_t *)(mem + cmdbuf->mem_offset); + return 0; +} + -+int ff_tx1_cmdbuf_begin(AVTX1Cmdbuf *cmdbuf, uint32_t class_id) { ++int ff_nvtegra_cmdbuf_begin(AVNVTegraCmdbuf *cmdbuf, uint32_t class_id) { + uint8_t *mem; + void *tmp1; +#ifndef __SWITCH__ + void *tmp2, *tmp3; +#endif + -+ mem = ff_tx1_map_get_addr(cmdbuf->map); ++ mem = ff_nvtegra_map_get_addr(cmdbuf->map); + + tmp1 = av_realloc_array(cmdbuf->cmdbufs, cmdbuf->num_cmdbufs + 1, sizeof(*cmdbuf->cmdbufs)); +#ifndef __SWITCH__ @@ -9798,7 +9980,7 @@ index 0000000000..52675cf499 +#endif + + cmdbuf->cmdbufs[cmdbuf->num_cmdbufs] = (struct nvhost_cmdbuf){ -+ .mem = ff_tx1_map_get_handle(cmdbuf->map), ++ .mem = ff_nvtegra_map_get_handle(cmdbuf->map), + .offset = (uint8_t *)cmdbuf->cur_word - mem, + }; + @@ -9812,19 +9994,19 @@ index 0000000000..52675cf499 + +#ifdef __SWITCH__ + if (cmdbuf->num_cmdbufs == 0) -+ ff_tx1_cmdbuf_push_word(cmdbuf, host1x_opcode_setclass(class_id, 0, 0)); ++ ff_nvtegra_cmdbuf_push_word(cmdbuf, host1x_opcode_setclass(class_id, 0, 0)); +#endif + + return 0; +} + -+int ff_tx1_cmdbuf_end(AVTX1Cmdbuf *cmdbuf) { ++int ff_nvtegra_cmdbuf_end(AVNVTegraCmdbuf *cmdbuf) { + cmdbuf->num_cmdbufs++; + return 0; +} + -+int ff_tx1_cmdbuf_push_word(AVTX1Cmdbuf *cmdbuf, uint32_t word) { -+ uintptr_t mem_start = (uintptr_t)ff_tx1_map_get_addr(cmdbuf->map) + cmdbuf->mem_offset; ++int ff_nvtegra_cmdbuf_push_word(AVNVTegraCmdbuf *cmdbuf, uint32_t word) { ++ uintptr_t mem_start = (uintptr_t)ff_nvtegra_map_get_addr(cmdbuf->map) + cmdbuf->mem_offset; + + if ((uintptr_t)cmdbuf->cur_word - mem_start >= cmdbuf->mem_size) + return AVERROR(ENOMEM); @@ -9834,33 +10016,33 @@ index 0000000000..52675cf499 + return 0; +} + -+int ff_tx1_cmdbuf_push_value(AVTX1Cmdbuf *cmdbuf, uint32_t offset, uint32_t word) { ++int ff_nvtegra_cmdbuf_push_value(AVNVTegraCmdbuf *cmdbuf, uint32_t offset, uint32_t word) { + int err; + -+ err = ff_tx1_cmdbuf_push_word(cmdbuf, host1x_opcode_incr(NV_THI_METHOD0/4, 2)); ++ err = ff_nvtegra_cmdbuf_push_word(cmdbuf, host1x_opcode_incr(NV_THI_METHOD0/4, 2)); + if (err < 0) + return err; + -+ err = ff_tx1_cmdbuf_push_word(cmdbuf, offset); ++ err = ff_nvtegra_cmdbuf_push_word(cmdbuf, offset); + if (err < 0) + return err; + -+ err = ff_tx1_cmdbuf_push_word(cmdbuf, word); ++ err = ff_nvtegra_cmdbuf_push_word(cmdbuf, word); + if (err < 0) + return err; + + return 0; +} + -+int ff_tx1_cmdbuf_push_reloc(AVTX1Cmdbuf *cmdbuf, uint32_t offset, AVTX1Map *target, uint32_t target_offset, -+ int reloc_type, int shift) ++int ff_nvtegra_cmdbuf_push_reloc(AVNVTegraCmdbuf *cmdbuf, uint32_t offset, AVNVTegraMap *target, uint32_t target_offset, ++ int reloc_type, int shift) +{ + int err; +#ifndef __SWITCH__ + uint8_t *mem; + void *tmp1, *tmp2, *tmp3; + -+ mem = ff_tx1_map_get_addr(cmdbuf->map); ++ mem = ff_nvtegra_map_get_addr(cmdbuf->map); + + tmp1 = av_realloc_array(cmdbuf->relocs, cmdbuf->num_relocs + 1, sizeof(*cmdbuf->relocs)); + tmp2 = av_realloc_array(cmdbuf->reloc_types, cmdbuf->num_relocs + 1, sizeof(*cmdbuf->reloc_types)); @@ -9870,14 +10052,14 @@ index 0000000000..52675cf499 + + cmdbuf->relocs = tmp1, cmdbuf->reloc_types = tmp2, cmdbuf->reloc_shifts = tmp3; + -+ err = ff_tx1_cmdbuf_push_value(cmdbuf, offset, 0xdeadbeef); ++ err = ff_nvtegra_cmdbuf_push_value(cmdbuf, offset, 0xdeadbeef); + if (err < 0) + return err; + + cmdbuf->relocs[cmdbuf->num_relocs] = (struct nvhost_reloc){ -+ .cmdbuf_mem = ff_tx1_map_get_handle(cmdbuf->map), ++ .cmdbuf_mem = ff_nvtegra_map_get_handle(cmdbuf->map), + .cmdbuf_offset = (uint8_t *)cmdbuf->cur_word - mem - sizeof(uint32_t), -+ .target = ff_tx1_map_get_handle(target), ++ .target = ff_nvtegra_map_get_handle(target), + .target_offset = target_offset, + }; + @@ -9893,7 +10075,7 @@ index 0000000000..52675cf499 + + return 0; +#else -+ err = ff_tx1_cmdbuf_push_value(cmdbuf, offset, (target->iova + target_offset) >> shift); ++ err = ff_nvtegra_cmdbuf_push_value(cmdbuf, offset, (target->iova + target_offset) >> shift); + if (err < 0) + return err; + @@ -9901,8 +10083,32 @@ index 0000000000..52675cf499 +#endif +} + -+int ff_tx1_cmdbuf_add_syncpt_incr(AVTX1Cmdbuf *cmdbuf, uint32_t syncpt, -+ uint32_t num_incrs, uint32_t fence) ++int ff_nvtegra_cmdbuf_push_wait(AVNVTegraCmdbuf *cmdbuf, uint32_t syncpt, uint32_t fence) { ++ int err; ++ ++ err = ff_nvtegra_cmdbuf_push_word(cmdbuf, host1x_opcode_setclass(HOST1X_CLASS_HOST1X, 0, 0)); ++ if (err < 0) ++ return err; ++ ++ err = ff_nvtegra_cmdbuf_push_word(cmdbuf, host1x_opcode_mask(NV_CLASS_HOST_LOAD_SYNCPT_PAYLOAD, ++ (1<<(NV_CLASS_HOST_LOAD_SYNCPT_PAYLOAD - NV_CLASS_HOST_LOAD_SYNCPT_PAYLOAD)) | ++ (1<<(NV_CLASS_HOST_WAIT_SYNCPT - NV_CLASS_HOST_LOAD_SYNCPT_PAYLOAD)))); ++ if (err < 0) ++ return err; ++ ++ err = ff_nvtegra_cmdbuf_push_word(cmdbuf, fence); ++ if (err < 0) ++ return err; ++ ++ err = ff_nvtegra_cmdbuf_push_word(cmdbuf, syncpt); ++ if (err < 0) ++ return err; ++ ++ return 0; ++} ++ ++int ff_nvtegra_cmdbuf_add_syncpt_incr(AVNVTegraCmdbuf *cmdbuf, uint32_t syncpt, ++ uint32_t num_incrs, uint32_t fence) +{ + void *tmp1; +#ifndef __SWITCH__ @@ -9939,12 +10145,38 @@ index 0000000000..52675cf499 + + return 0; +} -diff --git a/libavutil/tx1.h b/libavutil/tx1.h ++ ++int ff_nvtegra_cmdbuf_add_waitchk(AVNVTegraCmdbuf *cmdbuf, uint32_t syncpt, uint32_t fence) { ++#ifndef __SWITCH__ ++ uint8_t *mem; ++ void *tmp; ++ ++ mem = ff_nvtegra_map_get_addr(cmdbuf->map); ++ ++ tmp = av_realloc_array(cmdbuf->waitchks, cmdbuf->num_waitchks + 1, sizeof(*cmdbuf->waitchks)); ++ if (!tmp) ++ return AVERROR(ENOMEM); ++ ++ cmdbuf->waitchks = tmp; ++ ++ cmdbuf->waitchks[cmdbuf->num_waitchks] = (struct nvhost_waitchk){ ++ .mem = ff_nvtegra_map_get_handle(cmdbuf->map), ++ .offset = (uint8_t *)cmdbuf->cur_word - mem - sizeof(uint32_t), ++ .syncpt_id = syncpt, ++ .thresh = fence, ++ }; ++ ++ cmdbuf->num_waitchks++; ++#endif ++ ++ return ff_nvtegra_cmdbuf_push_wait(cmdbuf, syncpt, fence); ++} +diff --git a/libavutil/nvtegra.h b/libavutil/nvtegra.h new file mode 100644 -index 0000000000..f0e6fe52ac +index 0000000000..50f241cbe2 --- /dev/null -+++ b/libavutil/tx1.h -@@ -0,0 +1,187 @@ ++++ b/libavutil/nvtegra.h +@@ -0,0 +1,198 @@ +/* + * Copyright (c) 2023 averne + * @@ -9965,16 +10197,18 @@ index 0000000000..f0e6fe52ac + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + -+#ifndef AVUTIL_TX1_H -+#define AVUTIL_TX1_H ++#ifndef AVUTIL_NVTEGRA_H ++#define AVUTIL_NVTEGRA_H + +#include +#include + ++#include "buffer.h" ++ +#include "nvhost_ioctl.h" +#include "nvmap_ioctl.h" + -+typedef struct AVTX1Channel { ++typedef struct AVNVTegraChannel { +#ifndef __SWITCH__ + int fd; + int module_id; @@ -9988,9 +10222,9 @@ index 0000000000..f0e6fe52ac + MmuRequest mmu_request; +#endif + uint32_t clock; -+} AVTX1Channel; ++} AVNVTegraChannel; + -+typedef struct AVTX1Map { ++typedef struct AVNVTegraMap { +#ifndef __SWITCH__ + uint32_t handle; + uint32_t size; @@ -10001,10 +10235,10 @@ index 0000000000..f0e6fe52ac + uint32_t owner; +#endif + bool is_linear; -+} AVTX1Map; ++} AVNVTegraMap; + -+typedef struct ACTX1Cmdbuf { -+ AVTX1Map *map; ++typedef struct AVNVTegraCmdbuf { ++ AVNVTegraMap *map; + + uint32_t mem_offset, mem_size; + @@ -10029,59 +10263,68 @@ index 0000000000..f0e6fe52ac + uint32_t *fences; +#endif + uint32_t num_syncpt_incrs; -+} AVTX1Cmdbuf; -+ -+int ff_tx1_channel_open(AVTX1Channel *channel, const char *dev); -+int ff_tx1_channel_close(AVTX1Channel *channel); -+int ff_tx1_channel_get_clock_rate(AVTX1Channel *channel, uint32_t moduleid, uint32_t *clock_rate); -+int ff_tx1_channel_set_clock_rate(AVTX1Channel *channel, uint32_t moduleid, uint32_t clock_rate); -+int ff_tx1_channel_submit(AVTX1Channel *channel, AVTX1Cmdbuf *cmdbuf, uint32_t *fence); -+int ff_tx1_channel_set_submit_timeout(AVTX1Channel *channel, uint32_t timeout_ms); -+ -+int ff_tx1_syncpt_wait(AVTX1Channel *channel, uint32_t threshold, int32_t timeout); -+ -+int ff_tx1_map_allocate(AVTX1Map *map, uint32_t size, uint32_t align, uint32_t flags); -+int ff_tx1_map_free(AVTX1Map *map); -+int ff_tx1_map_from_va(AVTX1Map *map, void *mem, uint32_t size, uint32_t align, uint32_t flags); -+int ff_tx1_map_close(AVTX1Map *map); -+int ff_tx1_map_map(AVTX1Map *map); -+int ff_tx1_map_unmap(AVTX1Map *map); -+int ff_tx1_map_realloc(AVTX1Map *map, uint32_t size, uint32_t align, uint32_t flags); -+ -+static inline int ff_tx1_map_create(AVTX1Map *map, uint32_t size, uint32_t align, uint32_t flags) { ++ ++#ifndef __SWITCH__ ++ struct nvhost_waitchk *waitchks; ++ uint32_t num_waitchks; ++#endif ++} AVNVTegraCmdbuf; ++ ++AVBufferRef *ff_nvtegra_driver_init(void); ++ ++int ff_nvtegra_channel_open(AVNVTegraChannel *channel, const char *dev); ++int ff_nvtegra_channel_close(AVNVTegraChannel *channel); ++int ff_nvtegra_channel_get_clock_rate(AVNVTegraChannel *channel, uint32_t moduleid, uint32_t *clock_rate); ++int ff_nvtegra_channel_set_clock_rate(AVNVTegraChannel *channel, uint32_t moduleid, uint32_t clock_rate); ++int ff_nvtegra_channel_submit(AVNVTegraChannel *channel, AVNVTegraCmdbuf *cmdbuf, uint32_t *fence); ++int ff_nvtegra_channel_set_submit_timeout(AVNVTegraChannel *channel, uint32_t timeout_ms); ++ ++int ff_nvtegra_syncpt_wait(AVNVTegraChannel *channel, uint32_t threshold, int32_t timeout); ++ ++int ff_nvtegra_map_allocate(AVNVTegraMap *map, uint32_t size, uint32_t align, uint32_t flags); ++int ff_nvtegra_map_free(AVNVTegraMap *map); ++int ff_nvtegra_map_from_va(AVNVTegraMap *map, void *mem, uint32_t size, uint32_t align, uint32_t flags); ++int ff_nvtegra_map_close(AVNVTegraMap *map); ++int ff_nvtegra_map_map(AVNVTegraMap *map); ++int ff_nvtegra_map_unmap(AVNVTegraMap *map); ++int ff_nvtegra_map_realloc(AVNVTegraMap *map, uint32_t size, uint32_t align, uint32_t flags); ++ ++static inline int ff_nvtegra_map_create(AVNVTegraMap *map, uint32_t size, uint32_t align, uint32_t flags) { + int err; + -+ err = ff_tx1_map_allocate(map, size, align, flags); ++ err = ff_nvtegra_map_allocate(map, size, align, flags); + if (err < 0) + return err; + -+ return ff_tx1_map_map(map); ++ return ff_nvtegra_map_map(map); +} + -+static inline int ff_tx1_map_destroy(AVTX1Map *map) { ++static inline int ff_nvtegra_map_destroy(AVNVTegraMap *map) { + int err; + -+ err = ff_tx1_map_unmap(map); ++ err = ff_nvtegra_map_unmap(map); + if (err < 0) + return err; + -+ return ff_tx1_map_free(map); -+} -+ -+int ff_tx1_cmdbuf_init(AVTX1Cmdbuf *cmdbuf); -+int ff_tx1_cmdbuf_deinit(AVTX1Cmdbuf *cmdbuf); -+int ff_tx1_cmdbuf_add_memory(AVTX1Cmdbuf *cmdbuf, AVTX1Map *map, uint32_t offset, uint32_t size); -+int ff_tx1_cmdbuf_clear(AVTX1Cmdbuf *cmdbuf); -+int ff_tx1_cmdbuf_begin(AVTX1Cmdbuf *cmdbuf, uint32_t class_id); -+int ff_tx1_cmdbuf_end(AVTX1Cmdbuf *cmdbuf); -+int ff_tx1_cmdbuf_push_word(AVTX1Cmdbuf *cmdbuf, uint32_t word); -+int ff_tx1_cmdbuf_push_value(AVTX1Cmdbuf *cmdbuf, uint32_t offset, uint32_t word); -+int ff_tx1_cmdbuf_push_reloc(AVTX1Cmdbuf *cmdbuf, uint32_t offset, AVTX1Map *target, uint32_t target_offset, -+ int reloc_type, int shift); -+int ff_tx1_cmdbuf_add_syncpt_incr(AVTX1Cmdbuf *cmdbuf, uint32_t syncpt, uint32_t -+ num_incrs, uint32_t fence); -+ -+static inline uint32_t ff_tx1_map_get_handle(AVTX1Map *map) { ++ return ff_nvtegra_map_free(map); ++} ++ ++int ff_nvtegra_cmdbuf_init(AVNVTegraCmdbuf *cmdbuf); ++int ff_nvtegra_cmdbuf_deinit(AVNVTegraCmdbuf *cmdbuf); ++int ff_nvtegra_cmdbuf_add_memory(AVNVTegraCmdbuf *cmdbuf, AVNVTegraMap *map, uint32_t offset, uint32_t size); ++int ff_nvtegra_cmdbuf_clear(AVNVTegraCmdbuf *cmdbuf); ++int ff_nvtegra_cmdbuf_begin(AVNVTegraCmdbuf *cmdbuf, uint32_t class_id); ++int ff_nvtegra_cmdbuf_end(AVNVTegraCmdbuf *cmdbuf); ++int ff_nvtegra_cmdbuf_push_word(AVNVTegraCmdbuf *cmdbuf, uint32_t word); ++int ff_nvtegra_cmdbuf_push_value(AVNVTegraCmdbuf *cmdbuf, uint32_t offset, uint32_t word); ++int ff_nvtegra_cmdbuf_push_reloc(AVNVTegraCmdbuf *cmdbuf, uint32_t offset, AVNVTegraMap *target, uint32_t target_offset, ++ int reloc_type, int shift); ++int ff_nvtegra_cmdbuf_push_wait(AVNVTegraCmdbuf *cmdbuf, uint32_t syncpt, uint32_t fence); ++int ff_nvtegra_cmdbuf_add_syncpt_incr(AVNVTegraCmdbuf *cmdbuf, uint32_t syncpt, uint32_t ++ num_incrs, uint32_t fence); ++int ff_nvtegra_cmdbuf_add_waitchk(AVNVTegraCmdbuf *cmdbuf, uint32_t syncpt, uint32_t fence); ++ ++static inline uint32_t ff_nvtegra_map_get_handle(AVNVTegraMap *map) { +#ifndef __SWITCH__ + return map->handle; +#else @@ -10089,7 +10332,7 @@ index 0000000000..f0e6fe52ac +#endif +} + -+static inline void *ff_tx1_map_get_addr(AVTX1Map *map) { ++static inline void *ff_nvtegra_map_get_addr(AVNVTegraMap *map) { +#ifndef __SWITCH__ + return map->cpu_addr; +#else @@ -10097,7 +10340,7 @@ index 0000000000..f0e6fe52ac +#endif +} + -+static inline uint32_t ff_tx1_map_get_size(AVTX1Map *map) { ++static inline uint32_t ff_nvtegra_map_get_size(AVNVTegraMap *map) { +#ifndef __SWITCH__ + return map->size; +#else @@ -10106,38 +10349,38 @@ index 0000000000..f0e6fe52ac +} + +/* Addresses are shifted by 8 bits in the command buffer, requiring an alignment to 256 */ -+#define FF_TX1_MAP_ALIGN (1 << 8) ++#define FF_NVTEGRA_MAP_ALIGN (1 << 8) + -+#define FF_TX1_VALUE(offset, field, value) \ -+ ((value & \ -+ ((uint32_t)((UINT64_C(1) << ((1?offset ## _ ## field) - (0?offset ## _ ## field) + 1)) - 1))) \ ++#define FF_NVTEGRA_VALUE(offset, field, value) \ ++ ((value & \ ++ ((uint32_t)((UINT64_C(1) << ((1?offset ## _ ## field) - (0?offset ## _ ## field) + 1)) - 1))) \ + << (0?offset ## _ ## field)) + -+#define FF_TX1_ENUM(offset, field, value) \ -+ ((offset ## _ ## field ## _ ## value & \ -+ ((uint32_t)((UINT64_C(1) << ((1?offset ## _ ## field) - (0?offset ## _ ## field) + 1)) - 1))) \ ++#define FF_NVTEGRA_ENUM(offset, field, value) \ ++ ((offset ## _ ## field ## _ ## value & \ ++ ((uint32_t)((UINT64_C(1) << ((1?offset ## _ ## field) - (0?offset ## _ ## field) + 1)) - 1))) \ + << (0?offset ## _ ## field)) + -+#define FF_TX1_PUSH_VALUE(cmdbuf, offset, value) ({ \ -+ int _err = ff_tx1_cmdbuf_push_value(cmdbuf, (offset) / sizeof(uint32_t), value); \ -+ if (_err < 0) \ -+ return _err; \ ++#define FF_NVTEGRA_PUSH_VALUE(cmdbuf, offset, value) ({ \ ++ int _err = ff_nvtegra_cmdbuf_push_value(cmdbuf, (offset) / sizeof(uint32_t), value); \ ++ if (_err < 0) \ ++ return _err; \ +}) + -+#define FF_TX1_PUSH_RELOC(cmdbuf, offset, target, target_offset, type) ({ \ -+ int _err = ff_tx1_cmdbuf_push_reloc(cmdbuf, (offset) / sizeof(uint32_t), \ -+ target, target_offset, type, 8); \ -+ if (_err < 0) \ -+ return _err; \ ++#define FF_NVTEGRA_PUSH_RELOC(cmdbuf, offset, target, target_offset, type) ({ \ ++ int _err = ff_nvtegra_cmdbuf_push_reloc(cmdbuf, (offset) / sizeof(uint32_t), \ ++ target, target_offset, type, 8); \ ++ if (_err < 0) \ ++ return _err; \ +}) + -+#endif /* AVUTIL_TX1_H */ -diff --git a/libavutil/tx1_host1x.h b/libavutil/tx1_host1x.h ++#endif /* AVUTIL_NVTEGRA_H */ +diff --git a/libavutil/nvtegra_host1x.h b/libavutil/nvtegra_host1x.h new file mode 100644 -index 0000000000..f14f39ca32 +index 0000000000..ab4ce7a554 --- /dev/null -+++ b/libavutil/tx1_host1x.h -@@ -0,0 +1,91 @@ ++++ b/libavutil/nvtegra_host1x.h +@@ -0,0 +1,94 @@ +/* + * Copyright (c) 2023 averne + * @@ -10158,8 +10401,8 @@ index 0000000000..f14f39ca32 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + -+#ifndef AVUTIL_TX1_HOST1X_H -+#define AVUTIL_TX1_HOST1X_H ++#ifndef AVUTIL_NVTEGRA_HOST1X_H ++#define AVUTIL_NVTEGRA_HOST1X_H + +#include + @@ -10200,6 +10443,9 @@ index 0000000000..f14f39ca32 + return (4 << 28) | (offset << 16) | value; +} + ++#define NV_CLASS_HOST_LOAD_SYNCPT_PAYLOAD (0x0000004e) ++#define NV_CLASS_HOST_WAIT_SYNCPT (0x00000050) ++ +#define NV_THI_INCR_SYNCPT (0x00000000) +#define NV_THI_INCR_SYNCPT_INDX 7:0 +#define NV_THI_INCR_SYNCPT_COND 15:8 @@ -10228,7 +10474,35 @@ index 0000000000..f14f39ca32 +#define NV_THI_INT_MASK (0x0000007c) +#define NV_THI_INT_MASK_FALCON_INT 0:0 + -+#endif /* AVUTIL_TX1_HOST1X_H */ ++#endif /* AVUTIL_NVTEGRA_HOST1X_H */ +diff --git a/libavutil/pixdesc.c b/libavutil/pixdesc.c +index 6ded9467b0..1321c6fe58 100644 +--- a/libavutil/pixdesc.c ++++ b/libavutil/pixdesc.c +@@ -2793,6 +2793,10 @@ static const AVPixFmtDescriptor av_pix_fmt_descriptors[AV_PIX_FMT_NB] = { + }, + .flags = AV_PIX_FMT_FLAG_PLANAR, + }, ++ [AV_PIX_FMT_NVTEGRA] = { ++ .name = "nvtegra", ++ .flags = AV_PIX_FMT_FLAG_HWACCEL, ++ }, + }; + + static const char * const color_range_names[] = { +diff --git a/libavutil/pixfmt.h b/libavutil/pixfmt.h +index a26c72d56b..b09cd28afd 100644 +--- a/libavutil/pixfmt.h ++++ b/libavutil/pixfmt.h +@@ -429,6 +429,8 @@ enum AVPixelFormat { + AV_PIX_FMT_GBRAP14BE, ///< planar GBR 4:4:4:4 56bpp, big-endian + AV_PIX_FMT_GBRAP14LE, ///< planar GBR 4:4:4:4 56bpp, little-endian + ++ AV_PIX_FMT_NVTEGRA, ///< Tegra X1 pixel format, data[3] contains nothing ++ + AV_PIX_FMT_NB ///< number of pixel formats, DO NOT USE THIS if you want to link with shared libav* because the number of formats might differ between versions + }; + diff --git a/libavutil/vic_drv.h b/libavutil/vic_drv.h new file mode 100644 index 0000000000..65462c4058 diff --git a/scripts/switch/ffmpeg/ffmpeg_bad_frame.patch b/scripts/switch/ffmpeg/ffmpeg_bad_frame.patch deleted file mode 100644 index 293409bc..00000000 --- a/scripts/switch/ffmpeg/ffmpeg_bad_frame.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff --git a/libavcodec/tx1_h264.c b/libavcodec/tx1_h264.c -index c45deed971..0335e0e6b5 100644 ---- a/libavcodec/tx1_h264.c -+++ b/libavcodec/tx1_h264.c -@@ -461,6 +461,7 @@ static int tx1_h264_end_frame(AVCodecContext *avctx) { - H264Context *h = avctx->priv_data; - TX1H264DecodeContext *ctx = avctx->internal->hwaccel_priv_data; - AVFrame *frame = ctx->current_frame; -+ if (frame == NULL) return AVERROR_UNKNOWN; - FrameDecodeData *fdd = (FrameDecodeData *)frame->private_ref->data; - TX1Frame *tf = fdd->hwaccel_priv; - AVTX1Map *input_map = (AVTX1Map *)tf->input_map_ref->data; diff --git a/scripts/switch/mpv/PKGBUILD b/scripts/switch/mpv/PKGBUILD index c75d0b6e..8eb71855 100644 --- a/scripts/switch/mpv/PKGBUILD +++ b/scripts/switch/mpv/PKGBUILD @@ -5,7 +5,7 @@ pkgbasename=libmpv pkgname=switch-${pkgbasename} pkgver=0.36.0 -pkgrel=1 +pkgrel=2 pkgdesc='Command line video player (library only)' arch=('any') url='https://mpv.io/' diff --git a/scripts/switch/mpv_deko3d/PKGBUILD b/scripts/switch/mpv_deko3d/PKGBUILD index 66eb83ca..0d09449a 100644 --- a/scripts/switch/mpv_deko3d/PKGBUILD +++ b/scripts/switch/mpv_deko3d/PKGBUILD @@ -4,8 +4,8 @@ pkgbasename=libmpv pkgname=switch-${pkgbasename} -pkgver=0.35.1 -pkgrel=4 +pkgver=0.36.0 +pkgrel=1 pkgdesc='Command line video player (library only)' arch=('any') url='https://mpv.io/' @@ -22,6 +22,11 @@ groups=('switch-portlibs') prepare() { cd mpv-$pkgver + rm -rf video/out/hwdec/hwdec_deko3d.c + rm -rf video/out/deko3d/ + rm -rf osdep/switch/sys/mman.h + rm -rf libmpv/render_dk3d.h + rm -rf audio/out/ao_hos.c patch -Np1 -i "$srcdir/mpv.patch" } @@ -36,7 +41,7 @@ build() { --prefix="${PORTLIBS_PREFIX}" --disable-libmpv-shared \ --enable-libmpv-static --disable-cplayer --disable-sdl2 \ --disable-gl --disable-plain-gl \ - --enable-deko3d --enable-hos-audio --enable-hos-video \ + --enable-deko3d --enable-hos-audio \ --disable-iconv --disable-jpeg --disable-libavdevice --disable-debug-build sed -i 's/#define HAVE_POSIX 1/#define HAVE_POSIX 0/' build/config.h ./waf build