From 24b0050cbab28f788e98bb45f0de69989129a844 Mon Sep 17 00:00:00 2001 From: Fabrice DJIATSA Date: Wed, 4 Sep 2024 09:28:28 +0200 Subject: [PATCH] stm32cube: recalibrate hsi clock after reset This allows the HSI clock to be recalibrated after a reset to default state. 0x40U is a default hsi calibration trimming for h7 line. Signed-off-by: Fabrice DJIATSA --- stm32cube/stm32h7rsxx/drivers/src/stm32h7rsxx_ll_rcc.c | 5 +++++ stm32cube/stm32h7xx/drivers/src/stm32h7xx_ll_rcc.c | 6 ++++++ 2 files changed, 11 insertions(+) diff --git a/stm32cube/stm32h7rsxx/drivers/src/stm32h7rsxx_ll_rcc.c b/stm32cube/stm32h7rsxx/drivers/src/stm32h7rsxx_ll_rcc.c index 87d4d6244..172eb101d 100644 --- a/stm32cube/stm32h7rsxx/drivers/src/stm32h7rsxx_ll_rcc.c +++ b/stm32cube/stm32h7rsxx/drivers/src/stm32h7rsxx_ll_rcc.c @@ -168,7 +168,12 @@ void LL_RCC_DeInit(void) /* Wait for HSI READY bit */ while (LL_RCC_HSI_IsReady() == 0U) {} + /* Set HSIDIV Default value */ + CLEAR_BIT(RCC->CR, RCC_CR_HSIDIV); + /* Set HSITRIM bits to the reset value */ + LL_RCC_HSI_SetCalibTrimming(0x40U); + /* Reset CFGR register to select HSI as system clock */ CLEAR_REG(RCC->CFGR); diff --git a/stm32cube/stm32h7xx/drivers/src/stm32h7xx_ll_rcc.c b/stm32cube/stm32h7xx/drivers/src/stm32h7xx_ll_rcc.c index e7b85d92d..87a3c9777 100644 --- a/stm32cube/stm32h7xx/drivers/src/stm32h7xx_ll_rcc.c +++ b/stm32cube/stm32h7xx/drivers/src/stm32h7xx_ll_rcc.c @@ -138,6 +138,12 @@ void LL_RCC_DeInit(void) while (LL_RCC_HSI_IsReady() == 0U) {} + /* Set HSIDIV Default value */ + CLEAR_BIT(RCC->CR, RCC_CR_HSIDIV); + + /* Set HSITRIM bits to the reset value */ + LL_RCC_HSI_SetCalibTrimming(0x40U); + /* Reset CFGR register */ CLEAR_REG(RCC->CFGR);