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GCS ACLE #260
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GCS ACLE #260
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LGTM with small comments.
main/acle.md
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To use the intrinsics, `arm_acle.h` needs to be included. | ||
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The intrinsics are available if `__ARM_FEATURE_GCS_DEFAULT` is defined, |
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Intrinsics would be always available because there could be cases when the intrinsics is called in the right context but the whole translation unit is not compiled with GCS. (e.g. target attribute or FMV)
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i'm not against making intrinsics always available, but for GCS the intrinsics are only useful if GCS is enabled, and that can only be enabled if everything is compiled in GCS compatible mode, so there is not really any context when __ARM_FEATURE_GCS_DEFAULT
is undef but you want the intrinsics anyway.
main/acle.md
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but they can only be called if GCS instructions are supported. | ||
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The `__chkfeat` intrinsics with `_CHKFEAT_GCS` can be used to check | ||
if GCS protection is enabled at runtime. If GCS protection is enabled |
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superfluous space before If GCS
main/acle.md
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``` | ||
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Reads and returns the last entry on the GCS of the current thread and | ||
updates the GCS pointer to point to the previous entry. If GCS |
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superfluous space before If GCS
main/acle.md
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``` | ||
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Switches the GCS of the current thread, where the argument is the new | ||
GCS pointer, and returns the old GCS pointer. If GCS protection is |
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superfluous space before If GCS
@@ -2937,6 +2948,18 @@ inclusive. See implementation documentation for the effect (if any) of | |||
this instruction and the meaning of the argument. This is available only | |||
when compiling for AArch32. | |||
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``` c | |||
uint64_t __chkfeat(uint64_t); |
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The behaviour of this intrinsic is opposite that of the instruction (chkfeat instruction clears the bit if the feature is enabled), which I think is unique among intrinsics. It would be worthwhile specifically noting this.
Also "feature is available" should be "feature is enabled" (as the chkfeat instruction will leave the bit alone if the feature is available but disabled).
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I'd prefer to write/read this code in applications:
if( __chkfeat(_CHKFEAT_GCS)) { // do GCS stuff. }
chkfeat must clear the bit if the feature is present due to it is a NOP on old CPUs where it won't change the register content.
That logic twist is not required for the app developers.
+1 for the
Also "feature is available" should be "feature is enabled"
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Reads and returns the last entry on the GCS of the current thread and | ||
updates the GCS pointer to point to the previous entry. If GCS | ||
protection is disabled then it has no side effect and returns `0`. |
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The gcspopm instruction does nothing when gcs is disabled (i.e. the value in the destination register is unchanged). Is the intent that the intrinsic sets the destination register to zero before executing the instruction?
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yes, i think this is the only way the intrinsic is usable in the "asynchronously disabled gcs" scenario.
(which we don't know yet if linux will support, currently it does not want to)
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``` c | ||
const void *__gcspr(void); |
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i plan to change this back to non-const so that the intrinsics support the gcs write access enabled case (even if that's not expected to be a common setting).
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LGTM, let see what others think.
NIT maybe the draft could be dropped now from the name of the PR.
potential issues with current spec:
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I'm not sure we need this. We can always add it later if there's a need.
I think we only really need the pointer to be non-const if we have a gcs store intrinsic. constness is only about if the user is permitted to write to something, so entries on the gcs stack being modified by bl/ret isn't relevant.
Is this about #214? I think the way GCS intrinsics are currently described is OK with regards to that (though I have a couple of comments on the wording). |
main/acle.md
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To use the intrinsics, `arm_acle.h` needs to be included. | ||
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The intrinsics are only valid to call when GCS instructions are |
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"The intrinsics are only valid to call" should be "These intrinsics are available" (that's the wording we use elsewhere).
main/acle.md
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to check if GCS protection is enabled at runtime. If GCS protection is | ||
enabled then GCS instructions are supported and the code was compiled | ||
in a GCS protection compatible way (`__ARM_FEATURE_GCS_DEFAULT` was | ||
defined). |
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The final sentence here is a bit weird and I'm not sure what exactly it's saying. I think what it's saying is that "GCS enabled implies GCS available", i.e. if you have if (__chkfeat(_CHKFEAT_GCS)) { }
then you know GCS must be available inside that block, or perhaps the other way around that if you know GCS isn't available then you know __chkfeat(_CHKFEAT_GCS)
will never return true.
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yeah this should be worded better, or removed.
i was trying to point out that the runtime will only enable GCS if all code is built with GCS support, so if __chkfeat check returns true, that implies __ARM_FEATURE_GCS_DEFAULT, no need to check that separately.
LGTM. |
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LGTM
main/acle.md
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`__ARM_FEATURE_GCS_DEFAULT` is defined to `1` if the code generation is | ||
compatible with enabling the Guarded Control Stack (GCS) extension based | ||
protection. It is undefined otherwise. |
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protection. It is undefined otherwise. | |
protection. It is undefined otherwise. |
main/acle.md
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protection. It is undefined otherwise. | ||
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`__ARM_FEATURE_GCS` is defined to `1` if the Guarded Control Stack (GCS) | ||
extension is available on the target. It is undefined otherwise. |
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extension is available on the target. It is undefined otherwise. | |
extension is available on the target. It is undefined otherwise. |
This adds intrinsics defined in ARM-software/acle#260 Doing this requires some changes to the GCS instruction definitions, as these intrinsics make use of how some instructions don't modify the input register when GCS is disabled, and they need to be correctly marked with mayLoad/mayStore/hasSideEffects for instruction selection to work.
This adds intrinsics defined in ARM-software/acle#260 Doing this requires some changes to the GCS instruction definitions, as these intrinsics make use of how some instructions don't modify the input register when GCS is disabled, and they need to be correctly marked with mayLoad/mayStore/hasSideEffects for instruction selection to work.
This adds intrinsics defined in ARM-software/acle#260 Doing this requires some changes to the GCS instruction definitions, as these intrinsics make use of how some instructions don't modify the input register when GCS is disabled, and they need to be correctly marked with mayLoad/mayStore/hasSideEffects for instruction selection to work.
Regarding the return type of In a nutshell, the GCS pointer can be writeable in certain situations: via stack switch operation or via the |
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