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@CospanDesign

CospanDesign

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  1. nysa-sata nysa-sata Public

    Verilog 80 42

  2. python-pci python-pci Public

    Python interface to PCIE

    C++ 38 8

  3. nysa-verilog nysa-verilog Public

    Verilog Repository for GIT

    Verilog 29 21

  4. vivado-ip-cores vivado-ip-cores Public

    IP Cores that can be used within Vivado

    Verilog 24 11

  5. nysa-sdio-device nysa-sdio-device Public

    SDIO Device Verilog Core

    Verilog 22 14

  6. nysa nysa Public

    FPGA Development toolset

    Python 20 3

Repositories

Showing 10 of 66 repositories
  • python Public

    Various Helpful Python Scripts

    CospanDesign/python’s past year of commit activity
    Python 4 MIT 2 0 0 Updated Sep 18, 2023
  • vivado-ip-cores Public

    IP Cores that can be used within Vivado

    CospanDesign/vivado-ip-cores’s past year of commit activity
    Verilog 24 MIT 11 0 0 Updated May 18, 2021
  • nysa-verilog Public

    Verilog Repository for GIT

    CospanDesign/nysa-verilog’s past year of commit activity
    Verilog 29 MIT 21 1 0 Updated May 4, 2021
  • olympus Public

    FPGA Software development environment

    CospanDesign/olympus’s past year of commit activity
    Verilog 2 2 0 0 Updated Apr 14, 2020
  • cocotb Public Forked from cocotb/cocotb

    Coroutine Co-simulation Test Bench

    CospanDesign/cocotb’s past year of commit activity
    Python 2 514 0 0 Updated Sep 24, 2019
  • guppy-buddy Public

    Beagle Board ish devboard in a video game configuration

    CospanDesign/guppy-buddy’s past year of commit activity
    1 0 0 0 Updated Dec 20, 2018
  • cospandesign.github.io Public

    Website for cospan design

    CospanDesign/cospandesign.github.io’s past year of commit activity
    C 1 1 1 1 Updated Oct 16, 2018
  • CospanDesign/guppy-buddy-uboot’s past year of commit activity
    C 0 0 0 0 Updated Aug 30, 2018
  • enigma Public

    Snickerdoodle Carrier Board

    CospanDesign/enigma’s past year of commit activity
    C++ 6 MIT 2 0 0 Updated Jul 30, 2018
  • CospanDesign/sdio-device’s past year of commit activity
    Verilog 17 MIT 4 0 0 Updated Jul 25, 2018

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