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RISC-V: Tweak generic vector COST model
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Notice current generic vector cost model make PR112387 failed to vectorize.

Adapt it same as ARM SVE generic vector cost model which can fix it.

Committed as it is obvious fix.

	PR target/112387

gcc/ChangeLog:

	* config/riscv/riscv.cc: Adapt generic cost model same ARM SVE.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/costmodel/riscv/rvv/pr112387.c: Moved to...
	* gcc.dg/vect/costmodel/riscv/rvv/pr112387-1.c: ...here.
	* gcc.dg/vect/costmodel/riscv/rvv/pr112387-2.c: New test.
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zhongjuzhe authored and Incarnation-p-lee committed Dec 15, 2023
1 parent c7ef218 commit 4bfafea
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Showing 3 changed files with 31 additions and 12 deletions.
24 changes: 12 additions & 12 deletions gcc/config/riscv/riscv.cc
Original file line number Diff line number Diff line change
Expand Up @@ -355,13 +355,13 @@ static const common_vector_cost generic_vls_vector_cost = {
1, /* fp_stmt_cost */
1, /* gather_load_cost */
1, /* scatter_store_cost */
1, /* vec_to_scalar_cost */
2, /* vec_to_scalar_cost */
1, /* scalar_to_vec_cost */
1, /* permute_cost */
3, /* align_load_cost */
3, /* align_store_cost */
3, /* unalign_load_cost */
3, /* unalign_store_cost */
2, /* permute_cost */
1, /* align_load_cost */
1, /* align_store_cost */
1, /* unalign_load_cost */
1, /* unalign_store_cost */
};

/* Generic costs for VLA vector operations. */
Expand All @@ -371,13 +371,13 @@ static const scalable_vector_cost generic_vla_vector_cost = {
1, /* fp_stmt_cost */
1, /* gather_load_cost */
1, /* scatter_store_cost */
1, /* vec_to_scalar_cost */
2, /* vec_to_scalar_cost */
1, /* scalar_to_vec_cost */
1, /* permute_cost */
3, /* align_load_cost */
3, /* align_store_cost */
3, /* unalign_load_cost */
3, /* unalign_store_cost */
2, /* permute_cost */
1, /* align_load_cost */
1, /* align_store_cost */
1, /* unalign_load_cost */
1, /* unalign_store_cost */
},
};

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19 changes: 19 additions & 0 deletions gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr112387-2.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
/* { dg-do compile } */
/* { dg-options "-march=rv64gcv -mabi=lp64d -mtune=generic-ooo -O3 -ftree-vectorize -fdump-tree-vect-details" } */

#include <stdint-gcc.h>

void
f2 (uint64_t *__restrict y, uint64_t *__restrict x,
uint64_t *__restrict indices, uint64_t n)
{
for (int64_t i = 0; i < n; ++i)
{
y[i * 2] = x[indices[i * 2]] + 1;
y[i * 2 + 1] = x[indices[i * 2 + 1]] + 2;
}
}

/* { dg-final { scan-tree-dump "Loop contains only SLP stmts" vect } } */
/* { dg-final { scan-assembler-not "vlseg" } } */
/* { dg-final { scan-assembler-not "vsseg" } } */

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