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Add old intel and amd cpus #260
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cpufetch does not accept pull requests, see the contributing guidelines for details |
Thanks for the patch. Overall, looks good. I've added a few comments. Also, could you provide some screenshot to show how this looks on such old Intel/AMD CPUs? This will also be useful to better answer your questions:
Not right now, but because it's size is increasing I will probably rewrite it into a more structured way (similar to
It would be good to have one if needed, but I would need to see some evidences. Do you have any CPU for which you cannot find the CPU frequency?
Peak Performance no, for SSE maybe. Do you have any CPU in such scenario? |
Regarding the frequency, I have implemented a new functionality recently that estimates the maximum frequency. That's why you have noticed this change in the recent commits. Regarding SSE, I've pushed a fix (cb186a2), just rebase and confirm that it works as expected. |
There is something important I forgot to mention in the last review. Setting different strings for the same uarch, like in: CHECK_UARCH(arch, 0, 4, 0, 1, NA, "i80486DX-50", UARCH_I486, UNK)
CHECK_UARCH(arch, 0, 4, 0, 2, NA, "i80486SX", UARCH_I486, UNK)
CHECK_UARCH(arch, 0, 4, 0, 3, NA, "i80486DX2", UARCH_I486, UNK)
CHECK_UARCH(arch, 0, 4, 0, 4, NA, "i80486SL", UARCH_I486, UNK)
CHECK_UARCH(arch, 0, 4, 0, 5, NA, "i80486SX2", UARCH_I486, UNK)
CHECK_UARCH(arch, 0, 4, 0, 7, NA, "i80486DX2WB", UARCH_I486, UNK)
CHECK_UARCH(arch, 0, 4, 0, 8, NA, "i80486DX4", UARCH_I486, UNK)
CHECK_UARCH(arch, 0, 4, 0, 9, NA, "i80486DX4WB", UARCH_I486, UNK) This is incorrect! All strings for a given uarch must be the same (in this case it should be something like
You can implement this yourself, or just leave it like this and I'll implement it after merging your PR. |
Another (optional) enhancement to your PR is to add support for detecting MMX. As you showed, your CPU does not support SSE but I'll probably support MMX. You could take the AVX or SSE detection as a reference to implement this. After that, in your case it would show that MMX is supported for your CPU (assuming it does support it) and also the peak performance would be higher. |
That does make sense. So, there are three different things conflated in the current mapping
To keep the implementation purely for uarch, this is my thought:
Adding MMX detection does seem like a good idea. (Although the Pentium Pro does predate MMX). I think that should wait for a different PR. |
Also, I did see that the SSE fix worked. |
If prefer not to use the uarch name directly for the CPU name. What I mean is that I would rather return "Intel 486 DX" instead of "DX" and then append that to the "Intel 486". Anyway, I will implement this after your PR lands.
This is actually a very good point. I want to implement this since 2021! (see #120) but not much time to spend on this.
Agreed, can be good for a different PR if you have a good testcase (a CPU that supports MMX but not newer instructions like SSE). Right now this PR looks good to me. If you can confirm that this works for your hardware I'll merge into master soon 👍 |
For the CPU identification, everything looks good to me. The only minor issue (which we can figure out later) is that getting a clock speed for these old CPUs is tricky:
486 SocketPentium ProAMD K5 |
Sorry for the big delay. Sometimes it's dificult to find time for this. About the frequency, I don't think there is much to do. I'm afraid that without |
Yeah, I'm good to merge. Just please update the email address to [email protected] |
Merged! Thank you for your contribution and looking forward for the next 👍 |
All of these values come from sandpile.org.
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