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Vanquishing Bugs!!!
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Vanquishing Bugs!!!

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Eloquencere/README.md

Hi !👋 My name is Sriranga

Hardware, Embedded Designer

I'm currently doing my Bachelors in Electronics Engineering, my passion is to design optimised hardware for a specific purpose

  • 🧠  I'm learning SystemVerilog and Dart

Skills

Verilog SystemVerilog

C C++

Python MATLAB Bash

TypeScript HTML5 CSS3 MySQL

Socials

Collaborated Repositories

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  1. Adder-Designs Adder-Designs Public

    Designs covering different types of digital adder topologies

    SystemVerilog 2

  2. Custom-Keyboard Custom-Keyboard Public

    SystemVerilog

  3. Beginner-FPGA Beginner-FPGA Public

    Simple synthesizable codes that can run on an FPGA

    Tcl

  4. Digital-Design-Algorithms Digital-Design-Algorithms Public

    An effort to implement the most used algorithms used in Digital Design

    Python

  5. spacebiz24/SystemVerilog-Basics spacebiz24/SystemVerilog-Basics Public

    SystemVerilog 1

  6. spacebiz24/x86-Basics spacebiz24/x86-Basics Public

    Assembly 1