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Fallout fbas #348

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21 changes: 13 additions & 8 deletions modules/fbas/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -15,33 +15,38 @@ ARCH = x86_64
TARGET_RTE ?= fbas
YOCTO_TARGET_RTE ?=$(TARGET_RTE)-yocto

.SILENT .PHONY: check deploy check-yocto-rte deploy-yocto-rte firmware
.SILENT .PHONY: check-sl7-rte deploy-sl7-rte check-yocto-rte deploy-yocto-rte firmware

# deploy FBAS artifacts to the RTE directory
deploy:
# deploy FBAS artifacts to the RTE directory (for sl7 ramdisk)
deploy-sl7-rte:
# TR LM32 firmware
echo deploy '$(FW)/*.bin' to '$(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)/firmware'
mkdir -p $(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)/firmware
cp $(FW)/*.bin $(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)/firmware
cp -u -p $(FW)/*.bin $(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)/firmware

# test scripts
echo deploy '$(TEST)/scu/*.sh to $(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)/$(ARCH)/bin'
cp $(TEST)/scu/*.sh $(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)/$(ARCH)/bin
cp -u -p $(TEST)/scu/*.sh $(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)/$(ARCH)/bin

# test artifacts (ie., schedule for local injection)
echo deploy '$(TEST)/scu/*.sched to $(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)/test'
mkdir -p $(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)/test
cp -u -p $(TEST)/scu/*.sched $(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)/test

# RTE script for NFSinit symlink
echo deploy '$(ASL)/timing-rte-$(TARGET_RTE)' to '$(NFSBASE)/nfsinit/global'
cp $(ASL)/timing-rte-$(TARGET_RTE) $(NFSBASE)/nfsinit/global
cp -u -p $(ASL)/timing-rte-$(TARGET_RTE) $(NFSBASE)/nfsinit/global

# NFSinit script
echo deploy '$(ASL)/timing-rte.sh' to '$(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)'
cp $(ASL)/timing-rte.sh $(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)
cp -u -p $(ASL)/timing-rte.sh $(NFSBASE)/$(TIMING_RTE)/$(TARGET_RTE)

# deploy the FBAS artifacts to the target RTE directory (for Yocto based ramdisk)
deploy-yocto-rte:
TARGET_RTE=$(YOCTO_TARGET_RTE) NFSBASE_PATH=$(NFSBASE) ARCH=$(ARCH) ./rte/deploy-yocto-rte.sh

# check if target RTE is built
check:
check-sl7-rte:
TARGET_RTE=$(TARGET_RTE) NFSBASE_PATH=$(NFSBASE) ARCH=$(ARCH) ./$(RTE)/check-rte.sh

check-yocto-rte:
Expand Down
17 changes: 15 additions & 2 deletions modules/fbas/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -88,8 +88,8 @@ There are several test cases available in 'bel_projects/modules/fbas/test/tools'
- test timing message transmission (test_ttf_basic.sh)
- other

Minimal test setup is built in TTF:
- nwt0297m66: WR switch (*WRS*) configured with 'dot-config_timing_mps_access'
Basic test setup is built in TTF:
- nwt0297m66: WR switch (*WRS*) configured with 'dot-config_timing_access_fbas'
- scuxl0396: TX SCU
- scuxl0497: RX SCU

Expand Down Expand Up @@ -128,6 +128,19 @@ The FBAS event is simulated by injecting a timing event TX SCU locally with **sa
The required event configuration for RX/TX SCUs is done also with **saft-ecpu-ctl** and **saft-io-ctl** tools.

All procedures of the test are scripted in 'test_ttf_nw_perf.sh'.
To start a test with basic setup, invoke below command (in $HOME/fbas_test/tools):

```
./test_ttf_nw_perf.sh -v
```

Assume, another setup is built with two TX SCUs (TX1=scuxl0339 and TX2=scuxl0305) and a RX SCU (scuxl0411).
The IO connection between RX and TX nodes via LEMO cable: RX:IO1 <===> TX1:IO2, RX:IO2 <===> TX2:IO2.
For 'test_ttf_nw_perf.sh' the **order of TX nodes** should reflect the IO connection, otherwise the test run will return dubious measurement results:

```
./test_ttf_nw_perf.sh -v -y -t scuxl0329 -t scuxl0305 -r scuxl0411
```

## 5. Q&A

Expand Down
16 changes: 6 additions & 10 deletions modules/fbas/fw/fbas.c
Original file line number Diff line number Diff line change
Expand Up @@ -510,13 +510,9 @@ uint32_t handleEcaEvent(uint32_t usTimeout, uint32_t* mpsTask, timedItr_t* itr,
}

// send MPS event
if (sendMpsMsgSpecific(itr, *head, FBAS_FLG_EID, N_EXTRA_MPS_NOK) == COMMON_STATUS_OK) {
uint32_t count = sendMpsMsgSpecific(itr, *head, FBAS_FLG_EID, N_EXTRA_MPS_NOK);
// count sent timing messages with MPS event
*(pSharedApp + (FBAS_SHARED_GET_CNT >> 2)) = msrCnt(TX_EVT_CNT, 1);
if ((*head)->prot.flag == MPS_FLAG_NOK) {
*(pSharedApp + (FBAS_SHARED_GET_CNT >> 2)) = msrCnt(TX_EVT_CNT, N_EXTRA_MPS_NOK);
}
}
*(pSharedApp + (FBAS_SHARED_GET_CNT >> 2)) = msrCnt(TX_EVT_CNT, count);

// store timestamps to measure delays
storeTsMeasureDelays(pSharedApp, FBAS_SHARED_GET_TS1, now, ecaDeadline);
Expand All @@ -535,8 +531,8 @@ uint32_t handleEcaEvent(uint32_t usTimeout, uint32_t* mpsTask, timedItr_t* itr,
if (nodeType == FBAS_NODE_RX) { // FBAS RX generates MPS class 2 signals

// count received timing messages with MPS flag or MPS event
if (COMMON_STATUS_OK == fwlib_getEcaValidCnt(&actions)) // number of the valid actions
*(pSharedApp + (FBAS_SHARED_ECA_VLD >> 2)) = msrCnt(ECA_VLD_ACT, actions);
actions=1; // do not use fwlib_getEcaValidCnt() to get the ECA channel valid count => it returns zero value
*(pSharedApp + (FBAS_SHARED_ECA_VLD >> 2)) = msrCnt(ECA_VLD_ACT, actions);

if (COMMON_STATUS_OK == fwlib_getEcaOverflowCnt(&actions)) // number of the overflow actions
*(pSharedApp + (FBAS_SHARED_ECA_OVF >> 2)) = msrCnt(ECA_OVF_ACT, actions);
Expand Down Expand Up @@ -844,9 +840,9 @@ uint32_t doActionOperation(uint32_t* pMpsTask, // MPS-relevant tasks

// periodic, unicast transmission of the MPS flag
if (setEndpDstAddr(DST_ADDR_RXNODE) == COMMON_STATUS_OK) {
if (sendMpsMsgBlock(N_MPS_FLAGS, pRdItr, FBAS_FLG_EID) == COMMON_STATUS_OK)
uint32_t count = sendMpsMsgBlock(N_MPS_FLAGS, pRdItr, FBAS_FLG_EID);
// count sent timing messages with MPS flag
*(pSharedApp + (FBAS_SHARED_GET_CNT >> 2)) = msrCnt(TX_EVT_CNT, N_MPS_FLAGS);
*(pSharedApp + (FBAS_SHARED_GET_CNT >> 2)) = msrCnt(TX_EVT_CNT, count);
}
else {
DBPRINT1("Err - nothing sent! TODO: set failed status\n");
Expand Down
4 changes: 2 additions & 2 deletions modules/fbas/fw/fwlib.c
Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,7 @@ status_t fwlib_getEcaCnt(uint8_t offset, uint32_t *buffer)
}

/**
* \brief return number of the overflow actions
* \brief return number of the valid actions
*
* All ECA actions (valid, failed, overflow, full) are counted and kept in a set of
* clear-on-read registers.
Expand Down Expand Up @@ -81,7 +81,7 @@ status_t fwlib_getEcaOverflowCnt(uint32_t *buffer)
}

/**
* \brief return number of a specified ECA actions
* \brief return number of a failed ECA actions
*
* All ECA actions (valid, failed, overflow, full) are counted and kept in a set of
* clear-on-read registers.
Expand Down
2 changes: 1 addition & 1 deletion modules/fbas/fw/platform.mk
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ else
undefine N_MPS_CH
endif

CFLAGS = -I../include -I../../common-libs/include -I../../wb_timer -I../../../ip_cores/saftlib/drivers -I$(PATHFW) \
CFLAGS = -I../include -I../../common-libs/include -I../../wb_timer -I../../../ip_cores/saftlib/src -I$(PATHFW) \
-DPLATFORM=$(PLATFORM) -DDEBUGLEVEL=$(DEBUGLVL) $(EXTRA_FLAGS)

ifneq ($(MPS_CH),)
Expand Down
75 changes: 54 additions & 21 deletions modules/fbas/fw/sb_scan.c
Original file line number Diff line number Diff line change
Expand Up @@ -120,7 +120,7 @@ regset_t regSet[N_REGSET] = {
// application-specific function prototypes
static void initLast();
static status_t probeSbSlave(volatile uint16_t* pMaster, uint16_t sysId, uint16_t grpId, uint32_t* slaves);
static void probeSbSlaveExt(volatile uint16_t* pMaster, uint32_t slaves, uint32_t* pSharedDest);
static void probeSbSlaveExt(volatile uint16_t* pMaster, uint32_t slot, uint32_t* pSharedDest);
static status_t readSbSlaveReg(volatile uint16_t* pSlave, regset_t* regset, uint16_t *pData);
static status_t writeSbSlaveReg(volatile uint16_t* pSlave, regset_t* regset, uint16_t *pData);

Expand All @@ -144,39 +144,74 @@ status_t probeSbSlave(volatile uint16_t* pMaster, uint16_t sysId, uint16_t grpId
if (cidSys == sysId && cidGrp == grpId) {
*slaves |= (uint32_t)(0x1) << slot;

u16val = *(pMaster + (slot << 16) + SBS_CLK_10K); // get macro clock of a SCU bus slave
DBPRINT1("sb_scan: clk (x10K)=%d\n", u16val);
DBPRINT1("sb_scan: slot=%d, sys=0x%x, grp=0x%x detected\n",
slot, sysId, grpId);

// standard register values of a chosen SCU bus slave
u16val = *(pMaster + (slot << 16) + SBS_SLAVE_ID); // get slave ID
DBPRINT1("\t id=0x%x\n", u16val);

u16val = *(pMaster + (slot << 16) + SBS_FW_VER); // get FW version
DBPRINT1("\t fw ver=0x%x\n", u16val);

u16val = *(pMaster + (slot << 16) + SBS_FW_REL); // get FW release
DBPRINT1("\t fw rel=0x%x\n", u16val);

u16val = *(pMaster + (slot << 16) + SBS_MACRO_VER); // get version and release of macro
DBPRINT1("\tmacro ver=0x%x\n", u16val);

u16val = *(pMaster + (slot << 16) + SBS_CLK_10K); // get clock frequency of macro
DBPRINT1("\tmacro clk=%d [MHz]\n", u16val/100);

u16val = *(pMaster + (slot << 16) + SBS_EXT_CID_SYS); // get extension system ID
DBPRINT1("\t ext sys=0x%x\n", u16val);

u16val = *(pMaster + (slot << 16) + SBS_EXT_CID_GRP); // get extension group ID
DBPRINT1("\t ext grp=0x%x\n", u16val);

u16val = *(pMaster + (slot << 16) + SBS_ECHO); // get echo register
DBPRINT1("\t echo=0x%x\n", u16val);

u16val = *(pMaster + (slot << 16) + SBS_STATUS); // get status register
DBPRINT1("\t status=0x%x\n", u16val);

// probe extension card of a SCU bus slave
probeSbSlaveExt(pMaster, slot, pSharedGetSbStd);

} else {
DBPRINT1("sb_scan: slot=%d, sys=0x%x, grp=0x%x not found\n",
slot, sysId, grpId);
}
}

DBPRINT1("sb_scan: slaves=%08x\n", *slaves);
DBPRINT1("sb_scan: slaves=%08x (slot1 starts at bit1)\n", *slaves);
return COMMON_STATUS_OK;
}

// probe an extension card of a SCU bus slave
// pMaster - address of the SCU bus master
// slaves - SCU slaves (bit1=slot1, bits=31..0)
// slot - SCU bus slot number
// pSharedDest - destination location in the shared memory
void probeSbSlaveExt(volatile uint16_t* pMaster, uint32_t slaves, uint32_t* pSharedDest)
void probeSbSlaveExt(volatile uint16_t* pMaster, uint32_t slot, uint32_t* pSharedDest)
{
uint8_t u8val;
uint16_t u16val, u16val2;
uint32_t u32val, u32val2;

for (u8val = 1; u8val <= N_SB_SLOTS; ++u8val) {
u32val = (slaves >> u8val) & 0x1; // get slot number
u32val <<= 16; // offset for a SCU bus slave
u16val = *(pMaster + u32val + SBS_EXT_CID_SYS); // read extension CID system ID
u16val2 = *(pMaster + u32val + SBS_EXT_CID_GRP); // read extension CID group ID
u32val = (0x1) << slot; // encode slot to bit (slot1=bit1, bits=0..31)
u32val <<= 16; // offset for a SCU bus slave
u16val = *(pMaster + u32val + SBS_EXT_CID_SYS); // read extension CID system ID
u16val2 = *(pMaster + u32val + SBS_EXT_CID_GRP); // read extension CID group ID

if (u16val != SBS_CID_NO_EXT) {
u32val = u16val;
u32val <<= 16;
u32val |= u16val2;
if (u16val != SBS_CID_NO_EXT) {
u32val = u16val;
u32val <<= 16;
u32val |= u16val2;

*(pSharedDest + SBS_EXT_CID_SYS + u8val - 1) = u32val;
}
DBPRINT1("sb_scan: slot%d: reg=%x, sys=%04x, grp=%04x\n",u8val, SBS_EXT_CID_SYS, u16val, u16val2);
*(pSharedDest + SBS_EXT_CID_SYS + slot - 1) = u32val;
DBPRINT1("\textension=yes (sys=0x%04x, grp=0x%04x)\n", u16val, u16val2);

} else {
DBPRINT1("\textension=no (sys=0x%04x, grp=0x%04x)\n", u16val, u16val2);
}
}

Expand Down Expand Up @@ -338,7 +373,6 @@ void cmdHandler(uint32_t *reqState, uint32_t cmd)
case FBAS_CMD_PROBE_SB_DIOB: // probe DIOB card on SCU bus
if (probeSbSlave(pSbMaster, CID_SYS_DIOB, CID_GRP_DIOB, &sbSlaves) == COMMON_STATUS_OK) {
*pSharedGetSbSlaves = sbSlaves;
probeSbSlaveExt(pSbMaster, sbSlaves, pSharedGetSbStd);

for (i = 1; i < N_SB_SLOTS; ++i) {
u32val = (sbSlaves >> i) & 0x01;
Expand Down Expand Up @@ -376,7 +410,6 @@ void cmdHandler(uint32_t *reqState, uint32_t cmd)
if (u16val && u16val2) {
if (probeSbSlave(pSbMaster, u16val, u16val2, &sbSlaves) == COMMON_STATUS_OK) {
*pSharedGetSbSlaves = sbSlaves;
probeSbSlaveExt(pSbMaster, sbSlaves, pSharedGetSbStd);
} else
DBPRINT1("sb_scan: probe failed!\n");
} else
Expand Down
37 changes: 20 additions & 17 deletions modules/fbas/fw/tmessage.c
Original file line number Diff line number Diff line change
Expand Up @@ -99,10 +99,11 @@ void resetItr(timedItr_t* itr, uint64_t now)
* \param itr Read-access iterator that specifies next MPS flag to send
* \param evtId Event ID for timing messages
*
* \ret status
* \ret count Number of sent messages
**/
status_t sendMpsMsgBlock(size_t len, timedItr_t* itr, uint64_t evtId)
uint32_t sendMpsMsgBlock(size_t len, timedItr_t* itr, uint64_t evtId)
{
uint32_t count = 0;
uint32_t res, tef; // temporary variables for bit shifting etc
uint32_t deadlineLo, deadlineHi;
uint32_t idLo, idHi;
Expand Down Expand Up @@ -157,11 +158,10 @@ status_t sendMpsMsgBlock(size_t len, timedItr_t* itr, uint64_t evtId)

// send timing messages
ebm_flush();
++count;
}
else
return COMMON_STATUS_ERROR;

return COMMON_STATUS_OK;
return count;
}

/**
Expand All @@ -172,10 +172,11 @@ status_t sendMpsMsgBlock(size_t len, timedItr_t* itr, uint64_t evtId)
* \param itr Read-access iterator that specifies next MPS message to send
* \param evtid Event ID used to send a timing message
*
* \ret status Zero on success, otherwise non-zero
* \ret count Number of sent messages
**/
status_t sendMpsMsgPeriodic(timedItr_t* itr, uint64_t evtid)
uint32_t sendMpsMsgPeriodic(timedItr_t* itr, uint64_t evtid)
{
uint32_t count = 0;
uint32_t tef = 0;
uint64_t now = getSysTime();
uint64_t deadline = itr->last + itr->period;
Expand All @@ -189,15 +190,14 @@ status_t sendMpsMsgPeriodic(timedItr_t* itr, uint64_t evtid)
memcpy(&param, prot, sizeof(mpsProtocol_t));

// send MPS message with current timestamp, which varies around deadline
fwlib_ebmWriteTM(now, evtid, param, tef, 1);
if (fwlib_ebmWriteTM(now, evtid, param, tef, 1) == COMMON_STATUS_OK)
++count;

// update iterator with deadline
resetItr(itr, now);
}
else
return COMMON_STATUS_ERROR;

return COMMON_STATUS_OK;
return count;
}

/**
Expand All @@ -211,30 +211,33 @@ status_t sendMpsMsgPeriodic(timedItr_t* itr, uint64_t evtid)
* \param evtid Event ID used to send a timing message
* \param extra Number of extra messages
*
* \ret status Zero on success, otherwise non-zero
* \ret count Number of sent messages
**/
status_t sendMpsMsgSpecific(timedItr_t* itr, mpsMsg_t* buf, uint64_t evtid, uint8_t extra)
uint32_t sendMpsMsgSpecific(timedItr_t* itr, mpsMsg_t* buf, uint64_t evtid, uint8_t extra)
{
uint32_t count = 0;
uint32_t tef = 0;
uint64_t now = getSysTime();

if (itr->last >= now) // delayed by a new cycle
return COMMON_STATUS_ERROR;
return count;

uint64_t param;
memcpy(&param, &buf->prot, sizeof(buf->prot));

// send specified MPS event
fwlib_ebmWriteTM(now, evtid, param, tef, 1);
if (fwlib_ebmWriteTM(now, evtid, param, tef, 1) == COMMON_STATUS_OK)
++count;

// NOK flag shall be sent as extra events
if (buf->prot.flag == MPS_FLAG_NOK) {
for (uint8_t i = 0; i < extra; ++i) {
fwlib_ebmWriteTM(now, evtid, param, tef, 1);
if (fwlib_ebmWriteTM(now, evtid, param, tef, 1) == COMMON_STATUS_OK)
++count;
}
}

return COMMON_STATUS_OK;
return count;
}

/**
Expand Down
6 changes: 3 additions & 3 deletions modules/fbas/fw/tmessage.h
Original file line number Diff line number Diff line change
Expand Up @@ -69,9 +69,9 @@ extern timedItr_t rdItr; // read-access iterator for M

void initItr(timedItr_t* itr, uint8_t total, uint64_t now, uint32_t freq);
void resetItr(timedItr_t* itr, uint64_t now);
status_t sendMpsMsgPeriodic(timedItr_t* itr, uint64_t evtid);
status_t sendMpsMsgSpecific(timedItr_t* itr, mpsMsg_t* buf, uint64_t evtid, uint8_t extra);
status_t sendMpsMsgBlock(size_t len, timedItr_t* itr, uint64_t evtId);
uint32_t sendMpsMsgPeriodic(timedItr_t* itr, uint64_t evtid);
uint32_t sendMpsMsgSpecific(timedItr_t* itr, mpsMsg_t* buf, uint64_t evtid, uint8_t extra);
uint32_t sendMpsMsgBlock(size_t len, timedItr_t* itr, uint64_t evtId);
mpsMsg_t* updateMpsMsg(mpsMsg_t* buf, uint64_t evt);
status_t storeMpsMsg(uint64_t raw, uint64_t ts, timedItr_t* itr, int* offset);
mpsMsg_t* evalMpsMsgTtl(uint64_t now, int idx);
Expand Down
4 changes: 2 additions & 2 deletions modules/fbas/include/sb_scan.h
Original file line number Diff line number Diff line change
Expand Up @@ -18,13 +18,13 @@
// base address of standard registers for all slave devices on the SCU bus
#define STD_REG_BASE 0x0000

// standard registers for SCU bus slaves
// standard registers for SCU bus slaves, https://www-acc.gsi.de/wiki/Hardware/Intern/StdRegScuBusSlave
#define SBS_SLAVE_ID 0x01 // slave ID, reserved
#define SBS_FW_VER 0x02 // firmware version, rd
#define SBS_FW_REL 0x03 // firmware release, rd
#define SBS_CID_SYS 0x04 // CID (component ID) system ID, rd
#define SBS_CID_GRP 0x05 // CID group ID, rd
#define SBS_MACRO_VR 0x06 // macro version and release, rd
#define SBS_MACRO_VER 0x06 // macro version and release, rd
#define SBS_EXT_CID_SYS 0x07 // CID system ID of extension card (dead=no extension), rd
#define SBS_EXT_CID_GRP 0x08 // CID group ID of extension card (dead=no extension), rd
#define SBS_CLK_10K 0x09 // macro clock frequency, 10KHz resolution, rd
Expand Down
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