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HidetaroTanaka committed Dec 1, 2023
1 parent 403d4c6 commit 3affdf3
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1 change: 1 addition & 0 deletions src/main/scala/hajime/vectormodules/VectorCpu.scala
Original file line number Diff line number Diff line change
Expand Up @@ -427,6 +427,7 @@ class VectorCpu(implicit params: HajimeCoreParams) extends CpuModule with Scalar
))
Mux(ID_EX_REG.bits.ctrlSignals.decode.branch === Branch.ECALL.asUInt, 0xb.U(params.xprlen.W), 0.U)

// EX_WB_REGに信号自体がvalidかを覚えさせておく
when(vecCtrlUnit.io.resp.valid) {
EX_WB_REG.bits.vectorCsrPorts.get := vecCtrlUnit.io.resp.bits
}
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