Mips64 Timer

[RodionovMaxim05]

• add an implementation of 'setup_timer', 'stop_condition_timer' and 'get_time';
• add 'get_timer', 'start_timer', 'change_period_timer', 'set_reload_mode', 'realese_timer' in timer API.

[IvanArkhipov1999]

Needs documentation for every global constant, struct, struct's field and methods.

[IvanArkhipov1999]

Some warnings

[IvanArkhipov1999]

This is what running the example with a timer for esp32 showed

[IvanArkhipov1999]

Meh

[IvanArkhipov1999]

Such problem with wifi esp32 example:

Exception occurred 'Cp0Disabled (Access to the floating point coprocessor is not allowed. You may want to enable the `float-save-restore` feature of the `xtensa-lx-rt` crate.)'
Context
PC=0x40103c5e       PS=0x00060915
0x40103c5e - ram_rfpll_set_freq
    at /home/cff/gittree/chip7.1_phy/chip_7.1/board_code/app_test/pp/phy/phy_chip_v7_ana.c:427
A0=0x80103ef7       A1=0x3ffeb670       A2=0x00258000       A3=0x000000ff       A4=0x00000000
0x3ffeb670 - esp_wifi::HEAP_DATA
    at ??:??
A5=0x3ffeb6bc       A6=0x02000000       A7=0x80060905       A8=0x80103c5e       A9=0x3ffeb650
0x3ffeb6bc - esp_wifi::HEAP_DATA
    at ??:??
0x3ffeb650 - esp_wifi::HEAP_DATA
    at ??:??
A10=0x4a480000      A11=0x41490000      A12=0x00000000      A13=0x40080000      A14=0x02000000
0x40080000 - _WindowOverflow4
    at /home/ivan/.cargo/registry/src/index.crates.io-6f17d22bba15001f/xtensa-lx-rt-0.17.2/src/exception/context.rs:309
A15=0x80060905
SAR=0000001d
EXCCAUSE=0x00000020 EXCVADDR=0x00000000
LBEG=0x4008b0e4     LEND=0x4008b111     LCOUNT=0x00000000
0x4008b0e4 - i2c_write_master
    at /home/cff/gittree/chip7.1_phy/chip_7.1/board_code/app_test/pp/phy/phy_chip_v7_ana.c:127
0x4008b111 - i2c_write_master
    at /home/cff/gittree/chip7.1_phy/chip_7.1/board_code/app_test/pp/phy/phy_chip_v7_ana.c:127
THREADPTR=0x00000000
SCOMPARE1=0x00000100
BR=0x00000000
ACCLO=0x00000000    ACCHI=0x00000000
M0=0x00000000       M1=0x00000000       M2=0x00000000       M3=0x00000000
F64R_LO=0x00000000  F64R_HI=0x31eb0f83  F64S=0x8ce5ba68
FCR=0x00000000      FSR=0x00258000
F0=0x00000000       F1=0x00000000       F2=0x00258000       F3=0x00000000       F4=0x0012c000
F5=0x00180000       F6=0x000fffff       F7=0x00000000       F8=0x00000400       F9=0x00000000
F10=0x00000008      F11=0x23511327      F12=0xaffc26b3      F13=0x040d41df      F14=0x16afcda9
F15=0x1b0e1e7c
0x40104286
get_rf_freq_init
    at /home/cff/gittree/chip7.1_phy/chip_7.1/board_code/app_test/pp/phy/phy_chip_v7_ana.c:1301
0x40104fef
get_rf_freq_init
    at /home/cff/gittree/chip7.1_phy/chip_7.1/board_code/app_test/pp/phy/phy_chip_v7_ana.c:1276
0x40105100
rf_init
    at /home/cff/gittree/chip7.1_phy/chip_7.1/board_code/app_test/pp/phy/phy_chip_v7_ana.c:1120
0x40100f26
register_chipv7_phy
    at /home/cff/gittree/chip7.1_phy/chip_7.1/board_code/app_test/pp/phy/phy_chip_v7.c:3874
0x400d5bd0
esp_wifi::common_adapter::chip_specific::phy_enable::{{closure}}
    at /home/ivan/.cargo/registry/src/index.crates.io-6f17d22bba15001f/esp-wifi-0.9.1/src/common_adapter/common_adapter_esp32.rs:68
0x400d3b88
esp_wifi::wifi::os_adapter::phy_enable
    at /home/ivan/.cargo/registry/src/index.crates.io-6f17d22bba15001f/esp-wifi-0.9.1/src/wifi/os_adapter.rs:1007
0x400e9925
wifi_hw_start
    at ??:??
0x400ea129
wifi_start_process
    at ??:??
0x400e8b0d
ieee80211_ioctl_process
    at ??:??
0x40083b80
ppTask
    at ??:??

[IvanArkhipov1999]

Meh

Upd: I realized that the board has not enough memory in the heap. Make it 64 here instead of 32 please.