cpu/io-access-bitwidth

JaCzekanski · Apr 11, 2021 · bdf4ee3 · bdf4ee3
1 parent 01d603f
commit bdf4ee3
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diff --git a/Makefile b/Makefile
@@ -9,6 +9,7 @@ IMAGES = common \
 		cpu/access-time \
 		cpu/code-in-io \
 		cpu/cop \
+		cpu/io-access-bitwidth \
 		dma/chain-looping \
 		dma/chopping \
 		dma/dpcr \

diff --git a/README.md b/README.md
@@ -23,6 +23,7 @@ Name                     | Description
 access-time              | Test CPU access time to different parts of memory map
 code-in-io               | Check whether code execution from Scratchpad as various IO ports is possible 
 cop                      | Check how CPU behave when accessing missing/disabled coprocessors
+io-access-bitwidth       | Test how writes with different bitwidths behaves for different io devices
 
 ### DMA
 

diff --git a/cpu/io-access-bitwidth/Makefile b/cpu/io-access-bitwidth/Makefile
@@ -0,0 +1,3 @@
+TARGET = io-access-bitwidth.elf
+
+include ../../common-test.mk
diff --git a/cpu/io-access-bitwidth/asm.h b/cpu/io-access-bitwidth/asm.h
@@ -0,0 +1,14 @@
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void asm_write_32(uint32_t address, uint32_t data);
+void asm_write_16(uint32_t address, uint32_t data);
+void asm_write_8(uint32_t address, uint32_t data);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/cpu/io-access-bitwidth/asm.s b/cpu/io-access-bitwidth/asm.s
@@ -0,0 +1,26 @@
+#include <asm.h>
+#include <inline_s.h>
+
+.text
+
+.globl asm_write_32
+asm_write_32:
+    sw $a1, 0($a0)
+
+    jr $ra
+    nop
+
+.globl asm_write_16
+asm_write_16:
+    sh $a1, 0($a0)
+
+    jr $ra
+    nop
+
+.globl asm_write_8
+asm_write_8:
+    sb $a1, 0($a0)
+
+    jr $ra
+    nop
+
diff --git a/cpu/io-access-bitwidth/main.cpp b/cpu/io-access-bitwidth/main.cpp
@@ -0,0 +1,121 @@
+#include <common.h>
+#include <psxapi.h>
+#include <io.h>
+#include <exception.hpp>
+#include "asm.h"
+
+template <typename T, uint32_t address>
+void writeTo(const char* memoryType) {
+    auto logValue = [](uint32_t value){
+        if (wasExceptionThrown()) {
+            printf("%-10s    ", "--CRASH--");
+        } else {
+            printf("%#10x    ", value);
+        }
+    };
+
+    printf("%-10s (0x%08x)   ", memoryType, address);
+
+    uint32_t value = 0x12345678;
+
+    T preservedValue = *((volatile T*)address);
+
+    if constexpr (sizeof(T) >= 1) {
+        *((volatile T*)address) = 0;
+        asm_write_8(address, value);
+        uint32_t result8 = *((volatile T*)address);
+        logValue(result8);
+    }
+
+    if constexpr (sizeof(T) >= 2) {                
+        *((volatile T*)address) = 0;
+        asm_write_16(address, value);
+        uint32_t result16 = *((volatile T*)address);
+        logValue(result16);
+    }
+
+    if constexpr (sizeof(T) >= 4) {
+        *((volatile T*)address) = 0;
+        asm_write_32(address, value);
+        uint32_t result32 = *((volatile T*)address);
+        logValue(result32);
+    }
+
+    *((volatile T*)address) = preservedValue;
+    printf("\n");
+}
+
+template <typename T>
+void runTests() {
+    printf("\nReading as %dbit, writing as:\n", sizeof(T)*8);
+    printf("SEGMENT    (   ADDRESS)   ");
+    if constexpr (sizeof(T) >= 1) printf("8bit          ");
+    if constexpr (sizeof(T) >= 2) printf("16bit         ");
+    if constexpr (sizeof(T) >= 4) printf("32bit         ");
+    printf("\n");
+
+    write32(0x1f801020, 0x00001325); // COM_DELAY
+
+    writeTo<T, 0x80080000>("RAM");
+    writeTo<T, 0xBFC00000>("BIOS"); // RO
+    writeTo<T, 0x1F800000>("SCRATCHPAD");
+
+    // write32(0x1F801000, 0x1F000000); // Exp1 base
+    // write32(0x1F801008, 0x0013243F); // Exp1 Delay/Size
+    // writeTo<T, 0x1F000000>("EXPANSION1"); // Stalls the console ¯\_(ツ)_/¯
+
+    write32(0x1F801004, 0x1F802000); // Exp2 base
+    write32(0x1F80101C, 0x00070777); // Exp2 Delay/Size
+    writeTo<T, 0x1F802000>("EXPANSION2");
+
+    write32(0x1F80100C, 0x00003022); // Exp3 Delay/Size
+    writeTo<T, 0x1FA00000>("EXPANSION3");
+
+    writeTo<T, 0x1F801080>("DMA0_ADDR");
+    writeTo<T, 0x1F8010F0>("DMAC_CTRL");
+    writeTo<T, 0x1F8010F4>("DMAC_INTR");
+
+    writeTo<T, 0x1F801048>("JOY_MODE"); // Crash on 32bit
+    writeTo<T, 0x1F80104A>("JOY_CTRL");
+    writeTo<T, 0x1F801058>("SIO_MODE"); // Crash on 32bit
+    writeTo<T, 0x1F80105A>("SIO_CTRL");
+
+    // writeTo<T, 0x1F801060>("RAM_SIZE"); // Stalls the console
+    writeTo<T, 0x1F801074>("I_MASK");
+    writeTo<T, 0x1F801108>("T0_TARGET");
+
+    write32(0x1f801018, 0x00020943); // CDROM Delay/Size
+    writeTo<T, 0x1F801800>("CDROM_STAT");
+    writeTo<T, 0x1F801814>("GPUSTAT");
+    writeTo<T, 0x1F801824>("MDECSTAT");
+
+    write32(0x1F801014, 0x220931E1); // SPU Delay/Size
+    writeTo<T, 0x1F801DAA>("SPUCNT"); // Crash on 32bit
+
+    // writeTo<T, 0xFFFE0130>("CACHECTRL"); // Stalls the console
+}
+
+int main() {
+    initVideo(320, 240);
+    clearScreen();
+    printf("\ncpu/io-access-bitwidth\n");
+    printf("Test how writes with different bitwidths behaves for different io devices\n");
+    printf("Note: Disable \"Exception Handling Surveillance\" in Caetla first\"\n");
+
+    EnterCriticalSection();
+    hookUnresolvedExceptionHandler(exceptionHandler);
+    wasExceptionThrown(); // Clear flag
+
+    runTests<uint32_t>();
+    runTests<uint16_t>();
+    runTests<uint8_t>();
+    printf("Done.\n");
+
+    ExitCriticalSection();
+
+    for (;;) {
+        VSync(false);
+    }
+
+    return 0;
+}
diff --git a/cpu/io-access-bitwidth/psx.log b/cpu/io-access-bitwidth/psx.log
@@ -0,0 +1,67 @@
+cpu/io-access-bitwidth
+Test how writes with different bitwidths behaves for different io devices
+Note: Disable "Exception Handling Surveillance" in Caetla first"
+
+Reading as 32bit, writing as:
+SEGMENT    (   ADDRESS)   8bit          16bit         32bit         
+RAM        (0x80080000)         0x78        0x5678    0x12345678    
+BIOS       (0xbfc00000)   0x3c080013    0x3c080013    0x3c080013    
+SCRATCHPAD (0x1f800000)         0x78        0x5678    0x12345678    
+EXPANSION2 (0x1f802000)   0xffffffff    0xffffffff    0xffffffff    
+EXPANSION3 (0x1fa00000)   0xff785678    0xff785678    0xff341234    
+DMA0_ADDR  (0x1f801080)     0x345678      0x345678      0x345678    
+DMAC_CTRL  (0x1f8010f0)   0x12345678    0x12345678    0x12345678    
+DMAC_INTR  (0x1f8010f4)     0x340038      0x340038      0x340038    
+JOY_MODE   (0x1f801048)         0x38          0x38          0x38    
+JOY_CTRL   (0x1f80104a)            0             0    --CRASH--     
+SIO_MODE   (0x1f801058)         0x78          0x78          0x78    
+SIO_CTRL   (0x1f80105a)   0xc0c00000    0xc0c00000    --CRASH--     
+I_MASK     (0x1f801074)   0x12340678    0x12340678    0x12340678    
+T0_TARGET  (0x1f801108)   0x12345678    0x12345678    0x3c045678    
+CDROM_STAT (0x1f801800)   0x18181818    0x1a1a1a1a    0x1a1a1a1a    
+GPUSTAT    (0x1f801814)   0x14802000    0x14802000    0x14802000    
+MDECSTAT   (0x1f801824)   0x80040000    0x80040000    0x80040000    
+SPUCNT     (0x1f801daa)       0x5678        0x5678    --CRASH--     
+
+Reading as 16bit, writing as:
+SEGMENT    (   ADDRESS)   8bit          16bit         
+RAM        (0x80080000)         0x78        0x5678    
+BIOS       (0xbfc00000)         0x13          0x13    
+SCRATCHPAD (0x1f800000)         0x78        0x5678    
+EXPANSION2 (0x1f802000)       0xffff        0xffff    
+EXPANSION3 (0x1fa00000)       0xff78        0x7f78    
+DMA0_ADDR  (0x1f801080)       0x5678        0x5678    
+DMAC_CTRL  (0x1f8010f0)       0x5678        0x5678    
+DMAC_INTR  (0x1f8010f4)         0x38          0x38    
+JOY_MODE   (0x1f801048)         0x38          0x38    
+JOY_CTRL   (0x1f80104a)            0             0    
+SIO_MODE   (0x1f801058)         0x78          0x78    
+SIO_CTRL   (0x1f80105a)            0             0    
+I_MASK     (0x1f801074)        0x678         0x678    
+T0_TARGET  (0x1f801108)       0x5678        0x5678    
+CDROM_STAT (0x1f801800)       0x1818        0x1a1a    
+GPUSTAT    (0x1f801814)       0x2000        0x2000    
+MDECSTAT   (0x1f801824)            0             0    
+SPUCNT     (0x1f801daa)       0x5678        0x5678    
+
+Reading as 8bit, writing as:
+SEGMENT    (   ADDRESS)   8bit          
+RAM        (0x80080000)         0x78    
+BIOS       (0xbfc00000)         0x13    
+SCRATCHPAD (0x1f800000)         0x78    
+EXPANSION2 (0x1f802000)         0xff    
+EXPANSION3 (0x1fa00000)         0x78    
+DMA0_ADDR  (0x1f801080)         0x78    
+DMAC_CTRL  (0x1f8010f0)         0x78    
+DMAC_INTR  (0x1f8010f4)         0x38    
+JOY_MODE   (0x1f801048)         0x38    
+JOY_CTRL   (0x1f80104a)            0    
+SIO_MODE   (0x1f801058)         0x78    
+SIO_CTRL   (0x1f80105a)            0    
+I_MASK     (0x1f801074)         0x78    
+T0_TARGET  (0x1f801108)         0x78    
+CDROM_STAT (0x1f801800)         0x18    
+GPUSTAT    (0x1f801814)            0    
+MDECSTAT   (0x1f801824)            0    
+SPUCNT     (0x1f801daa)         0x78    
+Done.