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Jzjerry/readme.md

Hi, I'm JIANG (Jerry) Zijun

Click here to learn more about me!

✨Fancy Stuffs✨

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Code Time

Profile Views

I'm an Early 🐤

🌞 Morning                68 commits          █░░░░░░░░░░░░░░░░░░░░░░░░   04.90 % 
🌆 Daytime                729 commits         █████████████░░░░░░░░░░░░   52.52 % 
🌃 Evening                512 commits         █████████░░░░░░░░░░░░░░░░   36.89 % 
🌙 Night                  79 commits          █░░░░░░░░░░░░░░░░░░░░░░░░   05.69 % 

📅 I'm Most Productive on Monday

Monday                   278 commits         █████░░░░░░░░░░░░░░░░░░░░   20.03 % 
Tuesday                  261 commits         █████░░░░░░░░░░░░░░░░░░░░   18.80 % 
Wednesday                213 commits         ████░░░░░░░░░░░░░░░░░░░░░   15.35 % 
Thursday                 225 commits         ████░░░░░░░░░░░░░░░░░░░░░   16.21 % 
Friday                   215 commits         ████░░░░░░░░░░░░░░░░░░░░░   15.49 % 
Saturday                 97 commits          ██░░░░░░░░░░░░░░░░░░░░░░░   06.99 % 
Sunday                   99 commits          ██░░░░░░░░░░░░░░░░░░░░░░░   07.13 % 

📊 This Week I Spent My Time On

🕑︎ Time Zone: Asia/Shanghai

💬 Programming Languages: 
Scala                    1 hr 43 mins        ███████████░░░░░░░░░░░░░░   43.47 % 
Python                   53 mins             ██████░░░░░░░░░░░░░░░░░░░   22.38 % 
Tcl                      43 mins             █████░░░░░░░░░░░░░░░░░░░░   18.23 % 
JSON                     19 mins             ██░░░░░░░░░░░░░░░░░░░░░░░   08.08 % 
Makefile                 10 mins             █░░░░░░░░░░░░░░░░░░░░░░░░   04.35 % 

🔥 Editors: 
VS Code                  3 hrs 57 mins       █████████████████████████   100.00 % 

💻 Operating System: 
Linux                    3 hrs 35 mins       ███████████████████████░░   90.81 % 
WSL                      21 mins             ██░░░░░░░░░░░░░░░░░░░░░░░   09.19 % 

I Mostly Code in Python

Python                   12 repos            ███████░░░░░░░░░░░░░░░░░░   26.09 % 
C                        9 repos             █████░░░░░░░░░░░░░░░░░░░░   19.57 % 
Scala                    8 repos             ████░░░░░░░░░░░░░░░░░░░░░   17.39 % 
C++                      7 repos             ████░░░░░░░░░░░░░░░░░░░░░   15.22 % 
Verilog                  6 repos             ███░░░░░░░░░░░░░░░░░░░░░░   13.04 % 

Last Updated on 23/01/2025 18:42:28 UTC

Pinned Loading

  1. HKUSTGZ-MICS-LYU/SPaDE-VexRiscv HKUSTGZ-MICS-LYU/SPaDE-VexRiscv Public

    SPaDE for VexRiscv

    Python 7

  2. Jzjerry.github.io Jzjerry.github.io Public

    HTML 2

  3. VexRiscv VexRiscv Public

    Forked from SpinalHDL/VexRiscv

    A FPGA friendly 32 bit RISC-V CPU implementation

    Assembly 1

  4. VexiiRiscv VexiiRiscv Public

    Forked from SpinalHDL/VexiiRiscv

    Scala

  5. NodeMCU_LCD NodeMCU_LCD Public

    A simple monitor for Bilibili livers based on ESP8266 & TFT_eSPI

    C++ 2