hw-mgmt: patches: Initial commit for v6.1

Add patches to support kerenl v6.1 (rebased on top of v6.1.42).

Signed-off-by: Vadim Pasternak <[email protected]>

recipes-kernel/linux/linux-6.1/0002-platform-mellanox-Change-reset_pwr_converter_fail-at.patch

@@ -0,0 +1,38 @@
+From c93a5081438b02b5ec4d3fd1fde8e6bf383a2996 Mon Sep 17 00:00:00 2001
+From: Vadim Pasternak <[email protected]>
+Date: Wed, 8 Feb 2023 08:33:19 +0200
+Subject: [PATCH backport 6.1.42 02/85] platform: mellanox: Change
+ "reset_pwr_converter_fail" attribute
+
+Change "reset_voltmon_upgrade_fail" attribute name to
+"reset_pwr_converter_fail".
+
+For systems using "mlxplat_mlxcpld_default_ng_regs_io_data", relevant
+CPLD 'register.bit' indicates the failure of power converter, while on
+older systems same 'register.bit' indicates failure of voltage monitor
+devices upgrade failure.
+
+Signed-off-by: Vadim Pasternak <[email protected]>
+Reviewed-by: Michael Shych <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
+Signed-off-by: Hans de Goede <[email protected]>
+---
+ drivers/platform/x86/mlx-platform.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
+index 3e4adeb20a7e..c53eca49c47f 100644
+--- a/drivers/platform/x86/mlx-platform.c
++++ b/drivers/platform/x86/mlx-platform.c
+@@ -3186,7 +3186,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
+ 		.mode = 0444,
+ 	},
+ 	{
+-		.label = "reset_voltmon_upgrade_fail",
++		.label = "reset_pwr_converter_fail",
+ 		.reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,
+ 		.mask = GENMASK(7, 0) & ~BIT(0),
+ 		.mode = 0444,
+-- 
+2.20.1
+

recipes-kernel/linux/linux-6.1/0003-platform-mellanox-Cosmetic-changes-rename-to-more-co.patch

@@ -0,0 +1,117 @@
+From db6f384dac123c41fce3169bc9961f304086e4cd Mon Sep 17 00:00:00 2001
+From: Vadim Pasternak <[email protected]>
+Date: Wed, 8 Feb 2023 08:33:20 +0200
+Subject: [PATCH backport 6.1.42 03/85] platform: mellanox: Cosmetic changes -
+ rename to more common name
+
+Rename 'nvlink_blade' in several declaration to more common name
+"chassis_blade", since these names are going to be used for different
+kinds of blades.
+
+Fix 'swicth' to 'switch' in comment.
+
+Signed-off-by: Vadim Pasternak <[email protected]>
+Reviewed-by: Michael Shych <[email protected]>
+Link: https://lore.kernel.org/r/[email protected]
+Signed-off-by: Hans de Goede <[email protected]>
+---
+ drivers/platform/x86/mlx-platform.c | 28 ++++++++++++++--------------
+ 1 file changed, 14 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
+index c53eca49c47f..e629ec8a2a2f 100644
+--- a/drivers/platform/x86/mlx-platform.c
++++ b/drivers/platform/x86/mlx-platform.c
+@@ -473,7 +473,7 @@ static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = {
+ 	},
+ };
+
+-/* Platform channels for rack swicth system family */
++/* Platform channels for rack switch system family */
+ static const int mlxplat_rack_switch_channels[] = {
+ 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
+ };
+@@ -2085,7 +2085,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_global_wp_items_data[] = {
+ 	},
+ };
+
+-static struct mlxreg_core_item mlxplat_mlxcpld_nvlink_blade_items[] = {
++static struct mlxreg_core_item mlxplat_mlxcpld_chassis_blade_items[] = {
+ 	{
+ 		.data = mlxplat_mlxcpld_global_wp_items_data,
+ 		.aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
+@@ -2098,9 +2098,9 @@ static struct mlxreg_core_item mlxplat_mlxcpld_nvlink_blade_items[] = {
+ };
+
+ static
+-struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_nvlink_blade_data = {
+-	.items = mlxplat_mlxcpld_nvlink_blade_items,
+-	.counter = ARRAY_SIZE(mlxplat_mlxcpld_nvlink_blade_items),
++struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_chassis_blade_data = {
++	.items = mlxplat_mlxcpld_chassis_blade_items,
++	.counter = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_items),
+ 	.cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET,
+ 	.mask = MLXPLAT_CPLD_AGGR_MASK_COMEX,
+ 	.cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET,
+@@ -3848,8 +3848,8 @@ static struct mlxreg_core_platform_data mlxplat_modular_regs_io_data = {
+ 		.counter = ARRAY_SIZE(mlxplat_mlxcpld_modular_regs_io_data),
+ };
+
+-/* Platform register access for NVLink blade systems family data  */
+-static struct mlxreg_core_data mlxplat_mlxcpld_nvlink_blade_regs_io_data[] = {
++/* Platform register access for chassis blade systems family data  */
++static struct mlxreg_core_data mlxplat_mlxcpld_chassis_blade_regs_io_data[] = {
+ 	{
+ 		.label = "cpld1_version",
+ 		.reg = MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET,
+@@ -4046,9 +4046,9 @@ static struct mlxreg_core_data mlxplat_mlxcpld_nvlink_blade_regs_io_data[] = {
+ 	},
+ };
+
+-static struct mlxreg_core_platform_data mlxplat_nvlink_blade_regs_io_data = {
+-		.data = mlxplat_mlxcpld_nvlink_blade_regs_io_data,
+-		.counter = ARRAY_SIZE(mlxplat_mlxcpld_nvlink_blade_regs_io_data),
++static struct mlxreg_core_platform_data mlxplat_chassis_blade_regs_io_data = {
++		.data = mlxplat_mlxcpld_chassis_blade_regs_io_data,
++		.counter = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_regs_io_data),
+ };
+
+ /* Platform FAN default */
+@@ -5168,14 +5168,14 @@ static int __init mlxplat_dmi_modular_matched(const struct dmi_system_id *dmi)
+ 	return 1;
+ }
+
+-static int __init mlxplat_dmi_nvlink_blade_matched(const struct dmi_system_id *dmi)
++static int __init mlxplat_dmi_chassis_blade_matched(const struct dmi_system_id *dmi)
+ {
+ 	int i;
+
+ 	mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM;
+ 	mlxplat_mux_num = ARRAY_SIZE(mlxplat_default_mux_data);
+ 	mlxplat_mux_data = mlxplat_default_mux_data;
+-	mlxplat_hotplug = &mlxplat_mlxcpld_nvlink_blade_data;
++	mlxplat_hotplug = &mlxplat_mlxcpld_chassis_blade_data;
+ 	mlxplat_hotplug->deferred_nr =
+ 		mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
+ 	for (i = 0; i < mlxplat_mux_num; i++) {
+@@ -5183,7 +5183,7 @@ static int __init mlxplat_dmi_nvlink_blade_matched(const struct dmi_system_id *d
+ 		mlxplat_mux_data[i].n_values =
+ 				ARRAY_SIZE(mlxplat_msn21xx_channels);
+ 	}
+-	mlxplat_regs_io = &mlxplat_nvlink_blade_regs_io_data;
++	mlxplat_regs_io = &mlxplat_chassis_blade_regs_io_data;
+ 	mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data;
+ 	mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng400;
+
+@@ -5288,7 +5288,7 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
+ 		},
+ 	},
+ 	{
+-		.callback = mlxplat_dmi_nvlink_blade_matched,
++		.callback = mlxplat_dmi_chassis_blade_matched,
+ 		.matches = {
+ 			DMI_MATCH(DMI_BOARD_NAME, "VMOD0015"),
+ 		},
+-- 
+2.20.1
+