Small modifications for ASIC synthesis #43

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Run time

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Job	Run time
tc-isa-sim	14m 44s
check-license	31s
tc-gcc	1h 9m 7s
check-trailing-whitespaces	10s
tc-llvm	2h 26m 38s
tc-verilator	8m 44s
compile-ara (2_lanes)	54s
compile-ara (4_lanes)	58s
compile-ara (8_lanes)	42s
compile-ara (16_lanes)	39s
check-clang-format	1m 25s
compile-riscv-tests (2_lanes)	2m 49s
compile-apps (2_lanes)	1m 10s
compile-riscv-tests (4_lanes)	3m 25s
compile-riscv-tests (8_lanes)	4m 31s
compile-apps (4_lanes)	1m 16s
compile-riscv-tests (16_lanes)	3m 11s
compile-apps (8_lanes)	1m 6s
compile-apps (16_lanes)	1m 9s
benchmark	0s
simulate	0s
roofline	0s
riscv-tests-spike	2m 15s
riscv-tests-simv	0s
clean-up	4s
clean-up-compile-runs (2_lanes)	6s
clean-up-compile-runs (4_lanes)	7s
clean-up-compile-runs (8_lanes)	4s
clean-up-compile-runs (16_lanes)	7s
	4h 25m 52s