[FPGA] Some latch fixes

PolyMTL-Gr2m · Jan 31, 2024 · 94eddcd · 94eddcd
1 parent 10e2343
commit 94eddcd
Showing 1 changed file with 6 additions and 0 deletions.
diff --git a/hardware/src/lane/simd_mul.sv b/hardware/src/lane/simd_mul.sv
@@ -204,6 +204,8 @@ module simd_mul import ara_pkg::*; import rvv_pkg::*; #(
     end: gen_mul
 
     always_comb begin : p_mul
+      // Default assignment
+      result_o = '0;
       r = '0;
       unique case (op)
         // Single-Width integer multiply instructions
@@ -242,6 +244,8 @@ module simd_mul import ara_pkg::*; import rvv_pkg::*; #(
     end : gen_mul
 
     always_comb begin : p_mul
+      // Default assignment
+      result_o = '0;
       r = '0;
       unique case (op)
         // Single-Width integer multiply instructions
@@ -282,6 +286,8 @@ module simd_mul import ara_pkg::*; import rvv_pkg::*; #(
     end : gen_mul
 
     always_comb begin : p_mul
+      // Default assignment
+      result_o = '0;
       r = '0;
       unique case (op)
         // Single-Width integer multiply instructions