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cpu/cc2538: mask length byte before checking CRC [backport 2024.10] #21038

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merged 1 commit into from
Nov 26, 2024
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cpu/cc2538: mask length byte before checking CRC [backport 2024.10] #21038

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1 change: 1 addition & 0 deletions cpu/cc2538/include/cc2538_rf.h
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Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,7 @@
#define CC2538_AUTOCRC_LEN (2)
#define CC2538_RF_FIFO_SIZE (128)
#define CC2538_PACKET_LENGTH_SIZE (1)
#define CC2538_LENGTH_BYTE_MASK (0x7F) /**< Mask for the length byte in the packet */

#define CC2538_RF_MAX_DATA_LEN (CC2538_RF_FIFO_SIZE - CC2538_PACKET_LENGTH_SIZE)

Expand All @@ -51,14 +52,14 @@

#define IEEE802154_CHANNEL_SPACING (5) /**< Channel spacing in MHz */

#define IEEE802154_CHAN2FREQ(chan) ( IEEE802154_MIN_FREQ + ((chan) - IEEE802154_CHANNEL_MIN) * IEEE802154_CHANNEL_SPACING )

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#define IEEE802154_FREQ2CHAN(freq) ( IEEE802154_CHANNEL_MIN + ((freq) - IEEE802154_MIN_FREQ) / IEEE802154_CHANNEL_SPACING )

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/* /TODO */

#define CC2538_MIN_FREQ (2394)
#define CC2538_MAX_FREQ (2507)

#define CC2538_RF_POWER_DEFAULT (CONFIG_IEEE802154_DEFAULT_TXPOWER) /**< Default output power in dBm */

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#define CC2538_RF_CHANNEL_DEFAULT (CONFIG_IEEE802154_DEFAULT_CHANNEL)

#define OUTPUT_POWER_MIN (-24) /**< Min output power in dBm */
Expand Down Expand Up @@ -92,7 +93,7 @@

#define CC2538_CSP_MCU_CTRL_MASK (0x1) /**< MCU Ctrl mask */

#define CC2538_CSP_INCMAXY_MAX_MASK (0x7) /**< CSP INCMAXY instruction (increment Register CSPX

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without exceeding CSPY) */

#define CC2538_RXENABLE_RXON_MASK (0x80) /**< RX on mask */
Expand All @@ -119,7 +120,7 @@
thread_yield(); \
}
#else
#define RFCORE_WAIT_UNTIL(expr) while (!(expr)) thread_yield()

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full block {} expected in the control structure
#endif

#define RFCORE_FLUSH_RECEIVE_FIFO() rfcore_strobe(ISFLUSHRX)
Expand Down
6 changes: 4 additions & 2 deletions cpu/cc2538/radio/cc2538_rf_radio_ops.c
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Expand Up @@ -154,7 +154,7 @@
RFCORE_XREG_CSPY = cc2538_min_be; /* Holds MinBE */

assert(cc2538_csma_ca_retries >= 0);
RFCORE_XREG_CSPZ = cc2538_csma_ca_retries + 1; /* Holds CSMA-CA attempts (retries + 1) */

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RFCORE_XREG_CSPCTRL &= ~CC2538_CSP_MCU_CTRL_MASK;

Expand Down Expand Up @@ -391,7 +391,7 @@

if ((flags_f0 & SFD)) {
handled_f0 |= SFD;
switch(cc2538_state) {

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case CC2538_STATE_READY:
cc2538_rf_hal->cb(cc2538_rf_hal, IEEE802154_RADIO_INDICATION_RX_START);
break;
Expand All @@ -412,8 +412,10 @@

if (flags_f0 & RXPKTDONE) {
handled_f0 |= RXPKTDONE;
/* CRC check */
uint8_t pkt_len = rfcore_peek_rx_fifo(0);
/* CRC_OK bit is located in the last byte of the packet.
* The radio masks the length byte before filling the FIFO with the
* corresponding number of bytes. */
uint8_t pkt_len = (rfcore_peek_rx_fifo(0) & CC2538_LENGTH_BYTE_MASK);
if (rfcore_peek_rx_fifo(pkt_len) & CC2538_CRC_BIT_MASK) {
/* Disable RX while the frame has not been processed */
_disable_rx();
Expand Down Expand Up @@ -485,7 +487,7 @@
const network_uint16_t *short_addr = value;
const eui64_t *ext_addr = value;
const uint16_t *pan_id = value;
switch(cmd) {

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case IEEE802154_AF_SHORT_ADDR:
RFCORE_FFSM_SHORT_ADDR0 = short_addr->u8[1];
RFCORE_FFSM_SHORT_ADDR1 = short_addr->u8[0];
Expand All @@ -511,10 +513,10 @@
return 0;
}

static int _config_src_addr_match(ieee802154_dev_t *dev, ieee802154_src_match_t cmd, const void *value)

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{
(void) dev;
switch(cmd) {

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case IEEE802154_SRC_MATCH_EN:
RFCORE_XREG_FRMCTRL1 &= ~CC2538_FRMCTRL1_PENDING_OR_MASK;
if (*((const bool*) value) == true) {
Expand Down
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