Added `bias` term to `attenOp` for rocMLIR #2777

ravil-mobile · 2024-02-15T11:45:57Z

This PR adds the bias term to the AttentionOp. The term is optional.

codecov · 2024-02-15T11:53:10Z

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All modified and coverable lines are covered by tests ✅

Project coverage is 91.84%. Comparing base (610d85c) to head (5034d6e).

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##           develop    #2777   +/-   ##
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migraphx-bot · 2024-02-15T13:47:25Z

Test	Batch	Rate new 5034d6	Rate old 610d85	Diff	Compare
torchvision-resnet50	64	2,858.15	2,861.47	-0.12%	✅
torchvision-resnet50_fp16	64	6,595.58	6,593.97	0.02%	✅
torchvision-densenet121	32	2,091.12	2,092.95	-0.09%	✅
torchvision-densenet121_fp16	32	3,701.39	3,699.54	0.05%	✅
torchvision-inceptionv3	32	1,603.50	1,602.28	0.08%	✅
torchvision-inceptionv3_fp16	32	2,572.76	2,572.95	-0.01%	✅
cadene-inceptionv4	16	726.99	726.83	0.02%	✅
cadene-resnext64x4	16	682.38	682.44	-0.01%	✅
slim-mobilenet	64	5,942.93	5,942.49	0.01%	✅
slim-nasnetalarge	64	153.88	153.95	-0.05%	✅
slim-resnet50v2	64	2,662.40	2,661.00	0.05%	✅
bert-mrpc-onnx	8	917.14	917.12	0.00%	✅
bert-mrpc-tf	1	434.64	434.33	0.07%	✅
pytorch-examples-wlang-gru	1	424.53	420.25	1.02%	✅
pytorch-examples-wlang-lstm	1	389.15	385.11	1.05%	✅
torchvision-resnet50_1	1	602.59	609.76	-1.18%	✅
cadene-dpn92_1	1	392.79	392.77	0.01%	✅
cadene-resnext101_1	1	332.05	332.05	0.00%	✅
onnx-taau-downsample	1	305.39	305.67	-0.09%	✅
dlrm-criteoterabyte	1	28.74	28.75	-0.05%	✅
dlrm-criteoterabyte_fp16	1	49.62	49.56	0.11%	✅
agentmodel	1	7,652.51	7,469.21	2.45%	✅
unet_fp16	2	57.61	57.60	0.02%	✅
resnet50v1_fp16	1	898.00	900.46	-0.27%	✅
resnet50v1_int8	1	819.73	821.48	-0.21%	✅
bert_base_cased_fp16	64	1,055.27	1,054.93	0.03%	✅
bert_large_uncased_fp16	32	311.81	311.78	0.01%	✅
bert_large_fp16	1	159.35	159.27	0.05%	✅
distilgpt2_fp16	16	1,858.53	1,855.89	0.14%	✅
yolov5s	1	477.63	473.80	0.81%	✅
tinyllama	1	32.83	32.84	-0.03%	✅
vicuna-fastchat	1	160.68	158.48	1.39%	✅
whisper-tiny-encoder	1	348.44	347.61	0.24%	✅
whisper-tiny-decoder	1	398.71	402.41	-0.92%	✅

This build is OK for merge ✅

migraphx-bot · 2024-02-15T13:47:26Z

✅ bert-mrpc-onnx: PASSED: MIGraphX meets tolerance

✅ bert-mrpc-tf: PASSED: MIGraphX meets tolerance

✅ pytorch-examples-wlang-gru: PASSED: MIGraphX meets tolerance

✅ pytorch-examples-wlang-lstm: PASSED: MIGraphX meets tolerance

✅ torchvision-resnet50_1: PASSED: MIGraphX meets tolerance

✅ cadene-dpn92_1: PASSED: MIGraphX meets tolerance

✅ cadene-resnext101_1: PASSED: MIGraphX meets tolerance

✅ dlrm-criteoterabyte: PASSED: MIGraphX meets tolerance

✅ agentmodel: PASSED: MIGraphX meets tolerance

✅ unet: PASSED: MIGraphX meets tolerance

✅ resnet50v1: PASSED: MIGraphX meets tolerance

✅ bert_base_cased_fp16: PASSED: MIGraphX meets tolerance

🔴bert_large_uncased_fp16: FAILED: MIGraphX is not within tolerance - check verbose output

✅ bert_large: PASSED: MIGraphX meets tolerance

✅ yolov5s: PASSED: MIGraphX meets tolerance

✅ tinyllama: PASSED: MIGraphX meets tolerance

✅ vicuna-fastchat: PASSED: MIGraphX meets tolerance

✅ whisper-tiny-encoder: PASSED: MIGraphX meets tolerance

✅ whisper-tiny-decoder: PASSED: MIGraphX meets tolerance

✅ distilgpt2_fp16: PASSED: MIGraphX meets tolerance

ravil-mobile · 2024-02-16T11:03:28Z

Hi @pfultz2, could you, please, review the PR.

ravil-mobile · 2024-02-16T17:17:23Z

Hi @pfultz2

I have a problem with one test that checks the AttenOp with bias.

Here is the way how I execute the test (i.e., AttenOp + bias)

MIGRAPHX_MLIR_USE_SPECIFIC_OPS="attention" MIGRAPHX_TRACE_MLIR=1 ./bin/test_verify "gemm_softmax_gemm_relu<true>"

which leads to the following:

mlir_0:z = @param:z -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
mlir_0:bias = @param:bias -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
mlir_0:@2 = @literal{0.125} -> half_type, {1}, {0}, target_id=0
mlir_0:y1 = @param:y1 -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
mlir_0:y0 = @param:y0 -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
mlir_0:@5 = transpose[permutation={0, 1, 3, 2}](mlir_0:y1) -> half_type, {1, 12, 256, 256}, {786432, 65536, 1, 256}, target_id=0
mlir_0:@6 = contiguous(mlir_0:@5) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
mlir_0:@7 = dot(mlir_0:y0,mlir_0:@6) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
mlir_0:@8 = multibroadcast[out_lens={1, 12, 256, 256},out_dyn_dims={}](mlir_0:@2) -> half_type, {1, 12, 256, 256}, {0, 0, 0, 0}, target_id=0
mlir_0:@9 = mul(mlir_0:@7,mlir_0:@8) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
mlir_0:@10 = add(mlir_0:@9,mlir_0:bias) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
mlir_0:@11 = softmax[axis=3](mlir_0:@10) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
mlir_0:@12 = dot(mlir_0:@11,mlir_0:z) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
mlir_0:@13 = relu(mlir_0:@12) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
mlir_0:@14 = @return(mlir_0:@13), target_id=0

module {
  func.func @mlir_transpose_dot_mul_add_softmax_dot_relu(%arg0: !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1>, %arg1: !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1>, %arg2: !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1>, %arg3: !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1>) -> !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1> attributes {arch = "gfx90a:sramecc+:xnack-", kernel = "mixr", num_cu = 110 : i64} {
    %0 = migraphx.literal(dense<1.250000e-01> : tensor<1xf16>) : <1xf16, 0>
    %1 = migraphx.transpose %arg2 {permutation = [0, 1, 3, 2]} : <1x12x256x256xf16, 786432x65536x256x1> -> <1x12x256x256xf16, 786432x65536x1x256>
    %2 = migraphx.dot %arg1, %1 : <1x12x256x256xf16, 786432x65536x256x1>, <1x12x256x256xf16, 786432x65536x1x256> -> <1x12x256x256xf16, 786432x65536x256x1>
    %3 = migraphx.multibroadcast %0 {out_dyn_dims = [], out_lens = [1, 12, 256, 256]} : <1xf16, 0> -> <1x12x256x256xf16, 0x0x0x0>
    %4 = migraphx.mul %2, %3 : <1x12x256x256xf16, 786432x65536x256x1>, <1x12x256x256xf16, 0x0x0x0> -> <1x12x256x256xf16, 786432x65536x256x1>
    %5 = migraphx.add %4, %arg0 : <1x12x256x256xf16, 786432x65536x256x1>, <1x12x256x256xf16, 786432x65536x256x1> -> <1x12x256x256xf16, 786432x65536x256x1>
    %6 = migraphx.softmax %5 {axis = 3 : i64} : <1x12x256x256xf16, 786432x65536x256x1> -> <1x12x256x256xf16, 786432x65536x256x1>
    %7 = migraphx.dot %6, %arg3 : <1x12x256x256xf16, 786432x65536x256x1>, <1x12x256x256xf16, 786432x65536x256x1> -> <1x12x256x256xf16, 786432x65536x256x1>
    %8 = migraphx.relu %7 : <1x12x256x256xf16, 786432x65536x256x1> -> <1x12x256x256xf16, 786432x65536x256x1>
    return %8 : !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1>
  }
}

The code totally makes sense for me. But, it results in the numerical error:

FAILED: gpu
RMS Error: 0.0832389
Max diff: 0.135544
Mismatch at 3: 0.0284576 != 0.0394592

module: "main"
@0 = @literal{ ... } -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@1 = @literal{ ... } -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
3 = @param:3 -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
2 = @param:2 -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
1 = @param:1 -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@5 = transpose[permutation={0, 1, 3, 2}](2) -> half_type, {1, 12, 256, 256}, {786432, 65536, 1, 256}, target_id=0
@6 = dot(1,@5) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@7 = mul(@6,@1) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@8 = add(@7,@0) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@9 = softmax[axis=3](@8) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@10 = dot(@9,3) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@11 = relu(@10) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0


ref:
module: "main"
@0 = @literal{ ... } -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@1 = @literal{ ... } -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
3 = @param:3 -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
2 = @param:2 -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
1 = @param:1 -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@5 = ref::transpose[permutation={0, 1, 3, 2}](2) -> half_type, {1, 12, 256, 256}, {786432, 65536, 1, 256}, target_id=0
@6 = ref::contiguous(@5) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@7 = ref::dot(1,@6) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@8 = ref::mul(@7,@1) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@9 = ref::add(@8,@0) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@10 = ref::softmax[axis=3](@9) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@11 = ref::dot(@10,3) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@12 = ref::relu(@11) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0


gpu:
module: "main"
@0 = check_context::migraphx::gpu::context -> float_type, {}, {}, target_id=0
@1 = hip::hip_copy_literal[id=main:@literal:0] -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
output = @param:output -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
3 = @param:3 -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
2 = @param:2 -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
1 = @param:1 -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0
@6 = gpu::code_object[code_object=10480,symbol_name=mlir_transpose_dot_mul_add_softmax_dot_relu,global=49152,local=256,](1,2,@1,3,output) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0

I extracted the mlir code and tested with the rocMLIR infrastructure.

$ cat ./atten-bias.mlir 
module {
  func.func @mlir_transpose_dot_mul_add_softmax_dot_relu(%arg0: !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1>, %arg1: !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1>, %arg2: !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1>, %arg3: !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1>) -> !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1> attributes {arch = "gfx90a:sramecc+:xnack-", kernel = "mixr", num_cu = 110 : i64} {
    %0 = migraphx.literal(dense<1.250000e-01> : tensor<1xf16>) : <1xf16, 0>
    %1 = migraphx.transpose %arg2 {permutation = [0, 1, 3, 2]} : <1x12x256x256xf16, 786432x65536x256x1> -> <1x12x256x256xf16, 786432x65536x1x256>
    %2 = migraphx.dot %arg1, %1 : <1x12x256x256xf16, 786432x65536x256x1>, <1x12x256x256xf16, 786432x65536x1x256> -> <1x12x256x256xf16, 786432x65536x256x1>
    %3 = migraphx.multibroadcast %0 {out_dyn_dims = [], out_lens = [1, 12, 256, 256]} : <1xf16, 0> -> <1x12x256x256xf16, 0x0x0x0>
    %4 = migraphx.mul %2, %3 : <1x12x256x256xf16, 786432x65536x256x1>, <1x12x256x256xf16, 0x0x0x0> -> <1x12x256x256xf16, 786432x65536x256x1>
    %5 = migraphx.add %4, %arg0 : <1x12x256x256xf16, 786432x65536x256x1>, <1x12x256x256xf16, 786432x65536x256x1> -> <1x12x256x256xf16, 786432x65536x256x1>
    %6 = migraphx.softmax %5 {axis = 3 : i64} : <1x12x256x256xf16, 786432x65536x256x1> -> <1x12x256x256xf16, 786432x65536x256x1>
    %7 = migraphx.dot %6, %arg3 : <1x12x256x256xf16, 786432x65536x256x1>, <1x12x256x256xf16, 786432x65536x256x1> -> <1x12x256x256xf16, 786432x65536x256x1>
    %8 = migraphx.relu %7 : <1x12x256x256xf16, 786432x65536x256x1> -> <1x12x256x256xf16, 786432x65536x256x1>
    return %8 : !migraphx.shaped<1x12x256x256xf16, 786432x65536x256x1>
  }
}

Here is the way how I execute the code snippet

$ func=mlir_transpose_dot_mul_add_softmax_dot_relu
$ rocmlir-gen -fut ${func} --arch gfx90a --clone-harness ./atten-bias.mlir | rocmlir-driver -kernel-pipeline=migraphx | rocmlir-driver -host-pipeline=migraphx,highlevel | rocmlir-gen -ph -rand 1 -rand_type float -fut ${func}_wrapper -absDiff_threshold 7e-03 -relDiff_threshold 7e-03 -RMS_threshold 5e-03  --verifier clone - | rocmlir-driver -host-pipeline mhal -kernel-pipeline full | xmir-runner --shared-libs=external/llvm-project/llvm/lib/libmlir_rocm_runtime.so,lib/libconv-validation-wrappers.so,external/llvm-project/llvm/lib/libmlir_runner_utils.so,external/llvm-project/llvm/lib/libmlir_float16_utils.so,external/llvm-project/llvm/lib/libmlir_c_runner_utils.so,external/llvm-project/llvm/lib/libmlir_async_runtime.so --entry-point-result=void

This results in

[1 1 1]

which means that the e2e test didn't fail.

I also tested the same code snippet with fp32 and the error became even smaller. However, it is not the case with MIGraphX; the numerical error stays the same. @pfultz2, is it possible that there is a problem on the MIGraphX` side?

manupak · 2024-02-19T10:22:00Z

@ravil-mobile it could be a mismatch in argument ordering into the fused_mlir module in the migraphx main.
Can you check an IR dump after fuse_mlir pass in the same test (using MIGRAPHX_TRACE_COMPILE=1)? see if the argument ordering is the same as you expect

pfultz2 · 2024-02-19T15:35:21Z

The parameters should be passed in alphabetic order, so it should go bias,y0,y1,z, but you are passing them as y0,y1,z,bias which is wrong.

ravil-mobile · 2024-02-19T15:35:38Z

@6 = ref::contiguous(@5) -> half_type, {1, 12, 256, 256}, {786432, 65536, 256, 1}, target_id=0

Thanks a lot! I will investigate it further.

ravil-mobile · 2024-02-19T15:46:55Z

The parameters should be passed in alphabetic order, so it should go bias,y0,y1,z, but you are passing them as y0,y1,z,bias which is wrong.

Hi @pfultz2 , thanks a lot! I didn't know about it. Let me try it

ravil-mobile · 2024-02-20T14:52:31Z

parameters

@pfultz2, you were correct about the alphabetical order. Many thanks for the info. I assume that y0, y1, z can be freely renamed - e.g, to a0, a1 and c. Now, it is getting easy to insert the bias term which is optional. All in all, the parameters can be either a0, a1, c or a0, a1, bias, c

causten · 2024-02-23T19:05:45Z

I'm seeing errors in the Performance check. Do this PR depend on a different one?

torchvision-resnet50 failed with following error:
terminate called after throwing an instance of 'migraphx::version_2_10_0::exception'
what(): /src/AMDMIGraphX/src/targets/gpu/fuse_mlir.cpp:137: compute_shape: MLIR_OP: adjusted mod parameter doesn't have the same lens as original input. Lens changed from 64, 64, 112, 112 to 64, 3, 7, 7

ravil-mobile · 2024-02-29T17:52:06Z

I'm seeing errors in the Performance check. Do this PR depend on a different one?

torchvision-resnet50 failed with following error: terminate called after throwing an instance of 'migraphx::version_2_10_0::exception' what(): /src/AMDMIGraphX/src/targets/gpu/fuse_mlir.cpp:137: compute_shape: MLIR_OP: adjusted mod parameter doesn't have the same lens as original input. Lens changed from 64, 64, 112, 112 to 64, 3, 7, 7

Hi @causten,

I've found a way to fix the lens mismatch. Now, everything should work as before. The timestamp and clang-tidy issues were fixed as well.

test/verify/gemm_softmax_gemm_relu.cpp

manupak

LGTM!

pfultz2 · 2024-03-11T16:31:49Z

test/verify/gemm_softmax_gemm_relu.cpp

        auto gemm2   = mm->add_instruction(migraphx::make_op("dot"), softmax, b1);
        mm->add_instruction(migraphx::make_op("relu"), gemm2);
        return p;
    }
    std::string section() const { return "gemm"; }
 };
+
+template struct gemm_softmax_gemm_relu<false, true>;


Why is the second parameter set to true?

Agree, it looks weird. I addressed this issue with the enum that you suggested below.

pfultz2 · 2024-03-11T16:35:06Z

test/verify/gemm_softmax_gemm_relu.cpp

@@ -27,31 +27,48 @@
 #include <migraphx/generate.hpp>
 #include <migraphx/make_op.hpp>

-struct gemm_softmax_gemm_relu : verify_program<gemm_softmax_gemm_relu>
+template <bool WithBias, bool WithStandardBiasShape>


I would prefer an enum be used here to make it clearer. Something like:

enum class bias { without, with, with_standard_shape };

Hi @pfultz2, Yes, it makes sense. I agree.

Done

umangyadav

fix merge issues.

ravil-mobile · 2024-03-13T13:31:48Z

fix merge issues.

Hi @umangyadav. Thanks for noticing. Done!

Ravil has already addressed your review, please re-review

ravil-mobile force-pushed the ravil/atten-bias branch from 54a6c4a to a3d73f7 Compare February 15, 2024 11:57

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umangyadav reviewed Mar 7, 2024

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umangyadav approved these changes Mar 7, 2024

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ravil-mobile force-pushed the ravil/atten-bias branch from a924f45 to bfa1fbc Compare March 7, 2024 20:39

ravil-mobile added 3 commits March 7, 2024 20:40

Added bias term to attenOp for rocMLIR

cf03e99

Updated gemm_softmax_gemm_relu.cpp verification test

2ecf6e3

Added a test with non-standard bias shape

2eae332

ravil-mobile force-pushed the ravil/atten-bias branch from bfa1fbc to 2eae332 Compare March 7, 2024 20:45

manupak approved these changes Mar 11, 2024

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pfultz2 previously requested changes Mar 11, 2024

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ravil-mobile force-pushed the ravil/atten-bias branch from 6e7fed1 to 19c91a7 Compare March 11, 2024 23:09

ravil-mobile requested a review from pfultz2 March 11, 2024 23:24

Merge branch 'develop' into ravil/atten-bias

06c0be0

ravil-mobile force-pushed the ravil/atten-bias branch from 19c91a7 to 06c0be0 Compare March 11, 2024 23:32

Merge branch 'develop' into ravil/atten-bias

caea9ca

ravil-mobile requested review from umangyadav and manupak March 12, 2024 20:51

umangyadav approved these changes Mar 12, 2024

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Merge branch 'develop' into ravil/atten-bias

f50a300

jerryyin requested review from pfultz2 and removed request for pfultz2 March 14, 2024 13:12

Merge branch 'develop' into ravil/atten-bias

052ae98

ravil-mobile requested a review from umangyadav March 14, 2024 15:05

Fixed clang-tidy issue from develop branch

5034d6e

umangyadav approved these changes Mar 14, 2024

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pfultz2 approved these changes Mar 14, 2024

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causten merged commit ef285c9 into develop Mar 15, 2024
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causten deleted the ravil/atten-bias branch March 15, 2024 13:36

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Added `bias` term to `attenOp` for rocMLIR #2777

Added `bias` term to `attenOp` for rocMLIR #2777

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ravil-mobile commented Mar 13, 2024

Added bias term to attenOp for rocMLIR #2777

Added bias term to attenOp for rocMLIR #2777

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ravil-mobile commented Mar 13, 2024

Added `bias` term to `attenOp` for rocMLIR #2777

Added `bias` term to `attenOp` for rocMLIR #2777

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