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update docs
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Rubberazer committed Jul 6, 2024
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4 changes: 2 additions & 2 deletions docs/html/jetgpio_8h.html
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<tr class="memdesc:a54bb3be857e985a527e91e55a1315c21"><td class="mdescLeft">&#160;</td><td class="mdescRight">This reads two bytes from the specified consecutive register(s) of the device associated with handle. <br /></td></tr>
<tr class="separator:a54bb3be857e985a527e91e55a1315c21"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a2532ad45eb33d8d476c4d6036f694702" id="r_a2532ad45eb33d8d476c4d6036f694702"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a2532ad45eb33d8d476c4d6036f694702">spiOpen</a> (unsigned spiChan, unsigned speed, unsigned mode, unsigned cs_delay, unsigned bits_word, unsigned lsb_first, unsigned cs_change)</td></tr>
<tr class="memdesc:a2532ad45eb33d8d476c4d6036f694702"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns a handle for the SPI device on the channel. Data will be transferred at baud bits per second. The flags may be used to modify the default behaviour of a 4-wire operation, mode 0, active low chip select. There are 2 SPI channels called SPI1 &amp; SPI2 on Nano and SPI0 &amp; SPI1 on Orin Nano &amp; NX. For Orin AGX there is only 1 SPI channel: SPI1. The pins used are given in the following table. <br /></td></tr>
<tr class="memdesc:a2532ad45eb33d8d476c4d6036f694702"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns a handle for the SPI device on the channel. Data will be transferred at baud bits per second. The flags may be used to modify the default behaviour of a 4-wire operation, mode 0, active low chip select. There are 2 SPI channels called SPI1 &amp; SPI2 on Nano and SPI0 &amp; SPI1 on Orin Nano &amp; NX. For Orin AGX there is only 1 SPI channel: SPI1 (pins 21, 19...so forth). The pins used are given in the following table. <br /></td></tr>
<tr class="separator:a2532ad45eb33d8d476c4d6036f694702"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a9fb213bb27196cab00718d2fdfb33688" id="r_a9fb213bb27196cab00718d2fdfb33688"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a9fb213bb27196cab00718d2fdfb33688">spiClose</a> (unsigned handle)</td></tr>
<tr class="memdesc:a9fb213bb27196cab00718d2fdfb33688"><td class="mdescLeft">&#160;</td><td class="mdescRight">This functions closes the SPI device identified by the handle. <br /></td></tr>
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</table>
</div><div class="memdoc">

<p>This function returns a handle for the SPI device on the channel. Data will be transferred at baud bits per second. The flags may be used to modify the default behaviour of a 4-wire operation, mode 0, active low chip select. There are 2 SPI channels called SPI1 &amp; SPI2 on Nano and SPI0 &amp; SPI1 on Orin Nano &amp; NX. For Orin AGX there is only 1 SPI channel: SPI1. The pins used are given in the following table. </p>
<p>This function returns a handle for the SPI device on the channel. Data will be transferred at baud bits per second. The flags may be used to modify the default behaviour of a 4-wire operation, mode 0, active low chip select. There are 2 SPI channels called SPI1 &amp; SPI2 on Nano and SPI0 &amp; SPI1 on Orin Nano &amp; NX. For Orin AGX there is only 1 SPI channel: SPI1 (pins 21, 19...so forth). The pins used are given in the following table. </p>
<table class="markdownTable">
<tr class="markdownTableHead">
<th class="markdownTableHeadNone">Port </th><th class="markdownTableHeadNone">MISO </th><th class="markdownTableHeadNone">MOSI </th><th class="markdownTableHeadNone">SCLK </th><th class="markdownTableHeadNone">CS0 </th><th class="markdownTableHeadNone">CS1 </th></tr>
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2 changes: 1 addition & 1 deletion jetgpio.h
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Expand Up @@ -631,7 +631,7 @@ int spiOpen(unsigned spiChan, unsigned speed, unsigned mode, unsigned cs_delay,
/**<
* @brief This function returns a handle for the SPI device on the channel.
* Data will be transferred at baud bits per second. The flags may be used to modify the default behaviour of a 4-wire operation, mode 0, active low chip select.
* There are 2 SPI channels called SPI1 & SPI2 on Nano and SPI0 & SPI1 on Orin Nano & NX. For Orin AGX there is only 1 SPI channel: SPI1.
* There are 2 SPI channels called SPI1 & SPI2 on Nano and SPI0 & SPI1 on Orin Nano & NX. For Orin AGX there is only 1 SPI channel: SPI1 (pins 21, 19...so forth).
* The pins used are given in the following table.
*
* |Port |MISO |MOSI |SCLK |CS0 |CS1 |
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