Initial support of TP-LINK ArcherC5 v4

profiles/TP-LINK/TP-LINK_ARCHERC5_v4_SPI-8M-64M.config

@@ -0,0 +1,125 @@
+CONFIG_DESC="TP-LINK ArcherC5 v4 (8MB SPI, 64MB RAM)"
+CONFIG_CROSS_COMPILER_PATH="/opt/buildroot-gcc342/bin"
+CONFIG_BAUDRATE_115200=y
+# CONFIG_BAUDRATE_57600 is not set
+ASIC_BOARD=y
+# RT2880_ASIC_BOARD is not set
+# RT3350_ASIC_BOARD is not set
+# RT3052_ASIC_BOARD is not set
+# RT3352_ASIC_BOARD is not set
+# RT3883_ASIC_BOARD is not set
+# RT5350_ASIC_BOARD is not set
+# RT6855A_ASIC_BOARD is not set
+MT7620_ASIC_BOARD=y
+# MT7621_ASIC_BOARD is not set
+# MT7628_ASIC_BOARD is not set
+MT7620_MP=y
+# P5_MAC_TO_NONE_MODE is not set
+# P5_MAC_TO_PHY_MODE is not set
+# P5_RGMII_TO_MAC_MODE is not set
+P5_RGMII_FORCE_RTL8367=y
+# P5_MII_TO_MAC_MODE is not set
+# P5_RMII_TO_MAC_MODE is not set
+P4_MAC_TO_NONE_MODE=y
+# P4_MAC_TO_PHY_MODE is not set
+# P4_RGMII_TO_MAC_MODE is not set
+# P4_RGMII_FORCE_RTL8367 is not set
+# P4_MII_TO_MAC_MODE is not set
+# P4_RMII_TO_MAC_MODE is not set
+MAC_TO_RTL8367_MODE=y
+# SWITCH_ASIC_RTL8367R is not set
+# SWITCH_ASIC_RTL8367M is not set
+# SWITCH_ASIC_RTL8370M is not set
+# SWITCH_ASIC_RTL8367RVB is not set
+SWITCH_ASIC_RTL8367RB=y
+# SWITCH_ASIC_RTL8367MVB is not set
+# SWITCH_ASIC_RTL8367MB is not set
+# SWITCH_ASIC_RTL8365MB is not set
+# SWITCH_ASIC_RTL8368MB is not set
+# SWITCH_CTRLIF_SMI is not set
+SWITCH_CTRLIF_MDIO=y
+# SWITCH_CPU_PORT_EXT0 is not set
+# SWITCH_CPU_PORT_EXT1 is not set
+SWITCH_CPU_PORT_EXT2=y
+CONFIG_RTL8367_MDIO_PHYID=29
+SWITCH_RGMII_DELAY_TX=1
+SWITCH_RGMII_DELAY_RX=0
+# SWITCH_LED_GROUP0 is not set
+# SWITCH_LED_GROUP1 is not set
+# SWITCH_LED_GROUP2 is not set
+# ON_BOARD_NAND_FLASH_COMPONENT is not set
+ON_BOARD_SPI_FLASH_COMPONENT=y
+# SPI_FAST_CLOCK is not set
+# SPI_FLASH_READ_DOR is not set
+# ON_BOARD_4M_FLASH_COMPONENT is not set
+ON_BOARD_8M_FLASH_COMPONENT=y
+# ON_BOARD_16M_FLASH_COMPONENT is not set
+# ON_BOARD_32M_FLASH_COMPONENT is not set
+SPI_FLASH_CONFIG_OFFSET_DEFAULT=0x30000
+SPI_FLASH_CONFIG_OFFSET=0x7c0000
+SPI_FLASH_FACTORY_OFFSET_DEFAULT=0x40000
+SPI_FLASH_FACTORY_OFFSET=0x7d0000
+SPI_FLASH_FIRMWARE_OFFSET_DEFAULT=0x50000
+SPI_FLASH_FIRMWARE_OFFSET=0x30000
+SPI_FLASH_FIRMWARE_SIZE_DEFAULT=8060928
+SPI_FLASH_FIRMWARE_SIZE=0x790000
+# ON_BOARD_SDR is not set
+# ON_BOARD_DDR1 is not set
+ON_BOARD_DDR2=y
+# ON_BOARD_256M_DRAM_COMPONENT is not set
+ON_BOARD_512M_DRAM_COMPONENT=y
+# ON_BOARD_1024M_DRAM_COMPONENT is not set
+# ON_BOARD_2048M_DRAM_COMPONENT is not set
+# ON_BOARD_DDR_WIDTH_8 is not set
+ON_BOARD_DDR_WIDTH_16=y
+ON_BOARD_16BIT_DRAM_BUS=y
+PDMA_NEW=y
+RX_SCATTER_GATTER_DMA=y
+# UBOOT_RAM is not set
+UBOOT_ROM=y
+MT7620_CPU_PLL_PARAMETERS=y
+# CPLL_NONE is not set
+# CPLL_FROM_480MHZ is not set
+# CPLL_FROM_XTAL is not set
+CPLL_FROM_CONF=y
+CPU_PLL_PARAMETERS=1
+# MT7620_PLL_MULTI_RATIO_24 is not set
+# MT7620_PLL_MULTI_RATIO_25 is not set
+# MT7620_PLL_MULTI_RATIO_26 is not set
+# MT7620_PLL_MULTI_RATIO_27 is not set
+# MT7620_PLL_MULTI_RATIO_28 is not set
+MT7620_PLL_MULTI_RATIO_29=y
+# MT7620_PLL_MULTI_RATIO_30 is not set
+CPLL_MULTI_RATIO_CFG=5
+MT7620_PLL_DIV_RATIO_2=y
+# MT7620_PLL_DIV_RATIO_3 is not set
+# MT7620_PLL_DIV_RATIO_4 is not set
+CPLL_DIV_RATIO_CFG=0
+CPLL_SSC_CFG=0x7
+USB_RECOVERY_SUPPORT=y
+# LAN_WAN_PARTITION is not set
+EPHY_LINK_UP=y
+TEXT_BASE=0xBC000000
+HTTPD_SUPPORT=y
+GPIO_BTN_RESET=13
+GPIO_BTN_WPS=2
+GPIO_BTN_WLTOG=-1
+GPIO_BTN_ROUTER=-1
+# GPIO_LED_INVERTED is not set
+GPIO_LED_ALL=-1
+GPIO_LED_INIT1=-1
+GPIO_LED_INIT2=-1
+GPIO_LED_INIT3=-1
+GPIO_LED_INIT4=-1
+GPIO_LED_INIT5=-1
+GPIO_LED_INIT6=-1
+GPIO_LED_INIT7=-1
+GPIO_LED_INIT8=-1
+GPIO_LED_ALERT1=-1
+GPIO_LED_ALERT2=-1
+GPIO_LED_ALERT3=-1
+GPIO_LED_ALERT4=-1
+GPIO_LED_POWER=42
+GPIO_USB_POWER=7
+GPIO_USB_POWER2=-1
+GPIO_RST_INIC=-1

uboot-5.x.x.x/config.in

@@ -977,7 +977,7 @@ fi
 			Ext1		SWITCH_CPU_PORT_EXT1 \
 			Ext2		SWITCH_CPU_PORT_EXT2
 			"
-
+    int  'Switch PHY address at MDIO Bus (0..29)' CONFIG_RTL8367_MDIO_PHYID 0
     int  'RGMII delay TX (0..1)'	SWITCH_RGMII_DELAY_TX	1
     int  'RGMII delay RX (0..7)'	SWITCH_RGMII_DELAY_RX	0
 

uboot-5.x.x.x/drivers/rtl8367/ralink_smi.c

@@ -14,6 +14,12 @@
 
 #if defined(MDC_MDIO_OPERATION)
 
+#if defined(CONFIG_RTL8367_MDIO_PHYID)
+#define MDIO_RTL8367_PHYID CONFIG_RTL8367_MDIO_PHYID
+#else
+#define MDIO_RTL8367_PHYID 0
+#endif
+
 extern u32 mii_mgr_read(u32 phy_addr, u32 phy_register, u32 *read_data);
 extern u32 mii_mgr_write(u32 phy_addr, u32 phy_register, u32 write_data);
 
@@ -33,13 +39,14 @@ extern u32 mii_mgr_write(u32 phy_addr, u32 phy_register, u32 write_data);
 #define MDC_MDIO_READ(a, b, c, d)	mii_mgr_read(b, c, d);
 #define MDC_MDIO_WRITE(a, b, c, d)	mii_mgr_write(b, c, d);
 
-static const u32 g_phy_id = 0;
+
+static const u32 g_phy_id = MDIO_RTL8367_PHYID;
 
 void smi_init(const char *asic_name)
 {
 	gpio_init_mdio();
 
-	printf("\n %s GSW control i/f: %s\n", asic_name, "MDIO");
+	printf("\n %s GSW control i/f: %s (PHY Address: %d) \n", asic_name, "MDIO", g_phy_id);
 }
 
 int smi_read(rtk_uint32 addr, rtk_uint32 *data)