bump fork for version 0.48 #26
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Co-authored-by: Miodrag Milanović <[email protected]> Co-authored-by: Roland Coeurjoly <[email protected]>
Co-authored-by: Miodrag Milanovic <[email protected]> Co-authored-by: Roland Coeurjoly <[email protected]>
* If all addresses of an array have the same initial value, they can be initialized in one go in btor with the constraint that the initial value must be fully const and thus can't have undef bits in
Add shell script (based on minisat lib) to clone and copy relevant files. Unclear if there are any changes lost that we need to patch back in.
I think what's happening here is that the _WIN64 fix is correct for 64bit windows, but (for whatever reason) the visual studio build is targeting 32bit windows, so the fix is unnecessary, but the upstream fix doesn't expect to be targeting 32bit windows and assumes all windows builds are 64bit... so fix that.
* this allows log_error, log_file_error and log_cmd_error which are all marked [[noreturn]] to be supported
* this adds support for cells(), modules() and wires() that all return ObjRanges, converting them into lists for python
Link to verilator in the introduction. Include `verilator --lint-only fifo.v` in the example synth doc. Fix linter warnings in fifo.v.
gowin: split cells_xtra by family
Fix portarcs edge cases
verific: Disable module existence check during static elaboration
Start Tcl design inspection methods
dfflibmap: cover enable inference with test
In commit ac988cf we made sure to undefine the CONST/VOID macros left defined by `tcl.h`, but this in turn makes it an issue to include additional Tcl headers later on (see issue #4808). One way out is to avoid a global `tcl.h` include. In the process we drop support for Tcl-enabled MXE builds, which were likely broken anyway due to the additional Tcl APIs used from `tclapi.cc`.
`$extern:...` modules inserted by `techmap -extern` are special in the regard that they have a private ID (starting with a dollar sign) but are not an internal cell. Support those modules in xaiger export.
Previously the `abc9_box` mode was reserved to modules with the `blackbox` or `whitebox` attribute. Allow `abc9_box` on ordinary modules when doing hierarchical synthesis.
… vs enable inference
tests: fix dfflibmap test
read_liberty: Revisit for abc9 whiteboxes
Support `abc9_box` on ordinary modules in abc_new
Adjust `abc9_ops -prep_box` to allow repeated invocation
write_verilog: Use assign for `$buf`
kernel: Remove global `tcl.h` include
wrapcell: Optionally track unused outputs
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