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Apple IIe Memory Paging
Apple provides multiple overlapping paging mechanisms which in total divide an Apple IIe's address space up into thirteen distinct segments.
Reading and writing: contains auxiliary RAM if ALTZP
is set. Contains base RAM otherwise.
Reading: contains base RAM if RAMRD
is reset; contains auxiliary RAM otherwise.
Writing: as per reading, but regarding RAMWRT
rather than RAMRD
.
Reading: contains auxiliary RAM if either (i) both 80STORE
and PAGE2
are set; or (ii) 80STORE
is reset and RAMRD
is set. Contains base RAM otherwise.
Writing: as per reading, but regarding RAMWRT
rather than RAMRD
.
Reading: contains auxiliary RAM if either (i) 80STORE
, PAGE2
and HIRES
are set; or (ii) 80STORE
is reset and RAMRD
is set. Contains base RAM otherwise.
Writing: as per reading, but regarding RAMWRT
rather than RAMRD
.
Never mapped to RAM or ROM. Always contains internal and card IO.
Contains ROM if RDCXROM
is set. Otherwise is unmapped, allowing cards to respond.
Contains ROM if RDCXROM
is set or SLOTC3ROM
is reset. Otherwise is unmapped, allowing card 3 to respond.
Contains ROM if RDCXROM
or RDC8ROM
is set. Otherwise is unmapped, allowing cards to respond.
RDC8ROM
is documented only implicitly; it is set by any access within the C3 page while SLOTC3ROM
is reset. It is reset by an access to CFFF
, or by system reset. This adheres to the standard contract with cards for this space: any card may claim this area upon an access to its ROM but must release it upon an access to CFFF
.
Reading: contains ROM if the language card read
flip flop is disabled. Contains base RAM if the flip flop is enabled and ALTZP
is reset. Otherwise contains auxiliary RAM.
Writing: empty if the language card write
flip flop is enabled. Contains base RAM if the flip flop is disabled and ALTZP
is reset. Otherwise contains auxiliary RAM.
The portion of RAM accessed depends upon the language card's BANK2
flip flop.
As per D000—E000 except that BANK2
does not affect the portion of RAM exposed.
The language card contains four flip flops: BANK2
, read
, write
and prewrite
.
This selects which of two 4kb segments will appear in the region D000–DFFF; it is set directly by address line 3 upon any access of the language-card switches.
This selects whether RAM or ROM will be read in the language card area. When it is enabled, RAM is read.
Any access with address line 0 = address line 1 enables RAM. Accesses where the two address lines are not equal enable ROM.
This selects whether RAM will be written to by writes to the language card area. When it is disabled, RAM can be written to. So it acts like a write-protect switch.
It is reset if: (i) pre-write is set; and (ii) a read occurs to an odd address.
It is set if: a read occurs to an even address.
Otherwise it does not change value.
This switch affects the write flip flop; it is set to the value of address line 1 upon any access of the language-card switches, after any change to write has occurred.
Prior to the IIe there was no auxiliary RAM. A single block of RAM up to 48kb exists from 0000 upwards.
Internal ROM is 12kb, so there is no mechanism for selecting between cards and ROM in the C000–CFFF region. That area is always used by cards only.
A language card can be fitted which enables an extra 16kb of RAM in an 8kb segment and two 4kb banks in the D000–FFFF region, as described above.
Neither the II nor the II+ has any internal hardware to support 80-column output. 80-column expansion cards were normally installed in slot 3 and accessed via their card ROM. The IIe's ability to page internal ROM in C300–C3FF only allows it to provide software compatibility with those cards.