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58 Open 92 Closed
58 Open 92 Closed
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Issues list

Broken A64FX port allocator bug Something isn't working
#448 opened Dec 20, 2024 by FinnWilkinson
Update front-end to BP communication timings
#447 opened Dec 20, 2024 by ABenC377
Update Dispatch Issue Unit to aid performance performance Performance optimisation
#445 opened Dec 16, 2024 by FinnWilkinson
Produce config output file
#444 opened Dec 12, 2024 by ABenC377
Issue with ldrsb Instruction Exception
#440 opened Nov 19, 2024 by memory-paper
@FinnWilkinson
4
Fix all the CMake warnings
#432 opened Oct 2, 2024 by tom91136
@tom91136
Compilation of SimEng fails on Manjaro Linux with GCC 14.2.1
#426 opened Sep 2, 2024 by jandrovins
4
Update core model diagram
#424 opened Aug 30, 2024 by ABenC377
@ABenC377
Gtest already imported with external LLVM bug Something isn't working build Issues with the buid process and its dependencies tests Testing and CI
#423 opened Aug 29, 2024 by JosephMoore25
1
Fix up random buffer value generation.
#413 opened May 24, 2024 by tom91136
Set errno for simulated program
#410 opened Apr 19, 2024 by dANW34V3R
2
Integrate BP update with in-order core enhancement New feature or request
#407 opened Mar 11, 2024 by ABenC377
@ABenC377
Regression Test issue when building SimEng : Unit_test SegFault
#405 opened Mar 11, 2024 by elfmath
1
Regression Test issue when building SimEng : "fcvtzu" ARM instruction
#404 opened Mar 11, 2024 by elfmath
1
Regression Test issue when building SimEng : getrandom syscall
#403 opened Mar 11, 2024 by elfmath
3
More registers required to rename all micro-ops than possible causes stalling 0.9.7 Part of SimEng Release 0.9.7 bug Something isn't working
#400 opened Feb 23, 2024 by JosephMoore25
More micro-operations than ROB size causes stalling and a mem leak 0.9.7 Part of SimEng Release 0.9.7 bug Something isn't working
#399 opened Feb 23, 2024 by JosephMoore25
Boolean Config Parameter Output
#398 opened Feb 21, 2024 by dANW34V3R
Fetch Unit Parameterisation
#397 opened Feb 20, 2024 by dANW34V3R
1
Handle case of not enough physical registers to rename micro-operations 0.9.7 Part of SimEng Release 0.9.7 bug Something isn't working
#384 opened Feb 5, 2024 by JosephMoore25
@JosephMoore25
[AArch64] Create helper functions for Load and Store instruction execution logic code consistency Cleaning up existing code to align with rest of project enhancement New feature or request
#378 opened Feb 2, 2024 by FinnWilkinson
Config Docs Range and Core Type Clarifications docs Documentation enhancement New feature or request
#376 opened Jan 26, 2024 by dANW34V3R
Zero register destination operands in multi-destination register AArch64 instructions bug Something isn't working
#375 opened Jan 26, 2024 by jj16791
[AArch64] Check all floating point convert instruction execution logic 0.9.7 Part of SimEng Release 0.9.7 bug Something isn't working
#367 opened Jan 8, 2024 by FinnWilkinson
9 tasks
1
Add SME2 support 0.9.7 Part of SimEng Release 0.9.7 enhancement New feature or request
#349 opened Nov 23, 2023 by FinnWilkinson
1
@FinnWilkinson
1
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