0.6

pepijndevos released this 17 Dec 16:13

· 230 commits to master since this release

5646882

What's Changed

Fix table offsets when reading the dat-file by @yrabbit in #137
Document the logicinfo table by @yrabbit in #138
Do clock aliases on the bottom row by @yrabbit in #141
Add ability to use the clock net for PLL signals by @yrabbit in #139

Full Changelog: 0.5.1...0.6

Contributors

yrabbit

Assets 2