Simple repository to test versioning on Vivado, [this] (https://www.fpgadeveloper.com/2014/08/version-control-for-vivado-projects.html) blog post was followed:
Repository structure regarding the vivado/firmware part of the project
- Vivado
- ip_repo : generated by Vivado and contains version controlled sources for IP blocks used in the design.
- src : contains all the version controlled sources, such as VHDL and Verilog
code, as well as scripts for generating parts of the project.
- bd
- design_1.tcl
- hdl
- bd
- build.tcls : Tcl script that will build the Vivado project from the sources.
- build.bat : is a batch file that launches the build script.