CpuExceptionHandlerLib: Added PcdSerialUseMmio condition.

acidanthera · Sep 23, 2024 · e609112 · e609112
1 parent 469ae18
commit e609112
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Showing 6 changed files with 36 additions and 27 deletions.
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
@@ -52,6 +52,7 @@
   gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize
   gUefiOvmfPkgTokenSpaceGuid.PcdUartBase                           ## CONSUMES
   gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort                        ## CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio                  ## CONSUMES
 
 [FeaturePcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard                    ## CONSUMES

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
@@ -231,22 +231,25 @@ ArchSetupExceptionStack (
   StackTop             -= CPU_KNOWN_GOOD_STACK_SIZE;
   Tss->SS0              = AsmReadSs ();
   Tss->IOMapBaseAddress = sizeof (IA32_TASK_STATE_SEGMENT);
-  //
-  // Allow access to gUartBase = 0x3F8 and Offsets: 0x01, 0x03, 0x04, 0x05, 0x06;
-  // and DebugIoPort = 0x402.
-  //
+
   IOBitMap = (UINT8 *)((UINTN)Tss + Tss->IOMapBaseAddress);
   SetMem (IOBitMap, IO_BIT_MAP_SIZE, 0xFF);
 
-  IOBitMapPointer             = (UINT8 *)((UINTN)IOBitMap + FixedPcdGet16 (PcdUartBase) / 8);
-  Offset                      = (UINT8)(FixedPcdGet16 (PcdUartBase) & 0x7U);
-  *(UINT16 *)IOBitMapPointer &= ~((1U << Offset) | (1U << (Offset + 1))
-                                | (1U << (Offset + 3)) | (1U << (Offset + 4))
-                                | (1U << (Offset + 5)) | (1U << (Offset + 6)));
-
-  IOBitMapPointer   = (UINT8 *)((UINTN)IOBitMap + FixedPcdGet16 (PcdDebugIoPort) / 8);
-  Offset            = (UINT8)(FixedPcdGet16 (PcdDebugIoPort) & 0x7U);
-  *IOBitMapPointer &= ~(1U << Offset);
+  if (!FixedPcdGetBool (PcdSerialUseMmio)) {
+    //
+    // Allow access to gUartBase = 0x3F8 and Offsets: 0x01, 0x03, 0x04, 0x05, 0x06;
+    // and DebugIoPort = 0x402.
+    //
+    IOBitMapPointer             = (UINT8 *)((UINTN)IOBitMap + FixedPcdGet16 (PcdUartBase) / 8);
+    Offset                      = (UINT8)(FixedPcdGet16 (PcdUartBase) & 0x7U);
+    *(UINT16 *)IOBitMapPointer &= ~((1U << Offset) | (1U << (Offset + 1))
+                                  | (1U << (Offset + 3)) | (1U << (Offset + 4))
+                                  | (1U << (Offset + 5)) | (1U << (Offset + 6)));
+
+    IOBitMapPointer   = (UINT8 *)((UINTN)IOBitMap + FixedPcdGet16 (PcdDebugIoPort) / 8);
+    Offset            = (UINT8)(FixedPcdGet16 (PcdDebugIoPort) & 0x7U);
+    *IOBitMapPointer &= ~(1U << Offset);
+  }
 
   Tss = (IA32_TASK_STATE_SEGMENT *)((UINTN)Tss + sizeof (IA32_TASK_STATE_SEGMENT) + IO_BIT_MAP_SIZE);
   ++TssDesc;

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
@@ -61,6 +61,7 @@
   gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList
   gUefiOvmfPkgTokenSpaceGuid.PcdUartBase                           ## CONSUMES
   gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort                        ## CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio                  ## CONSUMES
 
 [FeaturePcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard                    ## CONSUMES

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
@@ -72,6 +72,7 @@
   gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize
   gUefiOvmfPkgTokenSpaceGuid.PcdUartBase                           ## CONSUMES
   gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort                        ## CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio                  ## CONSUMES
 
 [FeaturePcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard                    ## CONSUMES

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
@@ -59,6 +59,7 @@
   gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize
   gUefiOvmfPkgTokenSpaceGuid.PcdUartBase                           ## CONSUMES
   gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort                        ## CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio                  ## CONSUMES
 
 [FeaturePcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard                    ## CONSUMES

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
@@ -238,23 +238,25 @@ ArchSetupExceptionStack (
   Tss->RSP0             = StackTop;
   StackTop             -= CPU_KNOWN_GOOD_STACK_SIZE;
   Tss->IOMapBaseAddress = sizeof (IA32_TASK_STATE_SEGMENT);
-  //
-  // Allow access to gUartBase = 0x3F8 and Offsets: 0x01, 0x03, 0x04, 0x05, 0x06;
-  // and DebugIoPort = 0x402.
-  //
+
   IOBitMap = (UINT8 *)((UINTN)Tss + Tss->IOMapBaseAddress);
   SetMem (IOBitMap, IO_BIT_MAP_SIZE, 0xFF);
 
-  IOBitMapPointer             = (UINT8 *)((UINTN)IOBitMap + FixedPcdGet16 (PcdUartBase) / 8);
-  Offset                      = (UINT8)(FixedPcdGet16 (PcdUartBase) & 0x7U);
-  *(UINT16 *)IOBitMapPointer &= ~((1U << Offset) | (1U << (Offset + 1))
-                                | (1U << (Offset + 3)) | (1U << (Offset + 4))
-                                | (1U << (Offset + 5)) | (1U << (Offset + 6)));
-
-  IOBitMapPointer   = (UINT8 *)((UINTN)IOBitMap + FixedPcdGet16 (PcdDebugIoPort) / 8);
-  Offset            = (UINT8)(FixedPcdGet16 (PcdDebugIoPort) & 0x7U);
-  *IOBitMapPointer &= ~(1U << Offset);
-
+  if (!FixedPcdGetBool (PcdSerialUseMmio)) {
+    //
+    // Allow access to gUartBase = 0x3F8 and Offsets: 0x01, 0x03, 0x04, 0x05, 0x06;
+    // and DebugIoPort = 0x402.
+    //
+    IOBitMapPointer             = (UINT8 *)((UINTN)IOBitMap + FixedPcdGet16 (PcdUartBase) / 8);
+    Offset                      = (UINT8)(FixedPcdGet16 (PcdUartBase) & 0x7U);
+    *(UINT16 *)IOBitMapPointer &= ~((1U << Offset) | (1U << (Offset + 1))
+                                  | (1U << (Offset + 3)) | (1U << (Offset + 4))
+                                  | (1U << (Offset + 5)) | (1U << (Offset + 6)));
+
+    IOBitMapPointer   = (UINT8 *)((UINTN)IOBitMap + FixedPcdGet16 (PcdDebugIoPort) / 8);
+    Offset            = (UINT8)(FixedPcdGet16 (PcdDebugIoPort) & 0x7U);
+    *IOBitMapPointer &= ~(1U << Offset);
+  }
   //
   // Fixup IST and task-state segment
   //