switched L431 to MSI, corrected dshot bidir timing

am32-firmware · Jan 10, 2025 · c86212d · c86212d
1 parent d9cd978
commit c86212d
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Showing 2 changed files with 6 additions and 8 deletions.
diff --git a/Mcu/l431/Src/IO.c b/Mcu/l431/Src/IO.c
@@ -68,7 +68,7 @@ void sendDshotDma()
     IC_TIMER_REGISTER->CCMR1 = 0x60;
     IC_TIMER_REGISTER->CCER = 0x3;
     IC_TIMER_REGISTER->PSC = output_timer_prescaler;
-    IC_TIMER_REGISTER->ARR = 115;
+    IC_TIMER_REGISTER->ARR = 110;
 
     IC_TIMER_REGISTER->EGR |= TIM_EGR_UG;
 #ifdef USE_TIMER_3_CHANNEL_1

diff --git a/Mcu/l431/Src/peripherals.c b/Mcu/l431/Src/peripherals.c
@@ -71,17 +71,15 @@ void SystemClock_Config(void)
 #endif
 
 #else
-  LL_RCC_MSI_Enable();
+  LL_RCC_HSI_Enable();
 
-   /* Wait till MSI is ready */
-  while(LL_RCC_MSI_IsReady() != 1)
+   /* Wait till HSI is ready */
+  while(LL_RCC_HSI_IsReady() != 1)
   {
 
   }
-  LL_RCC_MSI_EnableRangeSelection();
-  LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_6);
-  LL_RCC_MSI_SetCalibTrimming(0);
-  LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 40, LL_RCC_PLLR_DIV_2);
+  LL_RCC_HSI_SetCalibTrimming(16);
+  LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLLM_DIV_1, 10, LL_RCC_PLLR_DIV_2);
 #endif
 
   LL_RCC_PLL_EnableDomain_SYS();