Linux and Partial Reconfiguration without Shared Memory

Linux and Partial Reconfiguration without Shared Memory

The reference design for partial reconfiguration with linux supports:

• 1 hardware thread
• No shared memory
• Ramfs root directory
• The XUP board
• PPC405_0
• Normal Makefile system

Files:

• support/refdesigns/9.2/xup/opb_eth_tft_cf_pr: reference design
• core/linux/drivers/xilinx_hwicap: hwicap driver (modified from the driver provided by xilinx)

How to use the driver:

1. mknod /dev/hwicap c 254 0
2. cp partial_bitfile.bit /dev/hwicap -> your FPGA should be reconfigured.

When doing a new hw design:

1. copy the xilinx.dtx file (somewhere in edk-static/powerpc405/libsrc/) to arch/powerpc/boot/dts
2. make a new initrd

When adding some files to the root file system:

1. "cd arch/powerpc/boot/tmp"
2. "gunzip ramfs.image.gz"
3. "sudo mount ramdisk.image /mnt/rootfs/ -t ext2 -o loop=/dev/loop"
4. copy the file to /mnt/ramfs/desired/path
5. "umount /mnt/ramfs"
6. "gzip -9 ramfs.image"
7. "cp ramfs.image.gz ../."
8. "make ARCH=powerpc CROSS_COMPILE=powerpc-405-linux-gnu- simpleImage.initrd.virtex405-xup-opb-eth-tft-cf_pr"

Brief example

0. "demos/linux_partial_demo"
1. "dow merges/prm0_add/base_routed_full.bit"
2. "simpleImage.initrd.virtex405-xup-opb-eth-tft-cf_pr.elf"
3. login with root
4. "mknod /dev/icap c 254 0"
5. "mknod /dev/osif0 c 252 0"
6. execute "test_hw" -> you should see a value = 1 (press ENTER twice)
7. "cp merges/prm0_sub/prm0_add_routed_partial.bit /dev/icap"
8. execute "test_hw" -> you should see a value = 2 (press ENTER twice) (value = 1 or = 2 is set by the hw thread)