fixed printer (hack), added compressed instruction, no longer include…

…s in riscv.h, changed name to reflect other archs conventio

CMakeLists.txt

@@ -580,17 +580,18 @@ if(CAPSTONE_RISCV_SUPPORT)
         arch/RISCV/RISCVPrinter.c
     )
     set(HEADERS_RISCV
-        arch/RISCV/riscv_ast.gen.inc
-        arch/RISCV/riscv_decode.gen.inc
-        arch/RISCV/riscv_ast2str.gen.inc
-        arch/RISCV/riscv_ast2str_tbls.gen.inc
-        "include/capstone/riscv_insn.gen.inc"
-        arch/RISCV/riscv_insn_mapping.gen.inc
+        arch/RISCV/RISCVAst.gen.inc
+        arch/RISCV/RISCVDecode.gen.inc
+        arch/RISCV/RISCVDecodeCompressed.gen.inc
+        arch/RISCV/RISCVAst2Str.gen.inc
+        arch/RISCV/RISCVAst2StrTbls.gen.inc
+        arch/RISCV/RISCVInsn.gen.inc
+        arch/RISCV/RISCVInsnMappings.gen.inc
 
         arch/RISCV/RISCVDetails.h
         arch/RISCV/RISCVDisassembler.h
-        arch/RISCV/riscv_helpers_ast2str.h
-        arch/RISCV/riscv_helpers_rvconf.h
+        arch/RISCV/RISCVHelpersAst2Str.h
+        arch/RISCV/RISCVHelpersRVConf.h
         arch/RISCV/RISCVModule.h
         arch/RISCV/RISCVPrinter.h
     )

arch/RISCV/riscv_ast.gen.inc → arch/RISCV/RISCVAst.gen.inc

@@ -1,19 +1,19 @@
 /*=======================================================================*/
-/*This code was generated by the tool riscv_disasm_from_sail (see
- * https://github.com/moste00/riscv_disasm_from_sail)*/
-/*from the sail model of RISC-V (see https://github.com/riscv/sail-riscv) @
- * version 0b9c639f19da48734cbf14b61f6ad200b7c70de9.*/
-/*DO NOT MODIFY THIS CODE MANUALLY.*/
-/* */
-/*SPDX-License-Identifier: BSD-3-Clause*/
+/* This code was generated by the tool auto-sync-sail*/
+/* (see https://github.com/rizinorg/capstone-autosync-sail)*/
+/* from the sail model of RISC-V*/
+/* (see https://github.com/riscv/sail-riscv) @ version
+ * 0b9c639f19da48734cbf14b61f6ad200b7c70de9.*/
+/* DO NOT MODIFY THIS CODE MANUALLY. ANY MANUAL EDITS ARE OVERWRITTEN.*/
+/* ------------------------------------------------------------------- */
+/* Copyright © 2024 moste00 <[email protected]>*/
+/* SPDX-License-Identifier: BSD-3-Clause*/
 /*=======================================================================*/
 
-#ifndef __Riscv_ast_gen_inc__
-#define __Riscv_ast_gen_inc__
-#include <stdint.h>
-
+#ifndef __RISCVAST_GEN_INC__
+#define __RISCVAST_GEN_INC__
 #include <stddef.h>
-
+#include <stdint.h>
 #include <string.h>
 
 enum { RISCV_false = 0, RISCV_true = 1 };
@@ -2227,5 +2227,4 @@ struct ast {
     uint8_t riscv_zicboz /* bits : 5 */;
   } ast_node;
 };
-
 #endif