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R22SDF FFT VLSI/FPGA investigate and implementation

Verilog 14 2 Updated Apr 22, 2022

Playing with Low-density parity-check codes

C++ 91 23 Updated May 11, 2023

The source codes of the fast x86 LDPC decoder published

C 25 13 Updated Oct 1, 2020

AvaotaHyperCard is a TF card multiplexer enabling seamless switching between native TF card and USB disk modes via a button.

C 23 3 Updated Jul 19, 2024

MurPhySDR is an open source software-defined radio platform based on the AD9364 transceiver IC.

ANTLR 13 1 Updated Jul 9, 2024

xk265:HEVC/H.265 Video Encoder IP Core (RTL)

Verilog 239 79 Updated Apr 9, 2023

prebuilt images of openipc groundstations

7 Updated Oct 23, 2024

Implementation of the MultiWii Serial Protocol (MSP) for MultiWii and Cleanflight flight controller

C++ 88 30 Updated Dec 29, 2024

Stream games to your DJI FPV goggles!

C 56 1 Updated Apr 10, 2023

A full analog GPS receiver using discrete rf components and TinyFPGA

C 139 10 Updated Aug 15, 2024

Verilog PCI express components

Verilog 1,184 312 Updated Apr 26, 2024

A fast method used sliding window filter frame work for RTK-Visual-Inertial-Navigation

C++ 20 9 Updated Feb 13, 2024

Ruby FPV digital system

C++ 107 32 Updated Jan 14, 2025

EdgeTX is the cutting edge open source firmware for your R/C radio

C 1,681 351 Updated Jan 18, 2025

An FPGA-based MPEG2 encoder for video compression (1920x1080 120fps). 基于FPGA的MPEG2视频编码器,可实现视频压缩。

Verilog 117 23 Updated Jan 26, 2024

An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…

Verilog 662 112 Updated Dec 6, 2024

基于ZYNQ+AD9363的开源SDR硬件

VHDL 444 130 Updated Sep 13, 2022

Complete LoRa physical layer (LoRa PHY) implementation in MATLAB.

MATLAB 116 27 Updated Feb 12, 2023

Send video/audio over HDMI on an FPGA

SystemVerilog 1,116 116 Updated Feb 3, 2024

关于把基于海思芯片的 IPC 模组用在飞机上录像并顺便输出一路码流给数字图传的事

C 16 9 Updated Jul 26, 2020

WFB-NG - the next generation of long-range packet radio link based on raw WiFi radio

Python 1,061 250 Updated Jan 17, 2025

This is the fully-functional GNU Radio software-defined radio (SDR) implementation of a LoRa transceiver with all the necessary receiver components to operate correctly even at very low SNRs. This …

C++ 713 79 Updated Jan 9, 2025

Matlab simulations of the encoder and decoder for the New Radio LDPC code from 3GPP Release 15

MATLAB 46 31 Updated Mar 11, 2021

A port of MATLAB code for decoding LDPC codes using belief propagation to Python.

Python 23 11 Updated Jan 30, 2015

OpenHT FPGA design

Verilog 31 6 Updated Jun 24, 2024

Verilog AXI stream components for FPGA implementation

Python 766 234 Updated Aug 7, 2024

The RIFFA development repository

Verilog 792 317 Updated Jun 11, 2024

Implementations of SIMD instruction sets for systems which don't natively support them.

C 2,499 262 Updated Jan 17, 2025
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