Skip to content
run-tests

Merge pull request #960 from cathales/fixes #81

Sign in to view logs

Merge pull request #960 from cathales/fixes

Merge pull request #960 from cathales/fixes #81

Run time

Learn about OS pricing on GitHub Actions
Job Run time
generate-config
7s
build-spike / Build Spike
11m 38s
generate-code (riscv_arithmetic_basic_test, uvm)
3m 15s
generate-code (riscv_rand_instr_test, uvm)
2m 58s
generate-code (riscv_jump_stress_test, uvm)
3m 13s
generate-code (riscv_loop_test, uvm)
3m 4s
generate-code (riscv_rand_jump_test, uvm)
3m 2s
generate-code (riscv_mmu_stress_test, uvm)
3m 8s
generate-code (riscv_no_fence_test, uvm)
3m 9s
generate-code (riscv_illegal_instr_test, uvm)
2m 58s
generate-code (riscv_ebreak_test, uvm)
2m 59s
generate-code (riscv_ebreak_debug_mode_test, uvm)
3m 9s
generate-code (riscv_full_interrupt_test, uvm)
3m 15s
generate-code (riscv_unaligned_load_store_test, uvm)
3m 11s
generate-code (riscv_non_compressed_instr_test, uvm)
3m 7s
generate-code (riscv_hint_instr_test, uvm)
3m 14s
generate-code (riscv_pmp_test, uvm)
3m 4s
generate-code (riscv_arithmetic_basic_test, pyflow)
3m 47s
run-tests (riscv_arithmetic_basic_test, uvm)
1m 1s
run-tests (riscv_rand_instr_test, uvm)
1m 0s
run-tests (riscv_jump_stress_test, uvm)
52s
run-tests (riscv_loop_test, uvm)
1m 0s
run-tests (riscv_rand_jump_test, uvm)
56s
run-tests (riscv_mmu_stress_test, uvm)
1m 9s
run-tests (riscv_no_fence_test, uvm)
1m 8s
run-tests (riscv_illegal_instr_test, uvm)
1m 0s
run-tests (riscv_ebreak_test, uvm)
1m 5s
run-tests (riscv_ebreak_debug_mode_test, uvm)
1m 7s
run-tests (riscv_full_interrupt_test, uvm)
1m 19s
run-tests (riscv_unaligned_load_store_test, uvm)
1m 12s
run-tests (riscv_non_compressed_instr_test, uvm)
50s
run-tests (riscv_hint_instr_test, uvm)
1m 6s
run-tests (riscv_pmp_test, uvm)
58s
run-tests (riscv_arithmetic_basic_test, pyflow)
1m 8s
1h 19m 9s