Skip to content

Commit

Permalink
Merge pull request #4792 from chipsalliance/dependabot/submodules/thi…
Browse files Browse the repository at this point in the history
…rd_party/tools/verilator-446f21d

build(deps): bump third_party/tools/verilator from `837d9f9` to `446f21d`
  • Loading branch information
github-actions[bot] authored Jul 27, 2023
2 parents 2921e95 + d269518 commit 1459979
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion third_party/tools/verilator
Submodule verilator updated 54 files
+22 −0 Changes
+2 −2 Makefile.in
+1 −1 configure.ac
+1 −0 docs/CONTRIBUTORS
+1 −1 docs/guide/verilating.rst
+3 −3 docs/guide/warnings.rst
+4 −0 docs/spelling.txt
+1 −1 include/verilated_vpi.cpp
+1 −1 src/.gitignore
+1 −1 src/CMakeLists.txt
+1 −1 src/Makefile.in
+2 −2 src/V3Global.h
+2 −2 src/V3LinkDot.cpp
+1 −1 src/V3Options.cpp
+1 −1 src/V3Task.cpp
+1 −1 src/V3Width.cpp
+3 −3 src/VlcMain.cpp
+5 −25 src/config_build.h
+38 −0 src/config_package.h.in
+2 −2 src/verilog.y
+4 −0 test_regress/t/t_assert_imm_nz_bad.out
+20 −0 test_regress/t/t_assert_imm_nz_bad.pl
+15 −0 test_regress/t/t_assert_imm_nz_bad.v
+11 −0 test_regress/t/t_cast_size_bad.out
+19 −0 test_regress/t/t_cast_size_bad.pl
+17 −0 test_regress/t/t_cast_size_bad.v
+4 −0 test_regress/t/t_class_member_var_virt_bad.out
+19 −0 test_regress/t/t_class_member_var_virt_bad.pl
+12 −0 test_regress/t/t_class_member_var_virt_bad.v
+3 −3 test_regress/t/t_concat_link_bad.out
+1 −8 test_regress/t/t_dist_warn_coverage.pl
+1 −0 test_regress/t/t_randstate_seed_bad.out
+1 −0 test_regress/t/t_randstate_seed_bad.v
+107 −8 test_regress/t/t_sys_readmem.v
+14 −0 test_regress/t/t_sys_readmem_c.mem
+14 −0 test_regress/t/t_sys_readmem_i.mem
+14 −0 test_regress/t/t_sys_readmem_q.mem
+14 −0 test_regress/t/t_sys_readmem_s.mem
+16 −14 test_regress/t/t_sys_writemem.gold5.mem
+16 −0 test_regress/t/t_sys_writemem.gold6.mem
+16 −0 test_regress/t/t_sys_writemem.gold7.mem
+14 −0 test_regress/t/t_sys_writemem.gold8.mem
+6 −1 test_regress/t/t_sys_writemem.pl
+16 −14 test_regress/t/t_sys_writemem_b.gold5.mem
+16 −0 test_regress/t/t_sys_writemem_b.gold6.mem
+16 −0 test_regress/t/t_sys_writemem_b.gold7.mem
+14 −0 test_regress/t/t_sys_writemem_b.gold8.mem
+4 −1 test_regress/t/t_sys_writemem_b.pl
+10 −0 test_regress/t/t_urandom.v
+7 −0 test_regress/t/t_vlt_warn_ecode_bad.out
+22 −0 test_regress/t/t_vlt_warn_ecode_bad.pl
+10 −0 test_regress/t/t_vlt_warn_ecode_bad.vlt
+2 −0 test_regress/t/t_vpi_memory.cpp
+7 −0 test_regress/t/t_vpi_var.cpp

0 comments on commit 1459979

Please sign in to comment.