[ci] update test case cycle data

chipsalliance · Jun 7, 2024 · 3f7e518 · 3f7e518
1 parent c09c774
commit 3f7e518
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Showing 3 changed files with 14 additions and 14 deletions.
diff --git a/.github/cases/blastoise/default.json b/.github/cases/blastoise/default.json
@@ -1,13 +1,13 @@
 {
-  "mlir.rvv_vp_intrinsic_add": 386,
-  "mlir.rvv_vp_intrinsic_add_scalable": 581,
+  "mlir.rvv_vp_intrinsic_add": 385,
+  "mlir.rvv_vp_intrinsic_add_scalable": 582,
   "mlir.hello": 94,
   "mlir.stripmining": 26732,
   "asm.mmm": 92609,
-  "asm.smoke": 5017,
+  "asm.smoke": 4863,
   "intrinsic.conv2d_less_m2": 2087,
   "intrinsic.linear_normalization": 2878,
-  "intrinsic.softmax": 7437,
+  "intrinsic.softmax": 7390,
   "codegen.vaadd_vv": 94149,
   "codegen.vaadd_vx": 260834,
   "codegen.vaaddu_vv": 94149,
@@ -501,12 +501,12 @@
   "codegen.vfredmin_vs": 100812,
   "rvv_bench.ascii_to_utf16": 1544388,
   "rvv_bench.ascii_to_utf32": 674573,
-  "rvv_bench.byteswap": 3364202,
+  "rvv_bench.byteswap": 3364175,
   "rvv_bench.chacha20": 0,
-  "rvv_bench.mandelbrot": 4055251,
+  "rvv_bench.mandelbrot": 4054994,
   "rvv_bench.memcpy": 1485024,
   "rvv_bench.memset": 373911,
-  "rvv_bench.mergelines": 3275863,
+  "rvv_bench.mergelines": 3275174,
   "rvv_bench.poly1305": 0,
   "rvv_bench.strlen": 876331,
   "rvv_bench.utf8_count": 6320514

diff --git a/.github/cases/machamp/default.json b/.github/cases/machamp/default.json
@@ -1,10 +1,10 @@
 {
-  "mlir.rvv_vp_intrinsic_add": 410,
-  "mlir.rvv_vp_intrinsic_add_scalable": 626,
+  "mlir.rvv_vp_intrinsic_add": 411,
+  "mlir.rvv_vp_intrinsic_add_scalable": 627,
   "mlir.hello": 95,
   "mlir.stripmining": 14447,
   "asm.mmm": 91473,
-  "asm.smoke": 5374,
+  "asm.smoke": 5244,
   "intrinsic.conv2d_less_m2": 2209,
   "codegen.vaadd_vv": 114527,
   "codegen.vaadd_vx": 297285,
@@ -441,7 +441,7 @@
   "rvv_bench.chacha20": 0,
   "rvv_bench.memcpy": 1576831,
   "rvv_bench.memset": 287462,
-  "rvv_bench.mergelines": 3092453,
+  "rvv_bench.mergelines": 3090803,
   "rvv_bench.poly1305": 0,
   "rvv_bench.strlen": 711050,
   "rvv_bench.utf8_count": 5726377

diff --git a/.github/cases/sandslash/default.json b/.github/cases/sandslash/default.json
@@ -1,5 +1,5 @@
 {
-  "mlir.rvv_vp_intrinsic_add": 432,
+  "mlir.rvv_vp_intrinsic_add": 433,
   "mlir.rvv_vp_intrinsic_add_scalable": 734,
   "mlir.hello": 105,
   "mlir.stripmining": 15253,
@@ -441,8 +441,8 @@
   "rvv_bench.chacha20": 0,
   "rvv_bench.memcpy": 1840029,
   "rvv_bench.memset": 202628,
-  "rvv_bench.mergelines": 3052758,
+  "rvv_bench.mergelines": 3052275,
   "rvv_bench.poly1305": 0,
   "rvv_bench.strlen": 720670,
-  "rvv_bench.utf8_count": 4814077
+  "rvv_bench.utf8_count": 4814021
 }