[difftest] refactor unused check, add some path

chipsalliance · Jul 17, 2024 · 4cf9ba4 · 4cf9ba4
1 parent e79b73b
commit 4cf9ba4
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Showing 2 changed files with 8 additions and 5 deletions.
diff --git a/difftest/online_drive/src/dpi.rs b/difftest/online_drive/src/dpi.rs
@@ -47,13 +47,16 @@ unsafe fn load_from_payload(
   let strobe = &byte_vec[0..strb_width_in_byte];
   let data = &byte_vec[strb_width_in_byte..];
 
-  let masks: Vec<bool> = strobe
+  let mut masks: Vec<bool> = strobe
     .into_iter()
     .flat_map(|strb| {
       let mask: Vec<bool> = (0..8).map(|i| (strb & (1 << i)) != 0).collect();
       mask
     })
     .collect();
+  if masks.len() == 0 {
+    masks.push(true);
+  }
   assert!(
     masks.len() == data.len(),
     "strobe bit width is not aligned with data byte width"
@@ -197,7 +200,7 @@ unsafe extern "C" fn axi_write_indexedAccessPort_rs(
   payload: *const SvBitVecVal,
 ) {
   debug!(
-    "axi_write_indexed (channel_id={channel_id}, awid={awid}, awaddr={awaddr}, \
+    "axi_write_indexed (channel_id={channel_id}, awid={awid}, awaddr={awaddr:#x}, \
   awlen={awlen}, awsize={awsize}, awburst={awburst}, awlock={awlock}, awcache={awcache}, \
   awprot={awprot}, awqos={awqos}, awregion={awregion})"
   );

diff --git a/difftest/online_drive/src/drive.rs b/difftest/online_drive/src/drive.rs
@@ -106,7 +106,7 @@ impl Driver {
   fn read_mem(&mut self, addr: u32, size: u32, alignment_bytes: u32) -> Vec<u8> {
     assert!(
       addr % size == 0 || addr % alignment_bytes == 0,
-      "unaligned access addr={addr} size={size}bytes dlen={alignment_bytes}bytes"
+      "unaligned access addr={addr:#x} size={size}bytes dlen={alignment_bytes}bytes"
     );
     let residue_addr = addr % alignment_bytes;
     let aligned_addr = addr - residue_addr;
@@ -139,8 +139,8 @@ impl Driver {
     debug!("write mem: size={size}, addr={addr:#x}");
 
     assert!(
-      (addr % size == 0 || addr % alignment_bytes == 0) && size >= alignment_bytes,
-      "unaligned write access addr={addr} size={size}bytes dlen={alignment_bytes}bytes"
+      addr % size == 0 || addr % alignment_bytes == 0,
+      "unaligned write access addr={addr:#x} size={size}bytes dlen={alignment_bytes}bytes"
     );
 
     masks.iter().enumerate().filter(|(_, &m)| m).for_each(|(i, _)| {