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Development Branches
Andrew Hart edited this page Oct 1, 2020
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Here we document branches on which active development is taking place.
| Branch name | Owner | Brief description |
|---|---|---|
| RemoveNEntries | Derek Cranshaw | Removes nentries ports for output memories |
| ExpTopPRMEMC | Robért Glein | |
| ExpTopPRMEMC_ME_supermodule | Robért Glein | |
| issue_ulimit | Robért Glein | |
| test_HLSimpl | Robért Glein | |
| tripleloop | Kristian Hahn | |
| binned_memory_nentries | Andrew Hart | Test of removing nentries input ports on binned output memories, as is already done for non-binned memories |
| fw_synch | Andrew Hart | Various updates to synchronize with the HEAD of the emulation |
| TrackletProcessor | Anders Ryd | First working version of the TrackletProcessor module, combining the functionality of the TE and TC |
| IR_Update | Sarah Seif El Nasr-Storey | Update of the InputRouter |
| KF_ian | Ian Tomalin | |
| MatchProcessor | Brent Yates | First working version of the MatchProcessor module, combining the functionality of the PR, ME, and MC |
| MCconst | Brent Yates | Removes hard-wired constants from all processing modules |
| ME_supermodule | Noah Zipper | Test of an ME supermodule, combining several individual MEs into one module |
| fixPRMEMC | Rui Zou | |
| MatchEngineUpdate | Rui Zou | |
| MELayer1Update | Rui Zou |