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Merge branch 'codeplaysoftware:sycl-develop' into jiyang/rebase
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jiyang1011 authored Oct 28, 2024
2 parents 93031bc + 1dc136d commit 1f6a872
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Showing 2 changed files with 8 additions and 8 deletions.
2 changes: 1 addition & 1 deletion benchmarks/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@ include(FetchContent)
FetchContent_Declare(
googlebenchmark
GIT_REPOSITORY https://github.com/google/benchmark.git
GIT_TAG main
GIT_TAG v1.9.0
)
FetchContent_MakeAvailable(googlebenchmark)

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14 changes: 7 additions & 7 deletions examples/sycl/pvc/pvc_gemm_with_epilogue_relu.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -316,15 +316,15 @@ int main(int argc, const char** argv)
using LayoutC = cutlass::layout::RowMajor;
using LayoutD = cutlass::layout::RowMajor;

using GmemTiledCopyA = XE_2D_U16x8x16x4x2_LD_N;
using GmemTiledCopyB = XE_2D_U16x16x16x2x2_V;
using GmemTiledCopyA = XE_2D_U16x8x16_LD_N;
using GmemTiledCopyB = XE_2D_U16x16x16_LD_V;

// Workgroup-level tile
using TileShape = Shape<_256, _256, _32>;
using TileShape = Shape<_256, _128, _16>;

using TiledMma = TiledMMA<MMA_Atom<XE_8x16x16_F32BF16BF16F32_TT>,
Layout<Shape<_1,_1,_1>>,
Tile<_32,_64,_32>>; // Subgroup level-tile
Layout<Shape<_8,_2,_1>>,
Tile<_64,_32,_16>>; // Subgroup level-tile

constexpr int PipelineStages = 3;
using GEMMDispatchPolicy = cutlass::gemm::MainloopIntelPVC<PipelineStages>;
Expand All @@ -343,9 +343,9 @@ int main(int argc, const char** argv)
ElementOutput,
cutlass::gemm::TagToStrideC_t<LayoutD>,
FusionCallBacks,
XE_2D_U32x8x16x1x1_LD_N,
XE_2D_U32x8x16_LD_N,
void, void,
XE_2D_U32x8x16x1x1_ST_N,
XE_2D_U32x8x16_ST_N,
void, void>;

// Mainloop
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