-
Notifications
You must be signed in to change notification settings - Fork 48
Acronyms
Note:
Many terms not defined here are defined in the Kata Containers glossary.
See also the Glossary page.
0-9 | A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z
Authenticated encryption with associated data.
Algorithm Encryption Key.
AMD Root Key
AMD SEV Key
IBM Adjunct Processor.
Confidential Computing or Confidential Containers.
ARM Confidential Computing Architecture.
Confidential Computing Consortium.
AMD Chip Endorsement Key. See also VCEK
Configuration Firmware Volume.
Cloud Native Computing Foundation.
Another term for CC.
Cloud Service Provider or Cryptographic Service Provider.
Enclave Attestation Architecture.
Elliptical Curve Digital Signature Algorithm
Extensible Firmware Interface.
See SEV-ES
Federal Information Processing Standards
Firmware Volume, See Configuration Firmware Volume.
Firmware.
Guest owner proxy, another term for Key Broker Service. In the context of EFI firmware, refers to Graphics output protocol.
See also UUID.
Host key document, IBM-specific host certificate.
Hardware-based trusted execution environment.
Infrastructure as a Service.
Intel Security Libraries for the Data Center.
AMD Key Derivation Service, allowing cloud providers to generate keys for their customers.
Key Management Interoperability Protocol.
Linux Unified Key Setup,
Linux disk encryption specification used by dm-crypt and cryptsetup.
Alternate form for MITM.
Man in the middle or, more infrequently, Meet in the middle, two forms of attack.
Owner's Certificate Authority, a certificate and key provided used to provision AMD SEV systems.
Original Equipment Manufacturer.
Open Policy Agent, policy-based control for cloud native environments.
Open VM Firmware, UEFI firmware used by hypervisors.
Platform Configuration Register.
AMD Platform Endorsement Key, an asymetric signing key generated during one-time configuration, used to sign the PDH.
Public Key Cryptography Standards.
Private Layer Block Cipher Options.
Remote Attestation Procedures.
Request Challenge Attestation Response.
IBM Secure Execution.
Intel Security Libraries for the Data Center.
AMD's Secure Encrypted Virtualization. Provides memory encryption, using one key per virtual machine to isolate guests and the hypervisor from one another.
AMD's Secure Encrypted Virtualization-Encrypted State Adds CPU state integrity protection to SEV by encrypting all CPU register contents in the hypervisor-accessible state.
AMD's Secure Encrypted Virtualization Secure Nested Paging. SEV-SNP extends SEV-ES to provide integrity protection for memory pages, interrupts and more.
Unlike SEV-ES, SEV-SNP provides an attestation report to the guest at runtime.
Intel Software Guard Extensions.
See also SGX in the Kata Containers Glossary.
Secure Hash Algorithm, a family of cryptographically secure hash functions.
AMD's Secure Memory Encryption. Traditionally, this can also refer to Subject Matter Expert or Small / Medium sized Enterprise.
See SEV-SNP
Secure VM Service Module, services taking advantage of VMPL to
Target Core Mailbox in Userspace.
Intel Trusted Domain Extensions.
Trusted Execution Environment, such as can be provided by a TPM, SGX, TDX or SEV.
Trusted platform module, a dedicated micro controller used to store secrets such as cryptographic keys, a secure cryptographic processor.
Intel Trusted Execution Technology, a set of hardware extensions to Intel processors and chipsets that allow the authenticity of a system to be attested.
Unified Extensible Firmware Interface, a standardized version of EFI.
Unmapped Private Memory.
Universally Unique Identifier.
See also GUID.
AMD Versioned Chip Endorsement Key, derived from a chip-unique seed. See also CEK
AMD Versioned Loaded Endorsement Key, derived from seed in Key Derivation Service (KDS), typically given to cloud provider.
Virtual Machine Privilege Level, a new optional feature in AMD-SEV which allows a guest virtual machine to divide its address space into four levels, which can be used to provide hardware-isolated abstraction layers within a VM. See SVSM for an application
0-9 | A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z