Fix.simulation mode started bug

changes.d/6351.fix.md

@@ -0,0 +1 @@
+Fix a bug where simulation mode tasks were not spawning children of task:started.

cylc/flow/task_events_mgr.py

@@ -776,6 +776,9 @@ def process_message(
                 )
                 self.data_store_mgr.delta_job_attr(
                     job_tokens, 'job_id', itask.summary['submit_method_id'])
+            else:
+                # In simulation mode submitted implies started:
+                self.spawn_children(itask, TASK_OUTPUT_STARTED)
 
         elif message.startswith(FAIL_MESSAGE_PREFIX):
             # Task received signal.

tests/integration/run_modes/test_simulation.py

@@ -0,0 +1,34 @@
+# THIS FILE IS PART OF THE CYLC WORKFLOW ENGINE.
+# Copyright (C) NIWA & British Crown (Met Office) & Contributors.
+
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+"""Test the workings of simulation mode"""
+
+
+async def test_started_trigger(flow, reftest, scheduler):
+    """Does the started task output trigger downstream tasks
+    in sim mode?
+
+    Long standing Bug discovered in Skip Mode work.
+    https://github.com/cylc/cylc-flow/pull/6039#issuecomment-2321147445
+    """
+    schd = scheduler(flow({
+        'scheduler': {'events': {'stall timeout': 'PT0S', 'abort on stall timeout': True}},
+        'scheduling': {'graph': {'R1': 'a:started => b'}}
+    }), paused_start=False)
+    assert await reftest(schd) == {
+        ('1/a', None),
+        ('1/b', ('1/a',))
+    }