* Enable interrupts, set up the mtvec, and print a simple #26
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debug msg when a trap occurs so we know the mtval, mepc, and mcause.
aroelke
reviewed
May 4, 2021
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| void bad_trap(){ | ||
| unsigned long mepc, mtval, mcause; | ||
| asm volatile("csrr %0, mcause" : "=r"(mcause)); |
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Why not use read_csr here (and the below lines)?
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No reason, I could ... less code being generated this way though.
AP * Added some macros to make the uart code less verbose.
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debug msg when a trap occurs so we know the mtval, mepc, and mcause.