earlephilhower · earlephilhower · Sep 29, 2024 · Sep 23, 2024 · Sep 23, 2024 · Sep 23, 2024
diff --git a/.github/workflows/pull-request.yml b/.github/workflows/pull-request.yml
@@ -17,7 +17,7 @@ jobs:
       with:
         submodules: false
     - name: Run codespell
-      uses: codespell-project/actions-codespell@master
+      uses: codespell-project/actions-codespell@v2
       with:
         skip: ./ArduinoCore-API,./libraries/ESP8266SdFat,./libraries/Adafruit_TinyUSB_Arduino,./libraries/LittleFS/lib,./tools/pyserial,./pico-sdk,./.github,./docs/i2s.rst,./cores/rp2040/api,./libraries/FreeRTOS,./tools/libbearssl/bearssl,./include,./libraries/WiFi/examples/BearSSL_Server,./ota/uzlib,./libraries/http-parser/lib,./libraries/WebServer/examples/HelloServerBearSSL/HelloServerBearSSL.ino,./libraries/HTTPUpdateServer/examples/SecureBearSSLUpdater/SecureBearSSLUpdater.ino,./.git,./libraries/FatFS/lib/fatfs,./libraries/FatFS/src/diskio.h,./libraries/FatFS/src/ff.cpp,./libraries/FatFS/src/ffconf.h,./libraries/FatFS/src/ffsystem.cpp,./libraries/FatFS/src/ff.h,./libraries/lwIP_WINC1500/src/driver,./libraries/lwIP_WINC1500/src/common,./libraries/lwIP_WINC1500/src/bus_wrapper,./libraries/lwIP_WINC1500/src/spi_flash
         ignore_words_list: ser,dout,shiftIn,acount
@@ -101,6 +101,37 @@ jobs:
         cd ..
         bash ./tests/build-rp2350.sh
 
+# Build all rp2350-riscv examples on linux (core and Arduino IDE)
+  build-rp2350-riscv-linux:
+    name: Build RP2350-RISCV ${{ matrix.chunk }}
+    runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        chunk: [0, 1, 2, 3, 4, 5]
+    steps:
+    - uses: actions/checkout@v4
+      with:
+        submodules: true
+    - uses: actions/setup-python@v5
+      with:
+        python-version: '3.x'
+    - name: Cache Linux toolchain
+      id: cache-linux
+      uses: actions/cache@v4
+      with:
+        path: ./tools/dist
+        key: ${{ runner.os }}-${{ hashFiles('package/package_pico_index.template.json', 'tests/common.sh') }}
+    - name: Build Sketches
+      env:
+        BUILD_PARITY: custom
+        mod: 6
+        rem: ${{ matrix.chunk }}
+      run: |
+        cd pico-sdk
+        git submodule update --init
+        cd ..
+        bash ./tests/build-rp2350-riscv.sh
+
 # Build TinyUSB examples, requires custom build command line
   build-tinyusb:
     name: Build TinyUSB Examples

diff --git a/README.md b/README.md
@@ -4,7 +4,7 @@
 
 Raspberry Pi Pico Arduino core, for all RP2040 and RP2350 boards
 
-This is a port of Arduino to the RP2040 (Raspberry Pi Pico processor) and RP2350 (Raspberry Pi Pico 2 processor). It uses the bare Raspberry Pi Pico SDK and a custom GCC 12.3/Newlib 4.0 toolchain.
+This is a port of Arduino to the RP2040 (Raspberry Pi Pico processor) and RP2350 (Raspberry Pi Pico 2 processor). It uses the bare Raspberry Pi Pico SDK and a custom GCC 14.2/Newlib 4.3 toolchain and supports ARM and RISC-V cores.
 
 # Documentation
 See https://arduino-pico.readthedocs.io/en/latest/ along with the examples for more detailed usage information.
@@ -126,6 +126,7 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Peripherals:  SPI master/slave, Wire(I2C) master/slave, dual UART, emulated EEPROM, I2S audio input/output, Servo
 * printf (i.e. debug) output over USB serial
 * Transparent use of PSRAM globals and heap (RP2350 only)
+* ARM or RISC-V (Hazard3) support for The RP2350
 
 The RP2040 PIO state machines (SMs) are used to generate jitter-free:
 * Servos

diff --git a/boards.txt b/boards.txt
diff --git a/boot2/rp2350-riscv/none.S b/boot2/rp2350-riscv/none.S
@@ -0,0 +1,4 @@
+.section .boot2, "ax"
+
+.global __boot2_entry_point
+__boot2_entry_point:
diff --git a/boot2/rp2350/boot2_generic_03h_2_padded_checksum.S b/boot2/rp2350/boot2_generic_03h_2_padded_checksum.S
diff --git a/boot2/rp2350/boot2_generic_03h_4_padded_checksum.S b/boot2/rp2350/boot2_generic_03h_4_padded_checksum.S
diff --git a/boot2/rp2350/boot2_w25q080_2_padded_checksum.S b/boot2/rp2350/boot2_w25q080_2_padded_checksum.S
diff --git a/boot2/rp2350/boot2_w25q080_4_padded_checksum.S b/boot2/rp2350/boot2_w25q080_4_padded_checksum.S
diff --git a/boot2/rp2350/none.S b/boot2/rp2350/none.S
@@ -0,0 +1,4 @@
+.section .boot2, "ax"
+
+.global __boot2_entry_point
+__boot2_entry_point:
diff --git a/cores/rp2040/Arduino.h b/cores/rp2040/Arduino.h
@@ -37,7 +37,7 @@
 #ifdef abs
 #undef abs
 #endif // abs
-#ifdef __cplusplus
+#if defined(__cplusplus) && !defined(__riscv)
 using std::abs;
 using std::round;
 #else

diff --git a/cores/rp2040/RP2040Support.h b/cores/rp2040/RP2040Support.h
@@ -175,18 +175,22 @@ class RP2040 {
 
     void begin() {
         _epoch = 0;
+#if !defined(__riscv)
         if (!__isFreeRTOS) {
             // Enable SYSTICK exception
             exception_set_exclusive_handler(SYSTICK_EXCEPTION, _SystickHandler);
             systick_hw->csr = 0x7;
             systick_hw->rvr = 0x00FFFFFF;
         } else {
+#endif
             int off = 0;
             _ccountPgm = new PIOProgram(&ccount_program);
             _ccountPgm->prepare(&_pio, &_sm, &off);
             ccount_program_init(_pio, _sm, off);
             pio_sm_set_enabled(_pio, _sm, true);
+#if !defined(__riscv)
         }
+#endif
     }
 
     // Convert from microseconds to PIO clock cycles
@@ -208,6 +212,7 @@ class RP2040 {
     // Get CPU cycle count.  Needs to do magic to extens 24b HW to something longer
     volatile uint64_t _epoch = 0;
     inline uint32_t getCycleCount() {
+#if !defined(__riscv)
         if (!__isFreeRTOS) {
             uint32_t epoch;
             uint32_t ctr;
@@ -217,11 +222,15 @@ class RP2040 {
             } while (epoch != (uint32_t)_epoch);
             return epoch + (1 << 24) - ctr; /* CTR counts down from 1<<24-1 */
         } else {
+#endif
             return ccount_read(_pio, _sm);
+#if !defined(__riscv)
         }
+#endif
     }
 
     inline uint64_t getCycleCount64() {
+#if !defined(__riscv)
         if (!__isFreeRTOS) {
             uint64_t epoch;
             uint64_t ctr;
@@ -231,8 +240,11 @@ class RP2040 {
             } while (epoch != _epoch);
             return epoch + (1LL << 24) - ctr;
         } else {
+#endif
             return ccount_read(_pio, _sm);
+#if !defined(__riscv)
         }
+#endif
     }
 
     inline int getFreeHeap() {

diff --git a/cores/rp2040/_freertos.cpp b/cores/rp2040/_freertos.cpp
@@ -31,7 +31,7 @@ typedef struct {
 static FMMap *_map = nullptr;
 SemaphoreHandle_t __get_freertos_mutex_for_ptr(mutex_t *m, bool recursive) {
     if (!_map) {
-        _map = (FMMap *)calloc(sizeof(FMMap), 16);
+        _map = (FMMap *)calloc(16, sizeof(FMMap));
     }
     // Pre-existing map
     for (int i = 0; i < 16; i++) {

diff --git a/cores/rp2040/lock.cpp b/cores/rp2040/lock.cpp
@@ -99,7 +99,7 @@ static SemaphoreHandle_t __getFreeRTOSRecursiveMutex(_LOCK_T lock) {
     return __get_freertos_mutex_for_ptr((mutex_t *)l, true);
 }
 
-void __retarget_lock_init(_LOCK_T *lock) {
+void __retarget_lock_init(_LOCK_T lock) {
     if (__freeRTOSinitted) {
         mutex_t *l = (mutex_t *)lock;
         if ((l == &__lock___at_quick_exit_mutex) || (l == &__lock___tz_mutex) || (l == &__lock___dd_hash_mutex) || (l == &__lock___arc4random_mutex)) {
@@ -113,7 +113,7 @@ void __retarget_lock_init(_LOCK_T *lock) {
     }
 }
 
-void __retarget_lock_init_recursive(_LOCK_T *lock) {
+void __retarget_lock_init_recursive(_LOCK_T lock) {
     if (__freeRTOSinitted) {
         recursive_mutex_t *l = (recursive_mutex_t *)lock;
         if ((l == &__lock___sinit_recursive_mutex) || (l == &__lock___sfp_recursive_mutex) || (l == &__lock___atexit_recursive_mutex) || (l == &__lock___malloc_recursive_mutex) || (l == &__lock___env_recursive_mutex)) {

diff --git a/cores/rp2040/main.cpp b/cores/rp2040/main.cpp
@@ -88,7 +88,7 @@ extern "C" int main() {
 
     // Allocate impure_ptr (newlib temps) if there is a 2nd core running
     if (!__isFreeRTOS && (setup1 || loop1)) {
-        _impure_ptr1 = (struct _reent*)calloc(sizeof(struct _reent), 1);
+        _impure_ptr1 = (struct _reent*)calloc(1, sizeof(struct _reent));
         _REENT_INIT_PTR(_impure_ptr1);
     }
 
@@ -134,7 +134,6 @@ extern "C" int main() {
         }
         rp2040.fifo.registerCore();
     }
-
     if (!__isFreeRTOS) {
         if (setup1 || loop1) {
             delay(1); // Needed to make Picoprobe upload start 2nd core

diff --git a/docs/index.rst b/docs/index.rst
@@ -7,7 +7,7 @@ RP2040 (Raspberry Pi Pico processor) and RP2350 (Raspberry Pi Pico 2
 processor), intended to make it easier and more fun to use and
 program the Raspberry Pi Pico / RP2040 / RP2350 based boards.
 
-This Arduino core uses a custom toolset with GCC 12.3 and Newlib 4.0.0
+This Arduino core uses a custom toolset with GCC 14.2 and Newlib 4.3
 and doesn't require any system-installed prerequisites.
 
 For the latest version, always check https://github.com/earlephilhower/arduino-pico

diff --git a/docs/platformio.rst b/docs/platformio.rst
@@ -309,6 +309,19 @@ local copy of the core (with e.g. some modifications) on disk (`see documentatio
 Note that this can only be done for versions that have the PlatformIO
 builder script it in, so versions before 1.9.2 are not supported.
 
+Selecting the CPU architecture
+------------------------------
+
+By default Platform.IO will build for the onboard ARM cores on the RP2350.  To build RISC-V binaries
+adjust the ``board_build.mcu`` option accordingly:
+
+.. code:: ini
+
+    ; RP2350 based (RISC-V)
+    [env:rpipico2-riscv]
+    board = rpipico2
+    board_build.mcu = rp2350-riscv
+
 Examples
 --------
 

diff --git a/docs/rp2350.rst b/docs/rp2350.rst
@@ -6,7 +6,14 @@ is supported by the core with some minor caveats:
 
 * PSRAM is supported via a new ``pmalloc`` call and ``PSRAM`` variable decorator.
 * Both RP2350A and RP2350B (48 GPIOs) are supported.
-* Only ARM mode is available.  For RISC-V (Hazard3), please use the raw SDK.
+
+ARM and RISC-V Modes
+~~~~~~~~~~~~~~~~~~~~
+
+Either set of cores can be used on the RP2350, ARM Cortex-M33 or RISC-V Hazard3.
+Select the desired core from the IDE menus under ``Tools->CPU Architecture``.
+As of the initial release, all libraries should work under the new RISC-V mode with
+the exception of FreeRTOS.  If not, patches are always welcome.
 
 P2350-E9 Errata ("Increased leakage current on Bank 0 GPIO when pad input is enabled")
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

diff --git a/include/bearssl/bearssl_git.h b/include/bearssl/bearssl_git.h
@@ -1,2 +1,2 @@
 // Do not edit -- Automatically generated by tools/sdk/ssl/bearssl/Makefile
-#define BEARSSL_GIT c2c9d9d
+#define BEARSSL_GIT 5b7f3d5
diff --git a/lib/rp2040/libbearssl.a b/lib/rp2040/libbearssl.a
diff --git a/lib/rp2040/libipv4-big.a b/lib/rp2040/libipv4-big.a
diff --git a/lib/rp2040/libipv4-bt-big.a b/lib/rp2040/libipv4-bt-big.a
diff --git a/lib/rp2040/libipv4-bt.a b/lib/rp2040/libipv4-bt.a
diff --git a/lib/rp2040/libipv4-ipv6-big.a b/lib/rp2040/libipv4-ipv6-big.a
diff --git a/lib/rp2040/libipv4-ipv6-bt-big.a b/lib/rp2040/libipv4-ipv6-bt-big.a
diff --git a/lib/rp2040/libipv4-ipv6-bt.a b/lib/rp2040/libipv4-ipv6-bt.a
diff --git a/lib/rp2040/libipv4-ipv6.a b/lib/rp2040/libipv4-ipv6.a
diff --git a/lib/rp2040/libipv4.a b/lib/rp2040/libipv4.a
diff --git a/lib/rp2040/libpico.a b/lib/rp2040/libpico.a
diff --git a/lib/rp2040/ota.o b/lib/rp2040/ota.o
diff --git a/lib/rp2350-riscv/libbearssl.a b/lib/rp2350-riscv/libbearssl.a
diff --git a/lib/rp2350-riscv/libipv4-big.a b/lib/rp2350-riscv/libipv4-big.a
diff --git a/lib/rp2350-riscv/libipv4-ipv6-big.a b/lib/rp2350-riscv/libipv4-ipv6-big.a
diff --git a/lib/rp2350-riscv/libipv4-ipv6.a b/lib/rp2350-riscv/libipv4-ipv6.a
diff --git a/lib/rp2350-riscv/libipv4.a b/lib/rp2350-riscv/libipv4.a
diff --git a/lib/rp2350-riscv/libpico.a b/lib/rp2350-riscv/libpico.a